Abstract: A chemical mechanical polishing apparatus is described, which includes a platen, a polishing pad that is attached to the platen, and a means for adjusting the temperature of the polishing pad.
Abstract: A method for making a semiconductor device is described. That method comprises forming a high-k gate dielectric layer on a substrate, then forming a capping layer on the high-k gate dielectric layer. After oxidizing the capping layer to form a capping dielectric oxide on the high-k gate dielectric layer, a gate electrode is formed on the capping dielectric oxide.
Type:
Grant
Filed:
December 29, 2003
Date of Patent:
May 24, 2005
Assignee:
Intel Corporation
Inventors:
Justin K. Brask, Mark L. Doczy, John P. Barnak, Robert S. Chau
Abstract: A method for making a semiconductor device is described. That method comprises forming a dielectric layer on a substrate, and forming an impurity containing metal layer on the dielectric layer. A metal gate electrode is then formed from the impurity containing metal layer. Also described is a semiconductor device that comprises a metal gate electrode that is formed on a dielectric layer, which is formed on a substrate. The metal gate electrode includes a sufficient amount of an impurity to shift the workfunction of the metal gate electrode by at least about 0.1 eV.
Abstract: A method for making a semiconductor device is described. That method comprises modifying a first surface, and forming a high-k gate dielectric layer on an unmodified second surface.
Type:
Grant
Filed:
June 4, 2004
Date of Patent:
May 3, 2005
Assignee:
Intel Corporation
Inventors:
Matthew V. Metz, Suman Datta, Jack Kavalieros, Mark L. Doczy, Justin K. Brask, Uday Shah, Robert S. Chau
Abstract: A method for making a substrate for a mirror used in photolithography is described. That method comprises forming a crystalline layer on a first layer, which has a low coefficient of thermal expansion. Part of the crystalline layer is then removed to form on the first layer a second layer that has a high quality surface finish.
Abstract: An improved method of forming a semiconductor device is described. Initially, a structure is formed that includes first and second hard masking layers that cover a dielectric layer. A first part of the second hard masking layer and a first part of the first hard masking layer are etched to form an etched region within the hard mask that exposes a first portion of the dielectric layer. That etched region is filled with a sacrificial material. After etching through a second part of the second hard masking layer, the remainder of the sacrificial material is removed prior to subsequent processing.
Abstract: A method for making a semiconductor device is described. That method comprises forming on a substrate a high-k gate dielectric layer that includes impurities, then forming a silicon containing sacrificial layer on the high-k gate dielectric layer. After the silicon containing sacrificial layer has gettered the impurities from the high-k gate dielectric layer, the silicon containing sacrificial layer is removed, and a gate electrode is formed on the high-k gate dielectric layer. The method optionally includes exposing the high-k gate dielectric layer to a silicic acid containing solution until a silicon dioxide capping layer forms on the high-k gate dielectric layer, prior to forming a gate electrode on the capping layer.
Type:
Grant
Filed:
May 7, 2004
Date of Patent:
March 15, 2005
Assignee:
Intel Corporation
Inventors:
Justin K. Brask, Mark L. Doczy, John P. Barnak, Ying Zhou
Abstract: A method for making a flash memory having a passivation layer that is not transparent to ultraviolet light. The method forming a semiconductor that includes flash memory cell having floating gate, then forming a the substrate. Process induced charge that has accumulated on the flash cell floating gate is then neutralized and a passivation layer, which is no transparent to ultraviolet light, is formed on the conductive layer.
Type:
Grant
Filed:
November 9, 2001
Date of Patent:
February 1, 2005
Assignee:
Intel Corporation
Inventors:
Glen Wada, Raghupathy V. Giridhar, Anthony Ozzello
Abstract: A method of making a semiconductor device is described. That method comprises forming a conductive layer that contacts a via, such that the conductive layer includes a higher concentration of an electromigration retarding amount of a dopant near the via than away from the via.
Abstract: A method for making a semiconductor device is described. That method comprises forming on a substrate a buffer layer and a high-k gate dielectric layer, oxidizing the surface of the high-k gate dielectric layer, and then forming a gate electrode on the oxidized high-k gate dielectric layer.
Type:
Grant
Filed:
December 10, 2002
Date of Patent:
September 7, 2004
Assignee:
Intel Corporation
Inventors:
Christopher G. Parker, Markus Kuhn, Ying Zhou, Scott A. Hareland, Suman Datta, Nick Lindert, Robert S. Chau, Timothy E. Glassman, Matthew V. Metz, Sunit Tyagi
Abstract: A method for making a semiconductor device is described. That method includes forming a sacrificial layer on a substrate, then forming a layer of photoresist on the sacrificial layer. After the photoresist layer is patterned, to form a patterned photoresist layer that has a first opening, a first part of the sacrificial layer is removed to generate an etched sacrificial layer that has a tapered etch profile. A second part of the sacrificial layer is then removed to generate an etched sacrificial layer that has a second opening that is substantially smaller than the first opening.
Abstract: A method for making a semiconductor device is described. That method includes forming a sacrificial layer on a substrate, then forming a layer of photoresist on the sacrificial layer. After the photoresist layer is patterned, to form a patterned photoresist layer that has a first opening, part of the sacrificial layer is removed to generate an etched sacrificial layer that has a second opening that is substantially smaller than the first opening.
Abstract: An improved method for making a semiconductor device is described. That method includes forming a first dielectric layer on a substrate, then forming on the first dielectric layer a second dielectric layer. The second dielectric layer is made from a material that is more sensitive to radiation of a specified wavelength and energy than is the material from which the first dielectric layer is made. After the first dielectric layer and the second dielectric layer are exposed to radiation of a specified wavelength and energy, a portion of the first dielectric layer is removed to form a via, and a portion of the second dielectric layer is removed to form a trench. The via and trench are then filled with a conductive material.
Abstract: A method and apparatus for cooling an electronic component within a handheld device comprised of an extension to the casing of the handheld device and at least one portion of a cooling apparatus within the extension.
Abstract: A semiconductor device having a multilayer laminate that includes a thermally stable, flexible polymer film, a semiconductor die, a molding compound, and a heat dissipation member. The die has an active surface and an inactive surface, in which the active surface includes a plurality of contacts. The molding compound contacts both the laminate and the die, but does not contact the die's active or inactive surfaces. The heat dissipation member contacts the die's inactive surface.
Type:
Grant
Filed:
February 5, 2001
Date of Patent:
May 18, 2004
Assignee:
Intel Corporation
Inventors:
Qing Ma, Jin Lee, Chun Mu, Quat Vu, Jian Li, Larry Mosley
Abstract: A slurry is described that comprises a mixture of between about 0.01 mole and about 0.1 mole per liter of an organic acid salt, between about 1% to about 20% by volume of an abrasive, and an oxidizer.
Abstract: A method of converting a hydrophobic surface of a dielectric layer to a hydrophilic surface is described. That method comprises forming on a substrate a dielectric layer that has a hydrophobic surface, then coupling a hydrophilic component to the surface of the dielectric layer. Also described is a method for making a semiconductor device that employs this technique after polishing a conductive layer, which may comprise copper.
Abstract: A method for making a semiconductor device is described. That method comprises forming a high-k gate dielectric layer on a substrate. After removing impurities from that layer, and increasing its oxygen content, a gate electrode is formed on the high-k gate dielectric layer.
Type:
Grant
Filed:
March 11, 2003
Date of Patent:
April 6, 2004
Assignee:
Intel Corporation
Inventors:
Justin K. Brask, Timothy E. Glassman, Mark L. Doczy, Matthew V. Metz
Abstract: A method for making a semiconductor device is described. That method comprises forming a high-k gate dielectric layer on a substrate. After forming a silicon nitride layer on the high-k gate dielectric layer, a gate electrode is formed on the silicon nitride layer.
Type:
Grant
Filed:
November 5, 2002
Date of Patent:
March 30, 2004
Assignee:
Intel Corporation
Inventors:
Robert S. Chau, Timothy E. Glassman, Christopher G. Parker, Matthew V. Metz, Lawrence J. Foley, Reza Arghavani, Douglas W. Barlage
Abstract: A computer motherboard is described. That motherboard includes a memory controller and a memory section. A first trace couples the memory controller to the memory section, and a second trace couples the memory controller to the memory section. The first trace is joined with the second trace at the memory controller, the second trace is routed in parallel with the first trace, and the second trace is longer than the first trace. Also described is a computer system that includes this motherboard and a memory card.