Abstract: A method and apparatus for detecting an interrupt request in a video graphics or other system are accomplished by reading or polling a shared interrupt request flag stored in one of multiple potentially interrupting devices and determining whether a pending interrupt request exists based on a status of the shared interrupt request flag. In the event that a pending interrupt request exists, a notification of the pending interrupt request is provided to an interrupt service routine. In the event that a pending interrupt request does not exist the circuitry that is reading or polling the shared interrupt request flag delays for a polling interval and then repeats reading or polling the shared interrupt request flag and determining whether a pending interrupt request exists.

Abstract: A universal asynchronous receiver transmitter (UART) emulation stage for modem communication uses a digital signal processor containing a software UART control program for sending UART control signals to hardware based UART emulation circuitry. The software UART control program communicates to a modem application interface program that is under control of a host processor. The UART emulation circuitry that is responsive to the control signals from the digital signal processor, includes dedicated transmit and receive FIFO buffer memory for storing modem data and also includes interrupt generation logic to generate an interrupt for the digital signal processor when the received FIFO buffer memory is at a predetermined threshold. The UART emulation circuitry also includes programmable control logic for facilitating host processor interrupt pacing to maintain high compatibility with legacy applications, namely DOS based applications.

Abstract: A method and apparatus for improving the quality of video data when displayed on a display device that uses YUV output data to produce a display includes processing that begins by generating expanded RGB data from received RGB data. For example, the RGB data may be 8-bit data and the expanded data is generated by adding bits to it. The processing continues by generating RGB representative data from received YUV data. The RGB representative data is of the same format as the expanded RGB data and has a value range that includes and exceeds the normalized value range of the perceived RGB data. For example, the RGB representative data may have values less than zero and/or greater than 1, or normalized values outside of the zero to 1 range. The processing then continues by mixing the RGB representative data and the expanded RGB data to produce resulting RGB data, which has a similar format as both the expanded RGB data and the RGB representative data.

Abstract: A method and system for protecting a multipurpose data string used for both decrypting data and for authenticating a user utilizes a remote storage element that contains a long random data string or password protected by a short easy to remember access data, such as a personal identification number or other user authentication mechanism. The remote storage element contains data used for both initially encrypting secret private keys and for later decrypting the encrypted secret private keys, or other secret data, so they can be used to decrypt data transferred within a computer network, or be used for digitally signing data transferred within a computer network.

Abstract: A deceleration circuit is operatively coupled to a first and second voltage to reduce noise on each of the voltage lines. For example, one voltage may be a supply voltage and the other voltage may be at a ground potential. The deceleration circuit may be coupled, for example, to each circuit that need not operate at a maximum or high operational speed within an integrated circuit that has other circuits that require high speed operation.

Abstract: A method and apparatus for generating generic programming instructions using visual programming begins by providing a plurality of logical states that are interdependently related and include a set of programming options. When a programming option is selected, out of the set of programming options, for one of the plurality of logical states, the selected programming option is detected by a processing module. These programming options allow a user to change the characteristics of an image such as its color or brightness. Additionally, generic programming instructions corresponding to the selected programming option are provided to the user. The generic programming instructions are source code that is generated when a programming option is selected. With such a method and apparatus, generic programming instructions can be generated using visual programming that provides a set number of linked programming language blocks for use in video graphics processing.

Abstract: A method and apparatus for creating communities of trust within a secure communications system is accomplished by allowing end-users to obtain arbitrary lists of trusted public keys from other end-users and from associated authorities. Once an arbitrary list has been obtained by an end-user, the end-user determines whether it was obtained in a manner consistent with a security policy of the secured community. The security policy may enable an end-user to receive trusted public keys from other end-users, from associated authorities only, to receive public keys of associated authorities, other end users, or any combination thereof. When the arbitrary lists of trusted keys are obtained in a manner consistent with the security policy, the end-user adds keys of the arbitrary lists to a trusted key list. When a security-related operation is to be performed (e.g.

Abstract: A method and apparatus for extending an on-chip processing device's access to memory are accomplished by depositing a processing circuit, memory, and configuration circuitry on a die. When the memory has sufficient digital storage capabilities for the processing circuit, the configuration circuitry directly couples an address bus and data bus between the memory and the processing device. When the memory does not have sufficient digital storage capabilities for the processing circuit, the configuration circuitry reconfigures the memory. In additional, the configuration circuitry extends the address bus to an external memory and combines the internal data bus with an external data bus. Configured in this manner, the processing device can access both the on-chip memory and the external memory as a single addressable memory, thereby increasing the memory available to the processing circuit.

Abstract: A method and apparatus for storing and displaying multiple graphical images in a mixed video and graphics display is accomplished by determining an amount of memory sufficient to display a single graphics image in a subset of the display. Once the amount of memory required for a single image is determined, the pre-allocated portion of memory for graphics images is divided into an array. Graphics images are then rendered and stored within this array. One of the pre-rendered images is selected by a control block, wherein the selection is based on registers or parameters referenced by the control block. A display output engine fetches the selected one of the plurality of pre-rendered graphics images that is stored within the array and combines the selected graphics image with the video data stream to produce a display output stream. The display output stream is then fed to a display device that displays the graphics image.

Abstract: A computer network security system and method utilizes digitally signed and centrally assigned policy data, such as password length rules, that is unilaterally enforced at network nodes by node policy enforcement engines. The policy data may be variable on a per client or network node basis through a centralized authority, such as a certification authority. The computer network security system provides variable security policy rule data for distribution to at least one network node through a central security policy rule data distribution source, such as the certification authority. The central security policy rule data distribution source associates a digital signature to the variable security policy rule data to ensure the integrity of the policies in the system. Each network node uses a policy rule data engine and policy rule table to decode policy rule data and enforce the policy rules as selectively determined through the central authority.

Abstract: A method and apparatus for sequencing texture updates in a video graphics system is accomplished by storing a first portion of graphics data in a first position of a bus master buffer, where the first portion of the graphics data utilizes a texture. An indication of a texture update is then received, where the texture update, when performed, modifies the texture to produce an updated texture that is used by subsequent graphics data. The updated texture is stored in a second position of the bus master buffer. A second portion of the graphics data, which utilizes the updated texture, is then stored in a third position of the bus master buffer. The data in the bus master buffer is then accessed through a direct memory access transfer initiated by the graphics processor in the system. The bus master buffer data is accessed in a sequential manner, which ensures that the texture update does not occur until after the graphics data utilizing the original texture has been drawn.

Abstract: A method and apparatus for providing video graphics processing that includes anti-aliasing begins when a video graphics processor receives vertex parameters of an object-element and walks a first edge of the object element and a second edge of the object element. The video graphics processor walks the first and second edges based on calculations involving a decision corner and an error turn. The calculations indicate which direction to walk on a pixel by pixel basis, i.e., whether the walking should be in the major direction or the minor direction. The calculations also identify pixels that contain fragment pixel information, i.e., the pixels along the edges of the object element. For each fragment pixel, subpixel masks are created for each object element that is present in the fragmented pixel. From the subpixel masks, subpixel sequences are determined, which are used to produce pixel information of the fragment pixel.

Abstract: A method and apparatus for providing very small changes in the output oscillation of a controlled oscillation circuit, which may be used in a phase locked loop circuit, is accomplished by a phase-shifting controlled oscillator that includes an oscillation circuit and a selection circuit. The oscillation circuit generates a plurality of oscillations that are of approximately the same frequency and are approximately equally phase shifted from one another. The selection circuit is operably coupled to receive the plurality of oscillations and selects one of them to be the output oscillation based on a control signal. The very small change in the output oscillation occurs when the selection circuit, based on the control signal, selects another one of the oscillations to be the output oscillation. When the change happens, a single pulse is stretched by the phase difference between the “old” output oscillation and the “new” output oscillation.

Abstract: A method and apparatus for improved concurrency within a video graphics process by generating culling information from geometry information. The geometry information corresponds to an image to be rendered, and the culling information indicates the triangles of the objects of the image that are in a front-facing or back-facing position. Having generated the culling information, set-up information is generated therefrom. The set-up information provides rendering data for the triangles of the object of the image being rendered. Next, pixel data is generated for a triangle based on the set-up information. To improve the concurrency, the queuing and the retrieval of the culling information and the set-up information from non-local memory are controlled such that the generating of the culling information, the set-up information, and the pixel data is done with improved concurrency.

Abstract: A system and method for providing channel balancing and room tuning for a multi-channel audio surround sound speaker system passes source audio to automatically configured multi-channel compensation filters to provide equalization on a per channel basis for speakers having differing response characteristics. The speakers correspond to each of the surround sound channels. To automatically configure the multi-channel compensation filters, a controller generates common room tuning deviation data based on the frequency response characteristic data of each of the speakers. In addition, the system and method also generates room corrected channel deviation data for each channel by correcting a selected speaker response based on room tuning compensation requirement data derived from the common room tuning deviation data. Automatic channel balancing is provided by determining channel balancing compensation requirement data based on the corrected channel deviation data for each channel.

Abstract: A method and apparatus for approximating exponential and other nonlinear functions in a graphics system is accomplished using a linear interpolator adapted to receive a graphics primitive that includes vertex values for a parameter at each vertex of the graphics primitive. The linear interpolator determines a linear interpolation value for the parameter at a selected pixel within the primitive based on the vertex values. The linear interpolation value is then used to generate a first index and a fractional value, where the fractional value is the difference between the linear interpolation value and the first index. The first index is then incremented to produce a second index. The first and second indexes are then applied to a memory block that stores a discrete sampling of a nonlinear function corresponding to the parameter.

Abstract: A first trusted authority, such as an originating certification authority, that stores key history data, such as private decryption keys for one or more subscribers, includes a key history exportation engine operative to generate a security key history exportation packet. The security key history exportation packet contains at least encrypted security key history data uniquely associated with a subscriber. A second trusted authority, such as a destination certification authority, includes a security key history importation engine operative to decrypt the security key history exportation packet. The retrieved security key history data then is stored and made accessible through the second trust authority for later access by the subscriber. The second trusted authority serves as a new trust anchor instead of the first trust authority.

Abstract: A method and apparatus for antialiasing in a video graphics system is accomplished by determining if a pixel sample set, which results from oversampling, can be reduced to a compressed sample set, where the compressed sample set contains information describing a corresponding pixel. When the pixel sample set can be reduced to a compressed sample set, the compressed sample set is stored in a frame buffer at a location corresponding to the particular pixel that the sample set describes. When the pixel sample set cannot be reduced to a compressed sample set, a pointer is stored at the frame buffer location corresponding to the particular pixel. The pointer points to a selected address in a sample memory at which the complete sample set for the pixel is stored.

Abstract: A method and apparatus performing setup operations in a video graphics system is accomplished by receiving a stream of primitives and determining if each primitive in the stream has a parameter that exceeds the calculation range of a fast multiplier. If it is determined that the primitive exceeds the capabilities of the fast multiplier, the calculations for the primitive are routed to a setup engine that includes a full-size multiplier, and the calculations of setup parameters are performed by the full-size multiplier. If it is determined that the calculations are within the capabilities of the fast multiplier, the calculations for the primitive are routed to the setup engine that includes one or more fast multipliers, and the setup calculations are performed therein. The results of the two setup engines are combined to form a resultant stream that includes the parameter calculations required from display setup operations.

Abstract: A multiple pipeline memory controller has a plurality of two stage pipeline processors dedicated to separately process real time video capture and display refresh input request signals. A separate pipeline processor processes non-real time input signals. The multiple pipeline design reduces memory access latency and improves throughput of data in display FIFO memory to effect improved resolution. The multiple pipeline memory controller can be integrated in a video graphics controller (VGC).