Abstract: A system and method for determining operating parameters to control a communication rate for an adaptive rate communication system includes a transmitter (101) to transmit a signal (135) through a network (142) to a receiver (103). The receiver (103) determines operating parameters based on, among other things, packet information from a received signal (e.g., packet). The receiver conveys the operating parameters to the transmitter for use in subsequent communications from the transmitter (101) to the receiver (103).

Abstract: A multiple access and data channel scheme is presented for reducing network communication collisions and susceptibility to jamming signals in a distributed network to increase network connectivity and communication throughput. An order wire channel (202) is used to gain access to a data channel (204). To gain access to the data channel (204), a source radio sends a transmit probe (TXP) over the order wire channel (202) to the target radio. The target radio senses its environment and responds with a receive probe (RXP) which comprises data channel transmission parameters including the data channel frequency, transmit power, spread code, and transit timing to be used for the data transmission. Source radio moves to the data channel using the data channel transmission parameters specified by the receive probe (RXP) to communicate with the target radio. If a collision occurs of the order wire channel (202), the source radio retransmits the transmit probe after a random time period.

Abstract: A bridging apparatus (10) for use in bridging a plurality of external communications networks (20a-20n) includes a plurality of network interfaces (12) and a bridge (14). The individual interfaces within the plurality of network interfaces (12) are each capable of converting signals between a signal format used by an associated external communications network and a common signal format supported by the bridge (14). The bridge (14) establishes at least one bridge connection between network interfaces according to a predetermined bridging function. The bridge (14) includes a digital processor having an associated memory for storing one or more bridging programs. The digital processor executes at least one of the bridging programs in order to implement the desired bridging function.

Abstract: A pipelined programmable digital pulse delay system (10) that is capable of processing multiple input pulses simultaneously, each with a unique programmed delay value, includes a plurality of pulse delay units (12, 14, 16), a plurality of buffer registers (18, 20, 22, 24), and a commutator unit 26. The buffer registers (18, 20, 22, 24) each store a delay control word corresponding to a single pulse currently being processed in the system (10). The plurality of pulse delay units (12, 14, 16) each reference a corresponding buffer register (18, 20, 22, 24) for an appropriate delay control value when a particular pulse is about to be received by the pulse delay unit. After the pulse has passed an operative point in the pulse delay unit, the unit then retrieves a delay control value from another buffer register (18, 20, 22, 24) for use with a next input pulse. Thus, pipelined operation is achieved in the system (10).

Abstract: A TCS (200) and procedure (400) for identifying an unidentified class as a class of a group of classes includes a new tree-structured classifier (208) and training processor (204). Unidentified feature vectors representing an unidentified class are combined with predetermined models to compute a score for each of the unidentified feature vectors. Based on the scores for each of the unidentified feature vectors, an association is made with the predetermined models to identify the unidentified class. Predetermined models are created using a training procedure (300) for predetermined feature vectors associated therewith. A procedure (400) for identifying an unidentified class as a class of a group of classes is useful when determining access privileges to a device or system.

Abstract: A non-linear signal classifier (26) includes a polynomial expansion unit for expanding signal feature vectors determined by a feature extraction unit (25) for a received signal. The expanded signal feature vectors are each combined with a plurality of signal classification models that are stored in a model memory (76). The signal classification models are each associated with a particular signal type that is recognized by the non-linear signal classifier. A scoring unit (72) generates a score for each of the signal classification models based on the result of the combination. The scores are analyzed by a selection unit (74) which determines which of the signal classification models (i.e., which of the signal types) most likely represents the received signal. Training equipment (60) is also provided for training the non-linear signal classifier (26) to recognize new signal types.

Abstract: A secure communication hub (10) relays local communications between low probability of intercept (LPI) user radio equipment (68) and provides a secure interface with a command center (58) through a non-geostationary commercial satellite communication system. The secure communication hub (10) includes different radio interface units (12) for communicating different data formats with the (LPI) user radio equipment (68). Encryption and decryption circuitry (18) provides for different security levels and different keys for the (LPI) user radio equipment. Links with the satellite system are secured using encryption.

Abstract: A system for encrypting and verifying a data packet includes an encryptor (20), a decryptor (30), an error detector (40), and switch (65). A data packet with embedded error detection codes is encrypted by the encryptor (20), decrypted by the decryptor (30), and then the error detector (40) examines the embedded error detection codes to determine if the data packet has had errors introduced during the encryption/decryption process. When errors are detected, the switch (65) is opened to keep erroneous data from being transmitted.

Abstract: A processor (22) of an encryption system (20) receives plain text (24) and operates an encryption algorithm to convert the plain text (24) to cipher text (26). A state monitor (30) confirms a conversion sequence within each of a plurality of conversion cycles performed by the encryption algorithm. The state monitor (30) produces a first enablement signal (38) when the conversion sequence is confirmed. An encryption activity monitor (34) determines a number of blocks of cipher text (24) that are not encrypted. The encryption activity monitor (34) produces a second enablement signal (42) when the number of unencrypted blocks of cipher text (26) is less than a predetermined failure threshold (86). A monitor gate (36) enables output of the cipher text (26) in response to the first and second enablement signals (38, 42).

Abstract: System efficiently communicates a perceptually encoded speech spectrum signal from a transmitter to a receiver. The transmitter includes a speech analyzer which accepts a speech signal input and generates a parameterized speech signal. The transmitter also includes a vector quantizer for generating the perceptually encoded speech spectrum signal from the parameterized speech signal. The receiver decodes the perceptually encoded speech spectrum signal to produce decoded spectral parameters to further produce a synthetic speech output. The vector quantizer performs a method for partitioning a vector quantizer (VQ) codebook to produce perceptually organized sub-codebooks. The vector quantizer performs a second method for quantizing a vector based on the perceptually organized sub-codebooks. The second method identifies a vector, from one of the perceptually organized sub-codebooks, to perceptually model the speech signal input.

Abstract: The surface area of a polysilicon electrode is increased by sputtering non-coalescing islands (20) of aluminum onto a silicon dioxide layer (18), which is overlying the polysilicon electrode. The sputtering process allows uniform island formation to be achieved independent of the deposition surface. The non-coalescing islands are then used as a mask, and a portion of the buffer layer (22) and a portion of the polysilicon electrode (26) are etched to form pillar-like regions (30) within the polysilicon electrode.

Abstract: Defect-free field oxide isolation (34) is formed by oxidizing through a silicon nitride layer (30) which overlies the isolation regions (22) of the silicon substrate (12). Additionally, the silicon nitride layer (30) acts as a diffusion barrier during field growth, and thus inhibits the lateral diffusion of oxygen underneath the oxidation mask (18). Therefore, field oxide encroachment into the adjacent active regions is effectively reduced. Moreover, field oxide encroachment is also reproducibly controlled, and therefore integrated circuits with high device packing densities can be fabricated.

Abstract: A digital-to-analog converter (20) includes a linear interpolator (24) and a converter (25, 26) such as a sigma-delta modulator (25) and an associated analog summing network (26). The linear interpolator (24) includes a differentiator (200), an integrator (202), and a multiplexer (201). The differentiator (200) differentiates a received signal at a first rate. The multiplexer (201) multiplexes an output of the differentiator (200) to provide a multiplexed signal having a larger number of bits than the received signal in order to support multiple interpolating ratios. The integrator (202) integrates the multiplexed signal at a second rate to present to the converter (25, 26). By connecting the multiplexer (201) between the differentiator (200) and the integrator (202), the digital-to-analog converter (20) minimizes the size of the linear interpolator (24) while relieving a critical path between the linear interpolator (24) and the converter (25, 26).

Abstract: A BICMOS memory performs address transition detection on each address signal. A first ECL difference amplifier detects a low-to-high transition with a first input being the address signal, and a second input being the address signal delayed and level-shifted. A second ECL difference amplifier uses a complement of the first and second inputs to detect a high-to-low transition. The outputs of two corresponding ECL difference amplifiers for each address signal are wire-ORed together to form the address transition detection signal, which is delayed for first, second, and third predetermined times to sequentially perform row predecoding, row decoding, and block decoding, respectively. The decoding is performed by logic circuits using modified Widlar current sources, which decrease the current required except during decoding, as indicated by a corresponding address transition detection signal. The saving in current allows faster ECL circuits to be used and decreases peak current on internal power supply lines.

Abstract: A variable field effect capacitive device suitable for providing different amounts of capacitance in response to control signals of different magnitudes. The device includes a pair of plate electrodes and a pair of control electrodes. A semiconductor region is located between the control electrodes. The plates each make Schottky contact to the semiconductor region to form a depletion region therein which changes shape in response to changes in the magnitude of the control signals.

Abstract: A method for ensuring CRC error generation by a data communication station after a transmitter exception such as an underrun whereby a parity bit is preset to a binary one, and toggled in response to successive binary ones of a serial bit stream. Each byte of the serial bit stream is transmitted sequentially. If a transmitter exception occurs, the byte before the exception is transmitted normally. However, only the first seven bits of the last byte are transmitted. The parity bit is sent as an eighth bit of the last byte, ensuring odd parity for the previous bit stream. Thereafter, a byte even parity is sent to assure that the overall message has odd parity. A receiving station interprets two consecutive bytes having the predetermined data pattern as the CRC, thus ensuring that the receiving station will reject the frame.

Abstract: A Telemetry, Tracking and Control (TT&C) system for a satellite cellular communication system utilizing one of the user voice/data communication channels to communicate TT&C data with a satellite and through one satellite to other satellites. A Global Positioning Receiver (GPS) on board each satellite provides position control signals to the on board satellite control subsystem and the GPS receiver communicates ephemeris information to a ground station through the cellular user data channel. The system allows for constant TT&C communication to and from a mobile ground station and to and from any satellite.

Abstract: An electrolyte dispensing ampule for deferred action batteries comprises a spring having means at both ends thereof for forming a closed, generally cylindrical space inside the spring and a metal layer covering the spring to hermetically seal the space. An electrolyte solution is contained in the spring and is dispersed to activate the battery when set-back forces extend the spring and break the sealing layer.

Abstract: The synthesizer includes an output PLL having a divide-by-N1 divider in its feedback loop. The output PLL is couples through frequency offset circuitry to receive a reference signal from a driver PLL having a divide-by-N2 divider in its feedback loop. Another divide-by-N1 divider coupled a reference oscillator to the driver PLL. The reference oscillator provides another reference signal. As a result, the setting for N1 controls the course frequency tuning and the setting for N2 controls the fine frequency tuning of the synthesizer which provides any one of a plurality of selectable predetermined output frequencies. The adjacent selectable frequencies are closer together than the frequencies of the reference signals. The synthesizer has a simple configuration and provides a high degree of output frequency resolution, fast acquisition and low noise.