Patents Represented by Attorney Mayer Brown Rowe & Maw LLP
  • Patent number: 7188099
    Abstract: A texture-based image database browsing and sorting method computes the number of edge pixels of objects in static images, measures textures of the static images by numerating the number of edge pixels thereof and measures a texture of a query image by numerating the number of edge pixels of an object in the query image. Then, the method sorts the measured textures according to a sorting order and searches a texture close to the texture of the query image among the sorted textures.
    Type: Grant
    Filed: November 29, 2001
    Date of Patent: March 6, 2007
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Kyu Heon Kim, Se Yoon Jeong, Jae Yeon Lee, Young Lae Bae, Byung Tea Chun
  • Patent number: 7185638
    Abstract: In a fuel tank (1), a condensate collector (13) of a venting line (12) with a closure lid (6) forms one structural unit. The closure lid (6) closes off an opening (7) in a wall (8) in the fuel tank (1). The condensate collector (13) has spring elements (17) for prestressing elastic venting lines (15) against the inside of the fuel tank (1) and the venting device (12) can be mounted through the opening (7) in the fuel tank (1).
    Type: Grant
    Filed: August 2, 2004
    Date of Patent: March 6, 2007
    Assignee: Siemens Aktiengessellschaft
    Inventors: Christian Krogull, Frank Reiter
  • Patent number: 7183174
    Abstract: A flash memory device and method of manufacturing the same. The flash memory device includes a semiconductor substrate in which a first region where a cell region is formed, a second region where a peripheral region is formed, and a third region formed in the peripheral region at the boundary portion of the cell region and the peripheral region. The device also includes a triple well region formed in the first region and a predetermined region of the third region, an isolation film formed in the first region and having a first depth, an isolation film formed in the second region and having a second depth, which is deeper than the first depth of the isolation film, and a gate oxide film for low voltage and a floating gate, which are stacked on a predetermined region of the first region, a gate oxide film and a gate, which are stacked on a predetermined region of the second region.
    Type: Grant
    Filed: June 30, 2005
    Date of Patent: February 27, 2007
    Assignee: Hynix Semiconductor Inc.
    Inventor: Sung Kee Park
  • Patent number: 7183056
    Abstract: The present invention is directed to an improved multiplex PCR method for obtaining at least two PCR products from one PCR solution. In the multiplex PCR method for having at least two DNA amplified products from a sample positioned in a PCR equipment, the object of the present invention is to provide a novel multiplex PCR method characterized in that a primer annealing temperature and an extension time be changed per cycle with constant periods. When a multiplex PCR is performed in accordance with the present invention, limitations in determining PCR conditions due to a various sizes of PCR products or dimers caused by primers can be eliminated, and time and efforts required for determining the PCR conditions to various samples can also be reduced. Further, not only refined DNAs like cDNA, genomic DNA, vector, etc, but blood can be directly used as a multiplex PCR sample, and PCR amplification reaction can be performed even with a sample having the smallest amounts.
    Type: Grant
    Filed: October 31, 2003
    Date of Patent: February 27, 2007
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Se Ho Park, Hae Sik Yang, Dae Sik Lee, Yong Beom Shin, Kyu Won Kim, Tae Hwan Yoon, Sung Jin Kim, Yun Tae Kim
  • Patent number: 7184409
    Abstract: A blind rate detection method in an asynchronous mobile communication system comprises: restoring data when a path selection (PS) value at a last bit's possible position satisfies a PS condition; determining whether a SER satisfies a SER condition when no error occurs in a CRC; determining whether to update a minimum value of PS values when the SER satisfies the SER condition; setting a PS value of the last bit's possible position as the minimum value of the PS values and the last bit's possible position as a last detection position when updating the minimum value; and repeating the above steps until the last bit's possible position reaches a maximum value, and outputting the last detection position when the last bit's possible position becomes the maximum value.
    Type: Grant
    Filed: April 29, 2002
    Date of Patent: February 27, 2007
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Yong-Su Lee, Youn-Ok Park, Seung-Chan Bang, Eui-Hoon Jeong, Ik-Soo Jin
  • Patent number: 7184101
    Abstract: A video processing system includes input and output address generators. The address generators are capable of generating linear addresses associated with data to be read from and written to a device. The linear address is converted to a random address so that data associated with a macroblock may be read from the device and written to the device.
    Type: Grant
    Filed: July 25, 2002
    Date of Patent: February 27, 2007
    Assignee: Micronas USA, Inc.
    Inventors: Shuhua Xiang, Hongjun Yuan, Sha Li
  • Patent number: 7183882
    Abstract: The present invention relates to a microstrip band pass filter and, more specifically, to a microstrip band pass filter using end-coupled stepped impedance resonators that can be used in a millimeter wave band, wherein the microstrip band pass filter comprises: a dielectric substrate; a conductor plate located on a lower surface of the dielectric substrate; and an input terminal, a plurality of SIRs and an output terminal located on an upper surface of the dielectric substrate in series, wherein the input terminal, the plurality of SIRs and the outputs terminal are conductors and end-coupled through gaps, whereby the microstrip band pass filter has a good attenuation characteristic and a narrowband characteristic, and is insensitive to the manufacturing error, and a fine frequency transition can be made without distortion just with width adjustment of the low impedance transmission line of the SIR.
    Type: Grant
    Filed: August 17, 2004
    Date of Patent: February 27, 2007
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Kyoung Suk Ko, Dong Suk Jun, Dong Young Kim, Hong Yeol Lee, Sang Seok Lee
  • Patent number: 7183149
    Abstract: Provided is a method of manufacturing a field effect transistor (FET).
    Type: Grant
    Filed: July 14, 2005
    Date of Patent: February 27, 2007
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Ho Kyun Ahn, Jong Won Lim, Hong Gu Ji, Woo Jin Chang, Jae Kyoung Mun, Hae Cheon Kim
  • Patent number: 7184941
    Abstract: The invention relates to a boundary smoothing method of a geometrical figure using a terminal in which a smoothing operation on the boundary of the given geometrical figure is defined using sweep and unsweep operation in a process for processing the boundary of the geometrical figure using CAD system or graphic tool, thereby computing and processing the boundary at a high speed with good performance the present invention provides a boundary smoothing method of a geometrical figure that is an important geometry operation, using a terminal. The boundaries of the geometrical figure are smoothed by using the sweep and unsweep operation without a complicated mathematical operation on the boundaries of the geometrical figure, and without being subject to a step of removing a self-cross or intercross. This method allows a user to designate and control an application region of the smoothing operation and a smoothing degree. Also, the method of the present invention can be easily realized by software.
    Type: Grant
    Filed: March 11, 2002
    Date of Patent: February 27, 2007
    Assignee: Electronics and Telecommunications Research Institute
    Inventor: Joo Haeng Lee
  • Patent number: 7184331
    Abstract: A semiconductor memory device including a fuse control circuit for providing with a plurality of fail word line addresses written in its own circuit in advance and outputting a redundancy signal representing that an input address is the same as one of the fail word line addresses, and a normal word line interruption signal, a redundancy word line controller for inputting the redundancy signal and activating a designated redundancy word line; and a normal word line controller, for activating a word line corresponding to the input word line address, which is operated or interrupted in response to the normal word line interruption signal, wherein the normal word line interruption signal has a first logic state (logic low) at a pre-charge interval or when a same address as one of the fail word line addresses is inputted, and has a second logic state (logic high) when a normal address is inputted, and the redundancy signal has a first logic state (logic low) when a same address as one of the fail word line address
    Type: Grant
    Filed: June 30, 2005
    Date of Patent: February 27, 2007
    Assignee: Hynix Semiconductor Inc.
    Inventors: Yong-Kyu Kim, Sang-Hee Kang
  • Patent number: 7183151
    Abstract: Provided is a method for fabricating a filed effect transistor, the method comprising: depositing a first semiconductor layer and a second semiconductor layer on a substrate in sequence, which have a different bandgap from each other, and patterning the second semiconductor layer to have a mesa structure; forming a first resist pattern to expose the second semiconductor layer of a region where source and drain are to be formed; depositing a metal on a whole upper surface, and forming metallic source and drain by performing a lift-off process; performing heat treatment to form an ohmic contact between the source and the second semiconductor layer, and between the drain and the semiconductor layer; forming an insulating layer on the whole upper surface including the source and the drain, and forming a second photoresist pattern to expose the insulating layer at a portion where a gate is to be formed; exposing the second semiconductor layer at the portion where the gate is to be formed by etching the exposed por
    Type: Grant
    Filed: August 17, 2004
    Date of Patent: February 27, 2007
    Assignee: Electronics and Telecommunications Research Institute
    Inventor: Mi Ran Park
  • Patent number: 7184420
    Abstract: A method for dynamically locating a wireless TCP proxy in a routing path in a wired/wireless integrated network is provided. A proxy for a mobile host transmits a proxy change request to a first higher-level proxy if a mobility of the mobile host is larger than a mobility threshold that is preset in the proxy. The first higher-level proxy determines whether the mobility of the mobile host is larger than a mobility threshold that is preset in the first higher-level proxy. The first higher-level proxy transmits a proxy change request packet to a second higher-level proxy if the mobility of the mobile host is larger than the mobility threshold of the first higher-level proxy. The second higher-level proxy selectively permits the proxy change if the mobility of the mobile host is smaller than the mobility threshold of the second higher-level proxy.
    Type: Grant
    Filed: March 18, 2002
    Date of Patent: February 27, 2007
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Jiyeon Son, Ji Eun Kim, Jun Seok Park, Dong Won Han, Chae Kyu Kim
  • Patent number: 7178511
    Abstract: In an apparatus (12) for controlling a pressure in a fuel inflow line of a motor vehicle, a shutoff valve (20) and a pressure limiting valve (21) are arranged in a connection (19). The connection (19) is arranged between an inflow junction (16) which leads to the inflow line and an outflow junction (17) which is led into a fuel container. The pressure limiting valve (21) opens above a first pressure and throttles the flow of the fuel through the connection (19). The shutoff valve (20) closes above a second pressure, the second pressure being higher than the first pressure. This ensures that, when a fuel delivery unit is at a standstill, the pressure in the inflow line does not exceed the first pressure and that, during operation of the delivery unit, the pressure in the inflow line can rise above the second pressure and an internal combustion engine of the motor vehicle is supplied sufficiently with fuel.
    Type: Grant
    Filed: January 20, 2005
    Date of Patent: February 20, 2007
    Assignee: Siemens Aktiengesellschaft
    Inventors: Lothar Dickenscheid, Bernd Herzog
  • Patent number: 7179744
    Abstract: A method for fabricating a semiconductor device includes the steps of: (a) forming a plurality of conductive patterns on a substrate in a cell region and a peripheral circuit region; (b) forming an insulation layer on an entire surface of the resulting structure from the step. (a); (c) forming a plurality of plugs in the cell region and simultaneously forming a dummy pattern in a region between the cell region and the peripheral circuit region, each plug and the dummy pattern being contacted to the substrate allocated between the conductive patterns by passing through the insulation layer; (d) forming a photoresist pattern masking the resulting structure in the cell region; and (e) removing the insulation layer in the peripheral circuit region by performing a wet etching process with use of the photoresist pattern as an etch mask to thereby expose a surface of the substrate in the peripheral circuit region.
    Type: Grant
    Filed: July 11, 2003
    Date of Patent: February 20, 2007
    Assignee: Hynix Semiconductor Inc.
    Inventors: Sung-Kwon Lee, Min-Suk Lee, Sang-Ik Kim
  • Patent number: 7176615
    Abstract: A field emission device including a cathode having an electric field emitter for emitting electrons, a field emission inducing gate for inducing electron emission, and an anode for receiving the emitted electrons. A field emission suppressing gate is interposed between the cathode and the field emission inducing gate for suppressing electron emission, so that problems such as gate leakage current, electron emission due to anode voltage, and electron beam spreading of the conventional field emission device are significantly overcome.
    Type: Grant
    Filed: August 24, 2004
    Date of Patent: February 13, 2007
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Yoon Ho Song, Chi Sun Hwang, Kwang Bok Kim
  • Patent number: 7176101
    Abstract: A method is provided in which a first oxide layer is deposited on a silicon substrate and etched to form openings. A first silicon epitaxial layer is grown on the substrate in the openings, forming first active regions, a second oxide layer is deposited thereon, and the first and second oxide layers are etched such that the first oxide layer is wholly removed and the second oxide layer remains only on the first silicon epitaxial layer. A third oxide layer is thermally grown on entire resultant surfaces and then blanket-etched to remain only on sidewalls of the first silicon epitaxial layer. A second silicon epitaxial layer is grown on the exposed substrate between the first active regions, thus forming second active regions. The second oxide layer remaining on the first silicon epitaxial layer is removed. The first and second active regions are separated and electrically isolated by the third oxide layer.
    Type: Grant
    Filed: December 30, 2005
    Date of Patent: February 13, 2007
    Assignee: Dongbu Electronics
    Inventor: Hyuk Woo
  • Patent number: 7177345
    Abstract: A demodulator of a W-CDMA base station comprises: a chip calculator for de-spreading signals received through sectors including antennas; a symbol calculator for using symbols of a control channel and a data channel from the de-spread signals, estimating a channel, and combining signals input through a multi-path; a frame calculator for combining the combined signals to perform transport format combination indicator decoding, feedback information decoding, frame sync estimation, SNR estimation, post-combining, and second de-interleaving; a storage unit for storing outputs of the chip calculator, symbol calculator, and frame calculator; a storage unit controller for controlling inputs/outputs between the chip calculator, symbol calculator, frame calculator, and storage unit; and a host interface for controlling inputs/outputs between the chip calculator, symbol calculator, frame calculator, and host.
    Type: Grant
    Filed: May 20, 2002
    Date of Patent: February 13, 2007
    Assignee: Electronics and Telecommunication Research Institute
    Inventor: Kwang Soon Kim
  • Patent number: 7177204
    Abstract: It is capable of adjusting the pulse width regardless of an amount of delay in a delaying part by controlling pulse width of an output signal based on an externally provided control signal. A pulse width adjusting circuit for use in a semiconductor memory device comprises a unit operable at least partially by a pulse width control signal that is provided externally. The unit has an ability of adjusting pulse width of an output signal by using the pulse width control signal in test mode of the semiconductor memory device.
    Type: Grant
    Filed: June 24, 2004
    Date of Patent: February 13, 2007
    Assignee: Hynix Semiconductor Inc.
    Inventor: Ji-Hyun Kim
  • Patent number: 7175272
    Abstract: Disclosed herein is a spectacles and sunshade clip assembly using magnets. The magnets serve to detachably attach the sunshade clip to the spectacles. The spectacles comprises a pair of lens frames connected to each other by means of a nose bridge, and temple arms connected, respectively, to the lens frames by means of magnetically-induced hinges. The sunshade clip comprises a pair of sunshade lenses formed by cutting a colored plastic plate into a desired lens form, and a sunshade bridge formed by injection molding and adapted to connect the sunshade lenses to each other. Two magnet ribs are coupled to opposite outer ends of the sunshade lenses to extend in opposite directions. Each of the magnet ribs is configured to substantially coincide with the outer contour of the hinge provided at the spectacles and has a magnet mounted to face the hinge.
    Type: Grant
    Filed: February 18, 2005
    Date of Patent: February 13, 2007
    Assignee: Suk-Jae Lee et al.
    Inventors: Suk-Jae Lee, Ju-Jae Lee, Hyun-Jun Lee, Sung-Jun Lee
  • Patent number: 7172959
    Abstract: A method for forming a dual damascene interconnection in a semiconductor device. An etch stop film and an intermetal insulating film are formed sequentially on a lower metal film. A via hole is formed to expose a portion of a surface of the etch stop film through the intermetal insulating film. A sacrificial film is formed to fill the via hole. Portions of the intermetal insulating film and the sacrificial film are removed to form a trench. The sacrificial film is removed to expose the portion of the surface of the etch stop film. A plasma etching process is performed at a predetermined temperature using an etching gas to remove the exposed portion of the etch stop film and to prevent or suppress generation of a polymer. A diffusion barrier film is formed within the trench and the via hole such that the diffusion barrier contacts the lower metal film. An upper metal film is formed on the diffusion barrier.
    Type: Grant
    Filed: December 30, 2004
    Date of Patent: February 6, 2007
    Assignee: Dongbu Electronics
    Inventor: Kang-Hyun Lee