Patents Represented by Attorney, Agent or Law Firm McDermott, Will & Emery
  • Patent number: 8343776
    Abstract: Provided is an immunoassay method that can reduce the effort of establishing an immunoassay system due to not needing two or more antibodies, and that is applicable to not only high molecular weight antigens but also to low molecular weight antigens such as hapten. The method is for releasing, from a surface of a base plate, immunoglobulin G antibody bound to the surface via protein A. The method includes the following steps (A) and (B): (A) a step of preparing the base plate having the surface to which immunoglobulin G antibody produced by a producer cell line of deposit No. FERM BP-10459 is bound via protein A; and (B) a step of providing a solution (from pH 6 to pH 8.9; preferably, from pH 7.4 to pH 8.9) containing human serum albumin onto the surface so as to release the immunoglobulin G antibody from the protein A.
    Type: Grant
    Filed: August 31, 2011
    Date of Patent: January 1, 2013
    Assignee: Panasonic Corporation
    Inventors: Junko Wakai, Akihito Kamei, Jin Muraoka
  • Patent number: 8344852
    Abstract: A method for transmitting a plurality of notifications in a notification pool includes determining a first notification batch having the plurality of notifications, and assigning a priority weight to each of the plurality of notifications, at least two of the priority weights being different. The method further includes inserting the first notification batch into the notification pool, and transmitting the plurality of notifications in the notification pool sequentially, based on the priority weights of the plurality of notifications. A system for transmitting a plurality of notifications is also provided.
    Type: Grant
    Filed: June 8, 2009
    Date of Patent: January 1, 2013
    Assignee: Blackboard Connect Inc.
    Inventor: Joshua Roth
  • Patent number: 8345233
    Abstract: A defect inspection apparatus emits light to a test object, detects reflected of scattered light from the test object and detects a defect in the test object The apparatus comprises a temperature-controlled part accommodating section that accommodates parts having a need for controlling a temperature, which is out of a plurality of parts in the defect inspection apparatus. A first temperature measuring instrument measures a temperature in the temperature-controlled part accommodating section; and a temperature control unit controls a temperature of the interior of the temperature-controlled part accommodating section at a prescribed temperature according to the temperature measured by the first temperature measuring instrument. Accordingly, a defect inspection apparatus can efficiently perform temperature control without involving an enlarged size can be achieved.
    Type: Grant
    Filed: December 6, 2011
    Date of Patent: January 1, 2013
    Assignee: Hitachi High-Technologies Corporation
    Inventors: Tadashi Suga, Shuichi Chikamatsu, Masayuki Ochi, Takahiko Suzuki, Seiji Otani
  • Patent number: 8344696
    Abstract: A charging signal Vi responding to a charging current is inputted to one input terminal (?) of an operational amplifier 95 forming a comparator and a setting signal Vr corresponding to a setting current value is inputted to the other input terminal (+) of the operational amplifier 95. When the charging signal Vi is not higher than the setting signal Vr, a charging stop signal is generated from the output terminal of the operational amplifier 95 to interrupt a switch unit 4. A starting signal Vcc larger than the setting signal Vr applied to the other input terminal (+) is applied to the one input terminal (?) of the operational amplifier 95 through a condenser 94 till a prescribed time elapses from the start of a charging operation to generate a charging start signal from the output terminal of the operational amplifier 95 and electrically conduct the switch unit 4.
    Type: Grant
    Filed: March 2, 2007
    Date of Patent: January 1, 2013
    Assignee: Hitachi Koko Co., Ltd.
    Inventors: Takao Aradachi, Kazuhiko Funabashi
  • Patent number: 8344426
    Abstract: A semiconductor device includes a plurality of first cells having a first cell height, and a plurality of second cells having a second cell height. Each of the first cells has a first MIS transistor of a first conductivity type, and a substrate contact region of a second conductivity type. Each of the second cells has a second MIS transistor of the first conductivity type, a power supply region of the first conductivity type, and a first extended region of the first conductivity type that is silicidated at a surface thereof. The first cell height is greater than the second cell height.
    Type: Grant
    Filed: December 22, 2010
    Date of Patent: January 1, 2013
    Assignee: Panasonic Corporation
    Inventors: Naoki Kotani, Tokuhiko Tamaki
  • Patent number: 8344427
    Abstract: The chip area of a semiconductor device having a plurality of standard cells is to be made smaller. A semiconductor device includes first and second standard cells. The first standard cell includes a diffusion region, a functional device region opposed to the diffusion region, and a metal layer. The second standard cell includes another diffusion region continuous with the diffusion region, another functional device region opposed to the other diffusion region, and further another diffusion region formed between the other diffusion region and the other functional device region. The metal layer and the other functional device region are coupled together electrically through the diffusion regions.
    Type: Grant
    Filed: July 31, 2012
    Date of Patent: January 1, 2013
    Assignee: Renesas Electronics Corporation
    Inventor: Hiroshi Omura
  • Patent number: 8344473
    Abstract: An isolation oxide film whose upper surface is higher than a surface of a substrate is formed in the substrate. A silicon oxide film is formed on the substrate between the isolation oxide films. A self-aligned polysilicon film is formed on the silicon oxide film between the isolation oxide films. After forming a resist pattern covering the peripheral circuitry, the isolation oxide films in the memory cell are etched by a predetermined thickness. An ONO film is formed on the entire surface of the substrate, a second resist pattern covering the memory cell is formed. Then, the ONO film, the polysilicon film 8 and the silicon oxide film 7 are removed from the peripheral circuitry.
    Type: Grant
    Filed: October 18, 2010
    Date of Patent: January 1, 2013
    Assignee: Renesas Electronics Corporation
    Inventor: Shu Shimizu
  • Patent number: 8344662
    Abstract: There is provided a light emitting diode (LED) driver removing signal interference by varying a switching frequency within a preset range. The LED driver includes a power supply section switching input power and supplying driving power to at least one LED; a switching control section controlling the switching of the power supply section according to a clock signal being supplied; and a clock signal generation section supplying the clock signal having a preset variable frequency range to the switching control section.
    Type: Grant
    Filed: September 20, 2010
    Date of Patent: January 1, 2013
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Bo Hyun Hwang, Jae Shin Lee, Jung Hyun Kim, Jung Sun Kwon, Seung Kon Kong
  • Patent number: 8344345
    Abstract: A first wire layer (19) including first memory wires (12) is connected to a second wire layer (20) including second memory wires (17) via first contacts (21) penetrating a first interlayer insulating layer (13). The first wire layer (13) is connected to and led out to upper wires (22) via second contacts (26) connected to the second wire layer (20) and penetrating the second interlayer insulating layer (18). The first contacts (21) penetrate semiconductor layer (17b) or insulator layer (17c) of the second wire layer (20).
    Type: Grant
    Filed: December 26, 2008
    Date of Patent: January 1, 2013
    Assignee: Panasonic Corporation
    Inventors: Takumi Mikawa, Yoshio Kawashima, Ryoko Miyanaga
  • Patent number: 8344940
    Abstract: Provided are a sensor capable of adjusting vertical alignment and a sensor vertical alignment adjusting apparatus using the same. The sensor has a structure with a plurality of switchable transmitting and receiving antennas so as to be able to adjust the vertical alignment, or a structure with a tilting motor for adjusting a radiating or receiving angle. The sensor vertical alignment adjusting apparatus using such a sensor corrects vertical misalignment of the sensor by determining whether or not the vertical misalignment of the sensor occurs, variably switching one from among the plurality of transmitting or receiving antennas of the sensor or controlling the tilting motor, and adjusting the radiating angle of the sensor signal or the receiving angle of a reflected wave of the sensor signal.
    Type: Grant
    Filed: January 22, 2010
    Date of Patent: January 1, 2013
    Assignee: Mando Corporation
    Inventor: Seong-hee Jeong
  • Patent number: 8342222
    Abstract: The invention concerns a method and apparatus for mounting a tire on a rim to form a motor vehicle wheel and for demounting a tire from a rim with at least one fitting or removal tool. Images of the wheel (14) or the rim (12) are created by a vision system (21) and corresponding signals are sent to a computer (18, 28). Commands to move the at least one fitting or removal tool (16) are sent to the at least one fitting or removal tool (16) by the computer (18, 30), the signals of the vision system (21) and the commands sent to the at least one fitting or removal tool (16) are correlated to define the position of the at least one fitting or removal tool relative to the rim contour, and the movement of the at least one fitting or removal tool (16) is guided in dependence on the performed correlation without contacting the rim surface.
    Type: Grant
    Filed: December 2, 2010
    Date of Patent: January 1, 2013
    Assignee: Snap-On Equipment SRL a Unico Socio
    Inventors: Francesco Braghiroli, Paolo Sotgiu
  • Patent number: 8345391
    Abstract: A DC/DC converter and a method protect a MOSFET driven by the converter from overcurrent conditions. No extra pins are required to sense the current, which saves IC package area and cost.
    Type: Grant
    Filed: September 16, 2010
    Date of Patent: January 1, 2013
    Assignee: Linear Technology Corporation
    Inventors: William Hall Coley, Kurk David Matthews
  • Patent number: 8344264
    Abstract: A pair of discretionary points on a principal surface of a block are coupled to each other with a metal wire having a length larger than a distance between the pair of discretionary points, liquid resin is applied to the principal surface so as to cover the metal wire and then cured, so that a resin-cured material is formed, and the upper-surface portion of the resin-cured material is removed together with an intermediate portion of the metal wire, and then the block is removed from the resin-cured material.
    Type: Grant
    Filed: June 23, 2009
    Date of Patent: January 1, 2013
    Assignee: Panasonic Corporation
    Inventors: Yutaka Kumano, Hideki Iwaki, Tetsuyoshi Ogura, Shingo Komatsu, Koichi Hirano
  • Patent number: 8345160
    Abstract: A synchronous signal conversion circuit converts a first synchronous signal, which is transmitted with a data signal, to a second synchronous signal conforming to a predetermined standard. In the synchronous signal conversion circuit, a transition detection circuit detects transition of the first synchronous signal. A synchronous signal generation circuit generates a second synchronous signal in response to a detection result by the transition detection circuit. An output timing control circuit delays the second synchronous signal generated by the synchronous signal generation circuit so that the second synchronous signal synchronizes with the data signal.
    Type: Grant
    Filed: August 25, 2008
    Date of Patent: January 1, 2013
    Assignee: Panasonic Corporation
    Inventor: Yuki Nishio
  • Patent number: 8345664
    Abstract: An IP communication apparatus employed in a telephone voice/moving picture recording system is comprised of: an IP packet transmitting/receiving I/F for transmitting/receiving an IP packet; an IP address acquiring unit of acquiring an IP address corresponding to a transmission source of the IP packet; a signal judging unit for performing a signal judging operation by employing data contained in an IP packet; a recording unit for recording the data in relation to the IP address based upon a judgment result made by the signal judging unit; and a recording control unit for controlling the recording unit.
    Type: Grant
    Filed: January 12, 2009
    Date of Patent: January 1, 2013
    Assignee: Panasonic Corporation
    Inventors: Akira Harada, Hideki Iizuka
  • Patent number: 8344326
    Abstract: A PET instrument free from problems of maintenance of a detector when a field of view in a body axial direction of a subject is significantly enlarged. A gantry (1) is divided into a plurality of units (5) in the body axial direction of the subject. Each unit (5) is configured to be movable in an orthogonal direction to the body axial direction. Further, a number of detectors are provided in each unit (5) and arranged in its circumferential direction and the body axial direction.
    Type: Grant
    Filed: August 5, 2008
    Date of Patent: January 1, 2013
    Assignee: Shimadzu Corporation
    Inventor: Masaharu Amano
  • Patent number: 8347296
    Abstract: A priority control apparatus according to the present invention includes: an OS execution unit which executes first tasks that run on a first OS and second tasks that run on a second OS; a task priority obtainment unit which obtains the priority of an execution task which is a first task being executed by the OS execution unit and the priority of a requested task which is a second task whose execution is being requested to the OS execution unit; and a priority changing unit which, in the case where the priority of the requested task is higher than the priority of the execution task, changes the priorities of the first tasks to be lower than the priority of the requested task and higher than the next lower priority to the requested task among the second tasks, while maintaining the relative order of the priorities among the first tasks.
    Type: Grant
    Filed: December 1, 2010
    Date of Patent: January 1, 2013
    Assignee: Panasonic Corporation
    Inventor: Koichi Yasutake
  • Patent number: 8342223
    Abstract: A method of and an apparatus for fitting or removing a tire 4 of a vehicle wheel 1, in which at least one fitting or removal tool 5 is guided parallel to the axis 11 of the vehicle wheel 1 and the vehicle wheel 1 is moved controllably perpendicularly to its wheel axis 11 in dependence on a rim contour along which the fitting or removal tool 5 is to be guided at a small spacing.
    Type: Grant
    Filed: April 17, 2009
    Date of Patent: January 1, 2013
    Assignee: Snap-On Equipment SRL a Unico Socio
    Inventor: Paolo Sotgiu
  • Patent number: 8342296
    Abstract: Disclosed herein is a disk brake for vehicles including a disk rotated together with a wheel of a vehicle, a pair of friction pads disposed at both sides of the disk opposite to each other, and a pair of wedge members installed on the rear surfaces of the friction pads, wherein the upper ends of the friction pads are respectively hinged to the wedge members, and the lower ends of the friction pads are supported by elastic members so as to be protruded toward the disk. Even though friction between the disk and the friction pads occurs under the condition that braking is not performed, the friction is limited to regions between the edges of the lower ends of the friction pads and the disk, thereby reducing frictional force between the disk and the friction pads and thus preventing unintended braking.
    Type: Grant
    Filed: June 29, 2010
    Date of Patent: January 1, 2013
    Assignee: Mando Corporation
    Inventor: Myoung June Kim
  • Patent number: 8344518
    Abstract: A multi-chip stack module provides increased circuit density for a given surface chip footprint. Support structures are alternated with standard surface mount type chips to form a stack wherein the support structures electrically interconnect the chips. One aspect is a structure and method for interconnecting a plurality of generally planar chips in a vertical stack such that signals, which are common to the chips, are connected in the stack and signals, which are accessed individually, are separated within the stack.
    Type: Grant
    Filed: June 30, 2010
    Date of Patent: January 1, 2013
    Assignee: STEC, Inc.
    Inventor: Mark Moshayedi