Patents Represented by Attorney, Agent or Law Firm McGinn and Gibb, PLLC
  • Patent number: 6960485
    Abstract: A process of forming separation grooves for separating a semiconductor wafer into individual light-emitting devices, a process for thinning the substrate, process for adhering the wafer to the adhesive sheet to expose a substrate surface on the reverse or backside of the wafer, a scribing process for forming split lines in the substrate for dividing the wafer into light-emitting devices, and a process of forming a mirror structure comprising a light transmission layer, a reflective layer, and a corrosion-resistant layer, which are laminated in sequence using sputtering or deposition processes. Because the light transmission layer is laminated on the adhesive sheet, gases normally volatilized from the adhesion materials are sealed and do not chemically combine with the metal being deposited as the reflective layer. As a result, reflectivity of the reflective layer can be maintained.
    Type: Grant
    Filed: February 28, 2003
    Date of Patent: November 1, 2005
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Toshiya Uemura, Naohisa Nagasaka, Masaki Hashimura, Atsuo Hirano, Hiroshi Tadano, Tetsu Kachi, Hideki Hosokawa
  • Patent number: 6961793
    Abstract: A bus arbiter for a group of masters and a bus access control method. An arbitration priority control section output basic priority data for each of the masters. An arbitration priority generating section is provided for each of the masters, and combines the basic priority data for the corresponding master with request indication data indicating existence or non-existing of a bus access request from corresponding master to generate arbitration priority data. An arbitration priority comparing section compares the arbitration priority data for the masters with each other to determine the arbitration priority data which has the highest priority, and outputs a comparison resultant signal containing data for specifying the master corresponding to the arbitration priority data with the highest priority. An arbitration result notifying section outputs a bus use permission signal to the corresponding master with the highest priority in response to the comparison resultant signal.
    Type: Grant
    Filed: November 19, 2002
    Date of Patent: November 1, 2005
    Assignee: NEC Corporation
    Inventor: Tetsuya Kato
  • Patent number: 6961033
    Abstract: The invention provides a GaN green LED drive device comprising: a bias current output unit for outputting a pulse-like bias current having a low level higher by a predetermined value than a zero level; and a peaking unit for peaking the bias current outputted from the bias current output unit to make rise of the bias current higher than a high level and make fall of the bias current lower than the low level to thereby obtain a peaked bias current supplied to a GaN green LED. The bias current is peaked while the low level of the bias current is set at a higher value (10 mA) than that in the related art. Hence, the fall time tf becomes 6.6 nsec. The fall time tf can be shortened greatly compared with that in the related art.
    Type: Grant
    Filed: November 26, 2002
    Date of Patent: November 1, 2005
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Shigeru Fukumoto, Satoru Kato, Hiroshi Ito
  • Patent number: 6960875
    Abstract: A glass crack prevention film-like layer having a glass crack prevention layer exhibiting a dynamic elastic modulus of not larger than 6×106 Pa at 20° C., and an anti-reflection film laminated on one surface of the glass crack prevention layer, while the other surface of the glass crack prevention layer is provided as an adhesive face. A plasma display device having a plasma display panel, and a glass crack prevention film-like layer defined above and directly attached to a visual side of the plasma display panel through the adhesive face of the glass crack prevention layer contained in the glass crack prevention film-like layer.
    Type: Grant
    Filed: May 15, 2002
    Date of Patent: November 1, 2005
    Assignee: Nitto Denko Corporation
    Inventors: Yuuichi Morimoto, Kazuhiko Miyauchi, Yoshihiro Hieda, Yukiko Azumi, Toshitaka Nakamura
  • Patent number: 6961821
    Abstract: A method and structure for replacing cache lines in a computer system having a set associative cache memory is disclosed. The method establishes ranking guidelines utilizing a writable cache replacement control array, wherein the guidelines can be dynamically changed by writing data to the cache replacement control array. The invention ranks states of different cache lines according to the ranking guidelines and replaces, upon a cache miss, a cache line having a highest rank of the rankings.
    Type: Grant
    Filed: October 16, 2002
    Date of Patent: November 1, 2005
    Assignee: International Business Machines Corporation
    Inventor: John T. Robinson
  • Patent number: 6959319
    Abstract: A method of customizing a web page by sensing a user's access of objects included in the web page or objects that are specified by the user in advance, wherein by “access” it means using the functions provided by the objects after they are locally displayed. The web page is customized in such a fashion that only the objects that have been used for a predetermined number of times or the pre-specified objects that have been used for the predetermined number of times would be included in a web page for the user's subsequent visits.
    Type: Grant
    Filed: September 11, 2000
    Date of Patent: October 25, 2005
    Assignee: International Business Machines Corporation
    Inventors: Anita Wai-Ling Huang, Neelakantan Sundaresan
  • Patent number: 6958522
    Abstract: A method and structure for an integrated circuit chip has a logic core which includes a plurality of insulating and conducting levels, an exterior conductor level and passive devices having a conductive polymer directly connected to the exterior conductor level. The passive devices contain RF devices which also includes resistor, capacitor, and/or inductor. The resistors can be serpentine resistors and the capacitors can be interdigitated capacitors.
    Type: Grant
    Filed: July 5, 2001
    Date of Patent: October 25, 2005
    Assignee: International Business Machines Corporation
    Inventors: Lawrence A. Clevenger, Louis L. Hsu, Carl J. Radens, Li-Kong Wang, Kwong Hon Wong
  • Patent number: 6958638
    Abstract: A slew rate controlling system for output data is provided which is capable of improving an output data window even when change in a potential difference between a first power supply (VDD) to be used for outputting and a second power supply (VDDQ) to be used internally occurs. The slew rate controlling system is achieved by using a VDD-VDDQ potential difference detecting circuit to detect a decrease in a potential difference between the first power supply (VDD) and the second power supply (VDDQ) and to produce a first signal with specified timing and to detect an increase in a potential difference between the first power supply (VDD) and the second power supply (VDDQ) and to produce a second signal and by using a slew rate controlling circuit to exert control, when the first signal is significant, to enlarge a transition speed in a fall of output data and to exert control, when the second signal is significant, to enlarge the transition speed in a rise of output data and to produce output data.
    Type: Grant
    Filed: October 9, 2003
    Date of Patent: October 25, 2005
    Assignee: Elpida Memory, Inc.
    Inventors: Tomoyuki Shibata, Kanji Oishi
  • Patent number: 6958286
    Abstract: The invention forms an epitaxial silicon-containing layer on a silicon germanium, patterned strained silicon, or patterned thin silicon-on-insulator surface and avoids creating a rough surface upon which the epitaxial silicon-containing layer is grown. In order to avoid creating the rough surface, the invention first performs a hydrofluoric acid etching process on the silicon germanium, patterned strained silicon, or patterned thin silicon-on-insulator surface. This etching process removes most of oxide from the surface, and leaves a first amount of oxygen (typically 1×1013?1×1015/cm2 of oxygen) on the silicon germanium, patterned strained silicon, or patterned thin silicon-on-insulator surface.
    Type: Grant
    Filed: January 2, 2004
    Date of Patent: October 25, 2005
    Assignee: International Business Machines Corporation
    Inventors: Huajie Chen, Dan M. Mocuta, Richard J. Murphy, Stephan W. Bedell, Devendra K. Sadana
  • Patent number: 6958504
    Abstract: A method of manufacturing a semiconductor storage device having a capacitive element having a dielectric layer having a perovskite-type crystal structure represented by general formula ABO3 and a lower electrode and an upper electrode disposed so as to sandwich the dielectric layer therebetween; in the method are carried out forming, on a lower electrode conductive layer, using a MOCVD method, an initial nucleus containing at least one metallic element the same as a metallic element in the dielectric layer, forming, on the initial nucleus, using a MOCVD method, a buffer layer containing at least one metallic element the same as the metallic element contained in both the initial nucleus and the dielectric layer, in a higher content than the content of this metallic element contained in the initial nucleus, and forming, on the buffer layer, using a MOCVD method, the dielectric layer having a perovskite-type crystal structure.
    Type: Grant
    Filed: June 8, 2004
    Date of Patent: October 25, 2005
    Assignee: NEC Electronics Corporation
    Inventors: Takashi Nakagawa, Takashi Hase
  • Patent number: 6958998
    Abstract: Providing packet-based service differentiation on packet-based networks involves first determining information associated with packets as a basis for inferring connection characteristics associated with the respective packet, as the packets pass though a particular network node. Statistical measures based on numerical values of, for example, Round Trip Time (RTT), is used to characterize connections as being, in this case “long” or “short”. “Long” connections are given a higher priority than “short” connections. Accordingly, the assigned priority associated with particular packets can be used to adjust drop probabilities for those packets.
    Type: Grant
    Filed: July 9, 2001
    Date of Patent: October 25, 2005
    Assignee: International Business Machines Corporation
    Inventor: Rajeev Shorey
  • Patent number: 6956245
    Abstract: A Group III nitride compound semiconductor light-emitting element has a reflecting surface on a side opposite to a main light-emitting surface of the element viewed from a light-emitting layer. The reflecting surface is inclined to surfaces of growth of semiconductor layers. Light emitted from the light-emitting layer is reflected by the reflecting surface, so that the reflected light emerges from side surfaces of the light-emitting element to the outside without passing through the semiconductor layers (particularly, the light-emitting layer).
    Type: Grant
    Filed: May 30, 2003
    Date of Patent: October 18, 2005
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Masanobu Senda, Toshiya Uemura, Hideki Omoya, Masaki Hashimura
  • Patent number: 6956266
    Abstract: A method and structure for an integrated circuit comprising a substrate of a first polarity; a trench structure in the substrate; a well region of a second polarity abutting the trench structure; and a heavily doped region of the second polarity abutting the trench structure, wherein the heavily doped region is adapted to suppress latch-up in the integrated circuit, wherein the heavily doped region comprises a sub-collector region, and wherein the trench structure comprises a deep trench structure or a trench isolation structure. The integrated circuit further comprises a p+ anode in the well region and a n+ cathode in the well region, wherein the integrated circuit is configured as a latchup robust p-n diode. In another embodiment, the integrated circuit further comprises a p+ anode in the well region; a n+ cathode in the well region; and a gate structure over the p+ anode and n+ cathode.
    Type: Grant
    Filed: September 9, 2004
    Date of Patent: October 18, 2005
    Assignee: International Business Machines Corporation
    Inventors: Steven H. Voldman, Anne E. Watson
  • Patent number: 6956540
    Abstract: By opening and closing the sub display with respect to the main display D1 via a hinge H mounted on the side portion, a variety of uses, such as to display different information on the two different displays, are easily realized, whereby easily supporting diversification of displayed information expected in the future and improvement of the functions. The sub display can be rotated upside down in addition to the horizontal open/close movement with respect to the main display D1, thereby increasing the possible states of use. When the sub display is rotated upside down by 180°, each button B and the markings marked thereon rotates and inverted as well, the marking is shown in the normal orientation, but not inverted orientation as a consequent, thereby facilitating identification and operation of each button. The state of currently selected/connected source is displayed on one of the main display D1 and the sub display.
    Type: Grant
    Filed: October 18, 2000
    Date of Patent: October 18, 2005
    Assignee: Clarion Co., LTD
    Inventors: Keiichiro Yoshihara, Katsuomi Koyata, Shigeru Tsuda
  • Patent number: 6957337
    Abstract: A method and apparatus for authenticating (or identifying) a subject, includes using one or a plurality of biometric measurements for authentication (or identification) without any sharing of the subject's biometric data with a party requesting authentication.
    Type: Grant
    Filed: August 11, 1999
    Date of Patent: October 18, 2005
    Assignee: International Business Machines Corporation
    Inventors: Timothy Joseph Chainer, Bruce P. Kitchens, Stephane Herman Maes, Marco Martens, Joseph Dela Rutledge, Charles Philippe Tresser
  • Patent number: 6953265
    Abstract: A light source device has a light shielding member having an aperture, a light source arranged on one side of the light shielding member, and a converging member arranged relatively with respect to the light source and the light source to thereby converge light emitted from the light source in the aperture or in a vicinity of the aperture. Another type of light source device has a single light source, and a converging member for converging light from the light source to thereby distribute the light to at least two points. Still another type of light source device has a light source, and a reflecting mirror arranged to enclose a side of a light emission direction of the light source, the reflecting mirror reflecting light emitted from the light source in a direction except the light source so that the light is radiated outside.
    Type: Grant
    Filed: April 25, 2003
    Date of Patent: October 11, 2005
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Yoshinobu Suehiro, Yuji Takahashi, Takemasa Yasukawa, Hideaki Kato, Hideki Omoya, Hideyuki Nakano, Hisao Yamaguchi
  • Patent number: 6954418
    Abstract: A plurality of light receiving detectors receive a plurality of segments of a beam returning from an optical disc when a reading beam of light is radiated to the optical disc. An optical pickup assembly produces a plurality of signals from the beam segments in accordance with, for instance, optical intensities of the beam segments. A level adjusting circuit adjusts signal levels of these signals such that each of the signal levels of the signals becomes equal to a reference level. The reference level is determined from at least one of the signal levels of the received beam segments.
    Type: Grant
    Filed: February 7, 2002
    Date of Patent: October 11, 2005
    Assignee: Pioneer Corporation
    Inventors: Naoharu Yanagawa, Masahiro Kato, Tatsuhiro Yone, Yuko Muramatsu, Shinji Suzuki
  • Patent number: 6953726
    Abstract: Disclosed is a method and structure for forming a split-gate fin-type field effect transistor (FinFET). The invention produces a split-gate fin-type field effect transistor (FinFET) that has parallel fin structures. Each of the fin structures has a source region at one end, a drain region at the other end, and a channel region in the middle portion. Back gate conductors are positioned between channel regions of alternating pairs of the fin structures and front gate conductors are positioned between channel regions of opposite alternating pairs of the fin structures. Thus, the back gate conductors and the front gate conductors are alternatively interdigitated between channel regions of the fin structures.
    Type: Grant
    Filed: December 16, 2004
    Date of Patent: October 11, 2005
    Assignee: International Business Machines Corporation
    Inventors: Edward J. Nowak, BethAnn Rainey
  • Patent number: 6954781
    Abstract: A messaging system support service advantageously allows various types of messaging systems to send intelligent notification alerts to message recipient(s). The Short Message System (SMS) can be used with Global System for Mobile communication (GSM) cellular telephone networks to send an intelligent alert to a mobile phone after a voice message has been delivered to the recipient's voice mail box. In reply, the recipient can respond with a SMS message that directs the voice mail box to take one or more predetermined directions in relation to the message.
    Type: Grant
    Filed: August 1, 2001
    Date of Patent: October 11, 2005
    Assignee: International Business Machines Corporation
    Inventor: Jaijit Bhattacharya
  • Patent number: 6953724
    Abstract: Disclosed is a method of manufacturing a deep trench capacitor structure that forms a trench in a substrate, lines the trench with a polysilicon liner, and forms titanium nitride columns along the polysilicon liner. The method etches the titanium nitride columns using chlorine-based dry chemistry that is substantially isotropic. This etching process removes the upper portion of the titanium nitride columns without affecting the polysilicon liner. The etching process attacks only in the uppermost portion of the titanium nitride columns such that, after the etching process is completed, the remaining lower portions of the titanium nitride columns are substantially unaffected by the etching process. Then, the method fills the space between the titanium nitride columns and the upper portion of the trench with additional polysilicon material. The process of filling the space simultaneously forms a polysilicon plug and polysilicon cap.
    Type: Grant
    Filed: September 25, 2003
    Date of Patent: October 11, 2005
    Assignee: International Business Machines Corporation
    Inventors: Nikki L. Edleman, Richard S. Wise