Abstract: An improved computer graphics memory architecture has a frame buffer and a Z buffer, each having a forward and reverse part, each of which is wide enough to handle two pixels of data. A data path is connected to the buffers so that in a 3-D application, a full pixel of both color and Z-value data is transported along the data path in a single I/O transaction. In a 2-D application, two pixels of data are transported along the data path in a single I/O transaction. In a preferred embodiment, both the frame and Z buffers are divided into two parts each wide enough to handle one pixel of data part. In 3-D applications, a data path is selectively connected to the buffers in a manner so that one pixel of color data and one pixel of Z-value data are simultaneously transported to the drawing processor during each I/O transaction. In this preferred embodiment, a first reversing switch such as a multiplexer circuit, is provided to reverse data that arrives from the buffer in reverse order.

Abstract: The invention is directed to a BGA package and method for making a BGA package in which warpage, delamination and package cracking are reduced. The inventive BGA package has a die attached to one surface of a substrate. The substrate may terminate at its opposite surface in an array of connection ports which is an integral part of the substrate. Alternatively, the array of connection ports is attached to the opposite surface of the substrate. The connection ports may be attach pads attached to the opposite surface of the substrate and solder balls or metal bumps attached to the attach pads. A matrix of molding compound fully encapsulates the substrate, die and the array of connection ports. The matrix molding compound is then ground to provide a flat surface and to expose portions of the connection ports. Another array of connection ports, such as an array of solder balls or metal bumps, may be attached to the existing array of connection ports.

Abstract: An apparatus and method for use in a semiconductor memory device to reduce internal circuit damage resulting from the effects of electro-static discharge (ESD) on a bitline pull-up or other type of circuit. Each of a plurality of bitlines in the memory device are coupled to a source terminal of a corresponding N-type MOSFET. Each source terminal is formed in a separate corner portion of at least one active region of the memory device, and is coupled to a given bitline via a bitline contact arranged in the corner portion. Each drain terminal of the N-type MOSFETS is formed from another portion of the active region and is coupled to a VDD supply of the memory device via a VDD contact. A gate terminal of a given MOSFET is formed from a polysilicon gate region overlying a channel in the active region. The gate region has an approximately 90.degree.

Abstract: The invention is directed to a BGA package and method for making a BGA package in which warpage, delamination and package cracking are reduced. The inventive BGA package has a die attached to one surface of a substrate. The substrate may terminate at its opposite surface in an array of connection ports which is an integral part of the substrate. Alternatively, the array of connection ports is attached to the opposite surface of the substrate. The connection ports may be attach pads attached to the opposite surface of the substrate and solder balls or metal bumps attached to the attach pads. A matrix of molding compound fully encapsulates the substrate, die and the array of connection ports. The matrix molding compound is then ground to provide a flat surface and to expose portions of the connection ports. Another array of connection ports, such as an array of solder balls or metal bumps, may be attached to the existing array of connection ports.

Abstract: In a method of transferring a security element which is in the form of a laminate with a carrier foil and with a thermally activatable adhesive layer for connection to a substrate onto a document the adhesive layer is brought into contact with the substrate and locally heated by the supply of heat energy through the laminate. After the adhesive layer cools if necessary the carrier foil can be pulled off the substrate, in which case the carrier foil, at the locations adhering to the substrate, is detached from the rest of the laminate and the laminate tears along the boundary between the adhering and the non-adhering locations so that only the adhering locations of the laminate remain behind on the substrate. In particular a laser beam or an array of laser or light emitting diodes is suitable for the supply of heat energy. The laminate preferably has diffraction structures or layers producing optical interference effects.

Abstract: The inventive SRAM cell has a poly-load resistor which comprises a thick supply voltage (Vcc) interconnect, a thick driver interconnect on a thin load resistance region which is electrically connected to both interconnects. The novel poly-load resistor overcomes the problem of lateral diffusion from the interconnect regions into the load region. The resulting SRAM cell has a low Vcc interconnect resistance.

Abstract: A process and device for the projection of image information before at least one eye (A1,A2) of a person having a visual impairment is disclosed. The visual impairment is caused by a deviation of the angular position of the optical axis of one eye (A2) in relation to the optical axis of the other eye (A1), i.e., cross-eyed. The process and/or device enables a cross-eyed person to see stereoscopically over a long period of time without any restriction in his/her field of vision. According to the process, one eye (A1) is selected as the leading eye, the movement of the leading eye (A1) is then detected, the position of the optical axis of that eye (A1) is determined from the detected movement, and image information is projected before the non-leading eye (A2) while taking an angular deviation into account. The projected image information is identical with the image information which the non-leading eye would perceive if its optical axis was in a position corresponding to the angular position of the leading eye.

Abstract: The invention comprises a method for producing electric sheets, in particular grain-oriented electric sheets, with an evenly well-adhering glass film and with improved magnetic properties, in which the hot rolled strip which is produced at first and is optionally annealed is cold-rolled up to an end thickness in one or several steps, thereafter an annealing separator is applied to the strip which is rolled up to the end thickness, and is dried, and therafter the cold strip thus coated is subjected to high-temperature annealing, with an important component of the annealing separator being a hydrous magnesium oxide (MgO) dispersion and the annealing separator being additionally provided with at least one additive. The characterizing feature of the invention is that a finely dispersed water-soluble sodium phosphate compound is used as at least one additive.

Abstract: The present invention relates to a method for dynamically allocating bandwidth to each encoder in an ensemble of video encoders whose output bit streams share a single communications channel. In accordance with the present invention, the channel bandwidth is allocated to the individual encoders in the ensemble in such a way that differences in a quality measure among the decoders are reduced. The quality measure includes a term that behaves like a peak-signal-to-noise ratio (PSNR) and a term that measures the "masking effect" in a video signal. The "masking effect" results because an encoded frame with a high visual complexity masks coding artifacts from the viewer when it is decoded and displayed.

Abstract: A rate control algorithm for an MPEG-2 compliant encoder wherein the rate control algorithm has embodiments useful for constant bit rate and variable bit rate encoding. In particular, the present invention relates to statistical multiplexing.

Abstract: A rate control algorithm for an MPEG-2 compliant encoder is described. The rate control algorithm has embodiments useful for constant bit rate and variable bit rate encoding.In particular, the present invention relates to statistical multiplexing.

Abstract: A pipeline-able asynchronous logic circuit is provided that implements a subfunction of a logic function that is distributed into multiple sequential subfunctions. Each subsequent subfunction is applied to a result of an immediately preceding subfunction of the sequence. The asynchronous logic circuit has an output node and a differential logic circuit connected to the output node via a first path. The differential logic circuit applies a particular subfunction to an inputted signal to produce a result signal. The asynchronous logic circuit also has a sense amplifier that is connected to the output node via a second path which is distinct from the first path. The sense amplifier, in response to being enabled, amplifies the result signal produced by the differential logic circuit. The sense amplifier outputs the amplified result signal onto the output node.

Abstract: The invention is directed to a thin film transistor (TFT) wherein HF precleaning of a gate oxide layer is eliminated, thus avoiding surface degradation and maintaining the smoothness of the gate oxide layer. This results in a TFT that has low Ioff, low stand-by power, and high Ion/Ioff ratio. The invention forms a TFT by depositing a smooth surfaced TFT oxide layer over the TFT gate poly layer. The TFT gate poly layer includes a gate and a drain connection to the drain of a driver. No via hole is patterned over the TFT gate oxide before the TFT body film deposition. Therefore, no HF precleaning step is used. The TFT body layer is then deposited over the gate layer. Source and drain regions are formed in the TFT body layer. In order to connect to drain region of the TFT body layer with the drain connection in the TFT gate layer, a via is formed through the TFT drain and TFT oxide layer.

Abstract: A modulation and demodulation scheme for video signals may be used for HDTV signals using VSB-PAM, analog NTSC signals using VSB-AM and digital video signals using QAM. VSB-PAM modulation and demodulation may be performed using in-phase and quadrature baseband filters. By adjusting the filter taps, a single modulator structure may be used for QAM and VSB-PAM modulation. Similarly, a single demodulator structure may be used for QAM and VSB-PAM demodulation. This demodulator may also be used for VSB-AM modulation.

Abstract: An electrographic printing apparatus comprises a rotatable charge bearing member, a rotatable roller assembly which applies a chargeable pre-wetting oil to the surface of the charge bearing member, a charger assembly which applies uniform charge to the surface of the charge bearing member and/or the pre-wetting oil coating, and a light source which discharges selected areas on the charge bearing member and/or the pre-wetting oil to produce a latent electrostatic image thereon. The electrographic printing apparatus further comprises a liquid development system comprising an ink head assembly which applies liquid toner to the charge bearing member thereby developing the latent electrostatic image, and a rotatable transfer member which receives the developed image from the charge bearing member and then transfers it to a substrate such as paper. The electrographic printing apparatus may also be adapted to produce color images on the substrate.

Abstract: A bridging device for hydrodynamic hydraulic couplings (1), more particularly for turbo couplings of variable or constant filling, which couple a prime mover to a machine and whose input shaft (5) can be coupled by means of the bridging device (D), having a force-transmitting device (11), to its output shaft (8) to increase efficiency of transmission. The force-transmitting device (11) of the bridging device (D) is uncoupled from the rotary motion of the hydraulic coupling (1) and can be controlled by means of a control device disposed outside the casing (2), the bridging device being controllable by means of a fluid.

Abstract: A communication method enables a plurality of remote locations to transmit data to a central location. The remote locations simultaneously share a channel and there is a high degree of immunity to channel impairments. At each remote location, data to be transmitted is coded by translating each group of one or more bits of the data into a transform coefficient associated with a frequency in a particular subset of orthonormal baseband frequencies allocated to each remote location. The particular subset of orthonormal baseband frequencies allocated to each location is chosen from a set of orthonormal baseband frequencies. At each remote location, an electronic processor performs an inverse orthogonal transform (e.g., an inverse Fourier Transform) on the transform coefficients to obtain a block of time domain data. The time domain data is then modulated on a carrier for transmission to the central location.

Abstract: The present invention relates to a method and apparatus in which a differentially coded signal having forward error correction added to the encoded data can be decoded with an improved bit error rate performanceApparatus for decoding a differentially encoded input signal having forward error correction added to the encoded data, the apparatus comprising: a differential decoder to receive the input signal and to decode the data in each differentially encoded signal interval thereof by reference to the data in a previous differentially encoded signal interval; error correcting means to correct errors in the decoded signal form the decoder; and means for supplying to the decoder the corrected data from each signal interval to act as a reference for decoding the data in a following signal interval.

Abstract: A variable length coder is disclosed having a zig-zag memory for continuously receiving blocks of coefficients while outputting the coefficients in zig-zag scan order. The zig-zag memory has a first memory for writing each odd ordinalled block therein according to a zig-zag scan as the odd ordinalled block is inputted. The first memory subsequently reads-out each of the zig-zag scanned odd ordinalled blocks while the zig-zag memory receives each even ordinalled block. The zig-zag memory also has a second memory for writing each even ordinalled block therein according to a zig-zag scan as the even ordinalled block is inputted. The second memory subsequently reads-out each of the zig-zag scanned ordinalled blocks while the zig-zag memory receives each odd ordinalled block. The zig-zag memory further includes a read counter which generates addresses and selectively outputs the addresses to the first memory for reading out each odd ordinalled block, while the zig-zag memory receives an even ordinalled block.