Patents Represented by Attorney Meyertons, Hood, Kivlin, Kowert & Goetzel
  • Patent number: 8316212
    Abstract: In an embodiment, a TLB is partitioned into regions. The TLB may be set associative, and each section may include a portion of the locations in each way of the set associative memory. The TLB may reserve at least one of the sections for access by a subset of the request sources that use the TLB. For requests from the subset, the reserved section may be used and a location in the reserved section may be allocated to store a translation for a request from the subset that misses in the TLB. For requests for other request sources, the non-reserved section or sections may be used. In one embodiment, each way of the reserved section may be assigned to a different one of the request sources in the subset.
    Type: Grant
    Filed: December 28, 2011
    Date of Patent: November 20, 2012
    Assignee: Apple Inc.
    Inventor: Joseph A. Petolino, Jr.
  • Patent number: 8314807
    Abstract: In an embodiment, a memory controller includes multiple ports. Each port may be dedicated to a different type of traffic. In an embodiment, quality of service (QoS) parameters may be defined for the traffic types, and different traffic types may have different QoS parameter definitions. The memory controller may be configured to schedule operations received on the different ports based on the QoS parameters. In an embodiment, the memory controller may support upgrade of the QoS parameters when subsequent operations are received that have higher QoS parameters, via sideband request, and/or via aging of operations. In an embodiment, the memory controller is configured to reduce emphasis on QoS parameters and increase emphasis on memory bandwidth optimization as operations flow through the memory controller pipeline.
    Type: Grant
    Filed: September 16, 2010
    Date of Patent: November 20, 2012
    Assignee: Apple Inc.
    Inventors: Sukalpa Biswas, Hao Chen
  • Patent number: 8315558
    Abstract: Partner relay systems and methods are provided in which relaying is performed by a pair of partner relays. Signals received from a base station are translated by a first of the pair of partner relays to a different transmission resource for communication between the pair of partner relays, and then upon reception by a second of the pair of partner relays, the signal is translated back to the original transmission resource and re-transmitted towards the receiver.
    Type: Grant
    Filed: November 30, 2011
    Date of Patent: November 20, 2012
    Assignee: Apple Inc.
    Inventors: David Falconer, Shalini Periyalwar, Koon Hoo Teo, Mo-Han Fong
  • Patent number: 8311552
    Abstract: The present invention facilitates dynamic allocation of home IP addresses for a mobile node, when it is roaming away from a home network and supported by a foreign network. After the mobile node obtains a care-of address from the foreign network, a stateful or stateless configuration process is used to dynamically allocate a home IP address for the mobile node. In the stateful approach, a binding update message is used to request a home IP address for the mobile node from its home agent. In a stateless embodiment, the mobile node will create a home IP address, which is sent to the home agent for verification via the binding update message. The home agent will receive the home IP address in the binding update message, verify the home IP address, and send acknowledgement of the verification, assuming the home IP address is verified, to the mobile node.
    Type: Grant
    Filed: February 25, 2005
    Date of Patent: November 13, 2012
    Assignee: Apple Inc.
    Inventors: Mohamed Khalil, Haseeb Akhtar
  • Patent number: 8312298
    Abstract: A PXI Express controller may be configured to support at least three different conditions under which the controller may be turned on. If a chassis (e.g. a PXI Express chassis) interfacing with the controller has a power button, the first condition (which may be considered normal operation) may be met when the power button is being pressed at a time auxiliary power is present. When the chassis does not have a power button, the second condition may be met when the power is switched on at a time auxiliary power is present, and the third condition may be met when the power is switched on at a time auxiliary power is not present. A state-machine comprised in the PXI Express controller may be configured to interface with a chipset equally comprised in the PXI Express controller, to perform the control functions required to provide the support for the three different conditions.
    Type: Grant
    Filed: November 17, 2006
    Date of Patent: November 13, 2012
    Assignee: National Instruments Corporation
    Inventors: Keith D. Peterson, Jeffrey L. Kennedy
  • Patent number: 8311129
    Abstract: In various embodiments, temporal filtering may be used to reduce noise over time in a series of video frames. A temporal filter may use previous filtered frames to reduce the noise in a current frame. For example, a temporal filter may filter noise in still parts of an image more strongly than in moving parts of the image. In some embodiments, a temporal filter requiring less processing power may include a method for detecting motion between a set of pixels and applying the temporal filter based on the detected motion. For example, if substantial motion is not detected, the temporal filter for the block of pixels may be stronger (i.e., reduce more noise) than the temporal filter applied to a block of pixels for which substantial motion has been detected.
    Type: Grant
    Filed: December 15, 2006
    Date of Patent: November 13, 2012
    Assignee: LifeSize Communications, Inc.
    Inventor: Michael V. Jenkins
  • Patent number: 8311222
    Abstract: A system including a first module and a second module. The first module includes a linear feedback shift register (LFSR) and a permutator circuit. The LFSR outputs a pseudo-random sequence of digital values based on a stored key value. The permutator circuit operates on successive groups of input bits using the pseudo-random sequence. For each of said successive groups, the permutator circuit: (a) selects a bit permutation based on a respective one of the digital values in the pseudo-random sequence, (b) permutes the bits of the group using the selected bit permutation to obtain a resultant group of bits, and (c) transmits the resultant group onto an output bus. The second module also includes an LFSR and a permutator circuit that operate to invert the permutations applied by the first module. In a two-dimensional embodiment, the first module and second module may include additional circuitry for scrambling bits between groups.
    Type: Grant
    Filed: August 26, 2008
    Date of Patent: November 13, 2012
    Assignee: GLOBALFOUNDRIES, Inc.
    Inventor: Andrew R. Rawson, Sr.
  • Patent number: 8311917
    Abstract: Methods and apparatus for managing collateral based transactions are disclosed. In one embodiment, one or more processors perform defining collateral for a financial transaction, assessing a valuation of the collateral based upon a difference between a material value and a legal tender value of the legal tender precious metal coins, and determining terms of the financial transaction based on the valuation. In some embodiments, the collateral includes one or more legal tender precious metal coins.
    Type: Grant
    Filed: October 26, 2011
    Date of Patent: November 13, 2012
    Assignee: Gold Innovations, LLC
    Inventor: Omar Besim Hakim
  • Patent number: 8312167
    Abstract: A method and apparatus for timely delivery of classes and objects is provided. A header comprising timing information is attached to said classes and/or objects. A “start loading” time and a “load by” time are specified in the header. Other classes and/or objects to be loaded are also specified in the header. Optional compression, security, and/or error resilience schemes are also specified in the header. A process for creating the header and attaching it to a class or object is provided. A process for receiving and processing a class or object with an attached header is provided. Embodiments of the invention allow timely delivery of classes and/or objects over a wide variety of transport mechanisms, including unreliable transport mechanisms and those lacking any guarantees of timely delivery.
    Type: Grant
    Filed: June 6, 2005
    Date of Patent: November 13, 2012
    Assignee: Oracle America, Inc.
    Inventors: Viswanathan Swaminathan, Gerard Fernando, Michael Speer
  • Patent number: 8312525
    Abstract: A method for authenticating an entity at a first data resource, the method comprising the steps of: sending a first request token from the entity (100) to a token distribution unit (20) to request a first one-way authentication token, the first request token being a function of authentication information provided by the entity (100); sending the first one-way authentication token from the token distribution unit (20) to the entity (100); sending the first one-way authentication token from the entity (100) to the first data resource (200) to authenticate the entity (100) at the first data resource (200); sending the first one-way authentication token from the first data resource (200) to the token distribution unit (20) to validate the first one-way token; and invalidating the first one-way token.
    Type: Grant
    Filed: May 12, 2011
    Date of Patent: November 13, 2012
    Assignee: Software AG
    Inventors: Eckehard Hermann, Dieter Hermann Kessler
  • Patent number: 8312187
    Abstract: An I/O device includes a host interface coupled to a plurality of hardware resources. The host interface includes a transaction layer packet (TLP) processing unit that may receive and process a plurality of transaction layer packets sent by a plurality of processing units. Each processing unit may correspond to a respective root complex. The TLP processing unit may identify a transaction type and a processing unit corresponding to each transaction layer packet and store each transaction layer packet within a storage according to the transaction type and the processing unit. The TLP processing unit may select one or more transaction layer packets from the storage for process scheduling based upon a set of fairness criteria using an arbitration scheme. The TLP processing unit may further select and dispatch transaction layer packets for processing by downstream application hardware based upon additional criteria.
    Type: Grant
    Filed: September 18, 2009
    Date of Patent: November 13, 2012
    Assignee: Oracle America, Inc.
    Inventors: Elisa Rodrigues, John E. Watkins
  • Patent number: 8309457
    Abstract: A method utilizing a multilayer anti-reflective coating layer structure can achieve low reflectivity at high numerical apertures. The multilayer anti-reflective coating structure can be utilized as a hard mask forming various integrated circuit structures. A multilayer anti-reflective coating structure can be utilized to form gate stacks comprised of polysilicon and a dielectric layer. A photoresist is applied above the multilayer anti-reflective coating which can include silicon oxynitride (SiON) and silicon rich nitride (SiRN).
    Type: Grant
    Filed: October 27, 2011
    Date of Patent: November 13, 2012
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Kouros Ghandehari, Anna M. Minvielle, Marina V. Plat, Hirokazu Tokuno
  • Patent number: 8312461
    Abstract: A system includes a virtualized I/O device coupled to one or more processing units. The virtualized I/O device includes a storage for storing a resource discovery table, and programmed I/O (PIO) configuration registers corresponding to hardware resources. A system processor may allocate the plurality of hardware resources to one or more functions, and to populate each entry of the resource discovery table for each function. The processing units may execute one or more processes. Given processing units may further execute OS instructions to allocate space for an I/O mapping of a PIO configuration space in a system memory, and to assign a function to a respective process. Processing units may execute a device driver instance associated with a given process to discover allocated resources by requesting access to the resource discovery table. The virtualized I/O device protects the resources by checking access requests against the resource discovery table.
    Type: Grant
    Filed: June 9, 2008
    Date of Patent: November 13, 2012
    Assignee: Oracle America, Inc.
    Inventor: John E. Watkins
  • Patent number: 8310268
    Abstract: This invention (900) described a method that generates and uses a test bench for verifying an electrical design module in a semiconductor manufacturing against an electrical reference model containing a sub-circuit that matches the electrical design module. The invention includes providing (902) a description of an electrical design module that includes a plurality of ports. In addition, the invention includes providing (904) a description of an electrical reference model. The invention further includes providing and or creating (92) one or more implicit defines for the reference modules that appear in hierarchy of the electrical reference model. And, the invention includes providing (906) a description file that includes one or more instance definitions. The invention parses (91) the hierarchy of the electrical design model and then processes (96) the description file. The invention then writes (97) the test bench.
    Type: Grant
    Filed: May 16, 2011
    Date of Patent: November 13, 2012
    Assignee: Apple Inc.
    Inventor: Mark H. Nodine
  • Patent number: 8310291
    Abstract: A delay locked loop (DLL) having an accelerated training interval during a voltage change. An integrated circuit (IC) includes a master DLL configured to generate a clock signal based upon a reference clock signal. The master DLL may train to the reference clock signal in response to a control signal. The IC also includes a control unit that is coupled to the master DLL and may provide the control signal at a first interval in response to receiving an indication that a supply voltage is being changed, and provide the control signal at a second interval in the absence of the indication.
    Type: Grant
    Filed: November 17, 2010
    Date of Patent: November 13, 2012
    Assignee: Apple Inc.
    Inventors: Erik P. Machnicki, James D. Ramsay, Sanjay Mansingh
  • Patent number: 8311964
    Abstract: A system and method for efficiently reducing a number of duplicate blocks of stored data. A file server both removes duplicate data and prevents duplicate data from being stored in the shared storage. A sampling rate may be used to determine which fingerprints, or hash values, are stored in an index. The sampling rate may be modified in response to changes in characteristics of the system, such as a change in the shared storage size, a change in a utilization of the shared storage, a change in the size of the storage unit, and reaching a threshold corresponding to utilization of the index. Also, a small cache may be maintained for holding fingerprint and pointer pair values prefetched from the shared storage. Each prefetched pair may be associated with data corresponding to a previous hit in the index. The association may be related to spatial locality, temporal locality, or otherwise.
    Type: Grant
    Filed: November 12, 2009
    Date of Patent: November 13, 2012
    Assignee: Symantec Corporation
    Inventors: Petros Efstathopoulos, Fanglu Guo, Dharmesh Shah
  • Patent number: 8311024
    Abstract: The present invention provides a control function in an access point, switch, or like node on a wireless local area network. The control function operates to ensure frames transmitted by a user terminal are transmitted using an appropriate transmission priority scheme. The control function will assist and provide an appropriate priority level to the user terminal. Frames transmitted from the user terminal are passed through the control function, which will analyze priority level information provided in the frames to determine if the frames were transmitted using the appropriate transmission priority scheme. An enforcement action may be taken in response to identifying frames that were not transmitted using the appropriate transmission priority scheme.
    Type: Grant
    Filed: February 27, 2012
    Date of Patent: November 13, 2012
    Assignee: Apple Inc.
    Inventors: Osama Aboul-Magd, Hesham Elbakoury, Sameh Rabie
  • Patent number: 8306991
    Abstract: A system and method for providing a programming-language-independent interface for querying file system content. In one embodiment, the system may include a storage device configured to store a plurality of files and a file system configured to manage access to the storage device and to store file system content. The file system may include a programming-language-independent interface whereby an application queries the file system content. In various specific implementations of the system, file system content may include file data stored in one or more of the plurality of files, or metadata stored in a named stream corresponding to a given file, respectively. In another specific implementation of the system, the application querying file system content may include the application generating a query in a query language, the application submitting the query to a query engine via the programming-language-independent interface, and the query engine evaluating said query.
    Type: Grant
    Filed: June 7, 2004
    Date of Patent: November 6, 2012
    Assignee: Symantec Operating Corporation
    Inventors: Dhrubajyoti Borthakur, Nur Premo
  • Patent number: 8305897
    Abstract: One or more relay stations may be employed along a wireless communication access path between an ingress station and an egress station. A logical communication tunnel is established between the ingress and egress stations through any number of intermediate relay stations to handle session flows of PDUs. As PDUs arrive, the ingress station may determine and add scheduling information to the PDUs before they are delivered to the downstream intermediate relay stations or egress stations. The scheduling information is used by the downstream stations to schedule the PDUs for further delivery. The scheduling information may also be used by the egress station to schedule the PDUs for delivery. The scheduling information added to the PDU by the ingress station bears on a QoS class associated with the PDU, a deadline for the egress station to deliver the PDU, or a combination thereof.
    Type: Grant
    Filed: July 14, 2008
    Date of Patent: November 6, 2012
    Assignee: Apple Inc.
    Inventors: Hang Zhang, Peiying Zhu, Wen Tong, Gamini Senarath, Derek Yu, David G. Steer
  • Patent number: D670941
    Type: Grant
    Filed: May 3, 2011
    Date of Patent: November 20, 2012
    Inventor: Danielle Vernon