Abstract: Described are computer-based methods and apparatuses, including computer program products, for automation of auditing claims. A data file is received comprising one or more auditable items, each auditable item comprising a word string having one or more words. Each word string for each auditable item is translated using one or more translation steps into a translated item description. Each translated item description is compared to a plurality of terms to generate matching information. Each translated item description is associated with an item identifier based on the matching information. Each auditable item is accepted or rejected based on the item identifier and one or more rules associated with the data file.

Abstract: Provided is a method of promoting a deposition of semiconductor crystal nuclei on an insulating film such as a silicon oxide film even at a low temperature of 450° C. or lower in a reactive thermal CVD method. As one means thereof, a first semiconductor film is formed on an insulating substrate, and then semiconductor crystal nuclei are formed on parts of the first semiconductor film and simultaneously the first semiconductor film other than that in forming regions of the semiconductor crystal nuclei and their peripheries is removed by etching. Thereafter, a second semiconductor film is formed with using the semiconductor crystal nuclei as seeds.

Abstract: To provide a technique capable of improving reliability of a semiconductor device having a nonvolatile memory cell by suppressing the reduction of the drive force. A memory cell is configured by a selection pMIS having a selection gate electrode including a conductive film exhibiting a p-type conductivity and a memory pMIS having a memory gate electrode including a conductive film exhibiting a p-type conductivity, and at the time of write, hot electrons are injected into a charge storage layer from the side of a semiconductor substrate 1 and at the time of erase, hot holes are injected into the charge storage layer from the memory gate electrode.

Abstract: AVS (Adaptive Voltage Scaling) technique, by which variability and uncertainty are both taken into account. In the system arranged for AVS technique, a detection circuit optimum for each type of process variation is set. Examples of the detection circuit so arranged include a first measurement circuit for detection of variability, which produces a relative value with respect to the gate delay mean value, and a second measurement circuit for detection of uncertainty, which produces a relative value related to the gate delay standard deviation. The first and second measurement circuits are provided separately from each other. The control information for deciding the supply voltage is prepared based on relative values produced by the detection circuits. When preparing the control information, reference is made to e.g. a table data.

Abstract: To improve the speed of accessing a low-speed circuit block from a high-speed circuit block without significantly increasing power consumption.

Abstract: A semiconductor device manufacturing technique which allows reduction of semiconductor chip size. First, a pad and other wires are formed over an insulating film. A surface protective film is formed over the insulating film including the pad and wires, and an opening is made in the surface protective film. The opening lies over the pad and exposes a surface of the pad. A bump electrode is formed over the surface protective film including the opening. Here, the pad is smaller than the bump electrode. Consequently, the wires are arranged just beneath the bump electrode in the same layer as the pad 10. In other words, the wires are arranged in space which becomes available because the pad is small enough.

Abstract: Provided are a variable magnification optical system for making it possible to properly set a variable magnification ratio of each lens group by properly setting a variable magnification ratio of a fifth lens group, and an optical apparatus with the variable magnification optical system, and a method for manufacturing the variable magnification optical system. The optical apparatus has first to sixth lens groups (G1) to (G6) in order from an object, wherein the fifth lens group (G5) satisfies the following conditional expression: 0.65<|?5T/?5W|<3.20, where ?5T denotes the lateral magnification at the telephoto end state, and ?5W denotes the lateral magnification at the wide-angle end state.

Abstract: A data processor whose level of operation parallelism is enhanced by composing floating-point inner product execution units to be compatible with single instruction multiple data (SIMD) and thereby enhancing the operation processing capability is made possible. An operating system that can significantly enhance the level of operation parallelism per instruction while maintaining the efficiency of the floating-point length-4 vector inner product execution units is to be implemented. The floating-point length-4 vector inner product execution units are defined in the minimum width (32 bits for single precision) even where an extensive operating system becomes available, and compose the inner product execution units to be compatible with SIMD. The mutually augmenting effects of the inner product execution units and SIMD-compatible composition enhances the level of operation parallelism dramatically.

Abstract: A zoom optical system comprising, in order from an object side: a first lens group G1 having positive refractive power; a second lens group G2 having negative refractive power; and a rear lens group GR having positive refractive power; the rear lens group GR including at least a third lens group G3 that is disposed to the most object side and has positive refractive power, the third lens group G3 including at least four positive lenses L31-L33, L35 and at least one negative lens L34, at least a portion of a lens group disposed to an image side of the first lens group G1 being movable as a vibration reduction lens group in a direction including a component perpendicular to an optical axis, and a given conditional expression being satisfied, thereby providing a zoom optical system having excellent optical performance.

Abstract: To provide a data processing device in which a plurality of CPUs can individually and independently communicate with different functions of a USB device using a single communication path. The data processing device is configured so that a USB host module to be coupled to a plurality of central processing units has a plurality of pipes to communicate with an arbitrary end point of a USB device coupled from the outside of the data processing device, the data processing device also includes an access control register to specify which central processing unit should have a right to control the pipe and specify to which extent a range of the content of setting of a function for the pipe should be allowed, and a USB host interface is controlled in accordance with the content of setting of the access control register.

Abstract: A semiconductor integrated circuit device includes a first high-speed serial interface circuit which has one differential serial data channel and a second high-speed serial interface circuit which has a plurality of differential serial data channels, the first high-speed serial interface circuit performs interface with the outside for control information, and a control circuit performs an internal operation on the basis of the control information. Both of the high-speed serial interface circuits share a RAM for storage of display data information. Whether the data information to be supplied to the RAM is received by using the first high-speed serial interface circuit or the second high-speed serial interface circuit is determined by the control circuit in accordance with the control information that is input to the first high-speed serial interface circuit.

Abstract: The semiconductor integrated circuit incorporates a PLL circuit including a phase-frequency comparator 1, first and second charge pumps 2 and 3, a loop filter 4, a voltage-control oscillator 5 and a divider 6. The operation mode of the PLL circuit includes a standby state where locking is stopped, a lock response operation where locking is started and a steady lock operation where the locking started by the lock response operation is continued. In the steady lock operation, setting is made so that the second charge pump 3 is smaller in charge/discharge current than the first charge pump 2. The first and second charge pumps 2 and 3 charge and discharge the loop filter 4 in response to outputs of the phase-frequency comparator 1 in reverse to each other in phase. In the lock response operation where locking is started, the second charge pump 3 is stopped from charging and discharging in reverse in phase.

Abstract: A display control drive device sequentially reads display data from a display memory in which the display data is stored, produces three primary color image signals that are applied to pixel locations in a dot-matrix color display device, and transmits the signals through a common external output terminal in a time-sharing manner. The display control drive device produces control signals applied to selection switching elements in the display device and that selectively apply an input image signal to any of three source lines. The display control drive device includes: a unit that determines one horizontal period based on a clock received from outside synchronously with display data; and a signal production circuit that produces and transmits the control signals, applied to the selection switching elements, so that the control signals will have a pulse duration equivalent to a time calculated by trisecting one horizontal period.

Abstract: An object of the present invention is to provide a technique of reducing the leakage current of a drive circuit for driving a circuit that must retain a potential (or information) when in its standby state. A semiconductor integrated circuit device of the present invention includes a drive circuit for driving a circuit block. This drive circuit is made up of a double gate transistor with gates having different gate oxide film thicknesses. When the circuit block is in its standby state, the gate of the double gate transistor having a thinner gate oxide film is turned off and that having a thicker gate oxide film is turned on. This arrangement allows a reduction in the leakage currents of both the circuit block and the drive circuit while allowing the drive circuit to deliver or cut off power to the circuit block.

Abstract: The present invention provides a friction plate having a friction surface formed by sticking an annular friction material to a substantially annular core plate and wherein the friction surface is provided with a first oil groove having an opening portion opened to an inner peripheral edge of the friction plate and an end terminating at a point between the inner peripheral edge and an outer peripheral edge, and a second oil groove having an opening portion opened to the outer peripheral edge of the friction plate and an end terminating at a point between the inner peripheral edge and the outer peripheral edge.

Abstract: A semiconductor integrated circuit which reduces and increase in the level of a harmonic signal of an RF transmission output signal at the time of supplying an RF transmission signal to a bias generation circuit of an antenna switch, including an antenna switch having a bias generation circuit, a transmitter switch, and a receiver switch. The on/off state of a transistor of the transmitter switch coupled between a transmitter port and an I/O port is controlled by a transmit control bias. The on/off state of the transistors of the receiver switch coupled between the I/O port and a receiver port is controlled by a receiver control bias. An RF signal input port of the bias generation circuit is coupled to the transmit port, and a negative DC output bias generated from a DC output port is supplied to a gate control port of transistors of the receiver switch.

Abstract: A high-performance angular rate detecting device is provided. A driving part including a drive frame and a Coriolis frame is levitated by at least two fixing beams which share a fixed end and are extending in a direction orthogonal to a driving direction, thereby vibrating the driving part. Even when a substrate is deformed by mounting or heat fluctuation, internal stress generated to the fixed beam and a supporting beam is small, thereby maintaining a vibrating state such as resonance frequency and vibration amplitude constant. Therefore, a high-performance angular rate detecting device which is robust to changes in mounting environment can be obtained.

Abstract: A solar energy collection system includes a primary solar receiver and a secondary solar receiver. The secondary solar receiver generates steam using energy from solar radiation incident thereon. The primary solar receiver receives the generated steam from the secondary solar receiver and superheats the steam using energy from solar radiation incident thereon. A plurality of heliostat-mounted mirrors reflects incident solar radiation onto one of the primary and secondary solar receivers. A controller aims a portion of the heliostat-mounted mirrors at the primary solar receiver such that a predetermined thermal profile is provided on a surface of the primary solar receiver.

Abstract: A microcomputer is provided having a memory card interface capable of correctly latching data even when a card such as an MMC card is connected thereto. In the microcomputer having an interface with an external device such as a memory card, the interface unit is provided with an output driver connected to an external terminal for outputting a clock signal to output the clock signal and with an equivalent load circuit capable of imparting, to the clock signal extracted from an arbitrary position in a stage previous to the output driver in a clock signal path, delay equivalent to delay resulting from an external load connected to the external terminal in order to generate a clock signal for latching data inputted from the memory card.