Patents Represented by Attorney Mirna Abyad
  • Patent number: 8345996
    Abstract: Several methods and a system to perform determination of a field referencing pattern are disclosed. In one aspect, a method is disclosed. A motion vector of a previously coded frame is analyzed using a processor and a memory. A statistic is updated based on whether the motion vector includes one or more of a fractional pel vertical component, a half pel vertical component, and an integer pel vertical component. A field referencing pattern of a target field is determined based on the statistic and an exception protocol.
    Type: Grant
    Filed: May 14, 2009
    Date of Patent: January 1, 2013
    Assignee: Texas Instruments Incorporated
    Inventors: Arun Shankar Kudana, Soyeb Nagori
  • Patent number: 8340278
    Abstract: A method and apparatus for cross-talk resistant adaptive noise cancellation.
    Type: Grant
    Filed: October 7, 2010
    Date of Patent: December 25, 2012
    Assignee: Texas Instruments Incorporated
    Inventors: Baboo Vikrhamsingh Gowreesunker, Takahiro Unno, Muhammad Zubair Ikram
  • Patent number: 8340351
    Abstract: A method and apparatus for eliminating unwanted objects in a streaming image. The method includes recognizing unwanted objects in a streaming image and eliminating the recognized unwanted objects from the streaming image.
    Type: Grant
    Filed: July 1, 2009
    Date of Patent: December 25, 2012
    Assignee: Texas Instruments Incorporated
    Inventor: Timothy A. Adcock
  • Patent number: 8341566
    Abstract: A method for generating and evaluating a table model for circuit simulation in N dimensions employing mathematical expressions for modeling a device. The table model uses an unstructured N-dimensional grid for approximating the expressions.
    Type: Grant
    Filed: February 22, 2012
    Date of Patent: December 25, 2012
    Assignee: Texas Instruments Incorporated
    Inventor: Gang Peter Fang
  • Patent number: 8340354
    Abstract: A method and apparatus for detecting at least one of a location and a scale of an object in an image. The method comprising distinguishing the trailing and leading edges of a moving object in at least one portion of the image, applying a symmetry detection filter to at least a portion of the image to produce symmetry scores relating to the at least one portion of the image, and identifying at least one location corresponding to locally maximal symmetry scores of the symmetry scores relating to the at least one portion of the image, and utilizing the at least one location of the locally maximal symmetry scores to detect at least one of a location and a scale of the object in the image, wherein the scale relates to the size of the symmetry detection filter.
    Type: Grant
    Filed: January 21, 2010
    Date of Patent: December 25, 2012
    Assignee: Texas Instruments Incorporated
    Inventor: Vinay Sharma
  • Patent number: 8332736
    Abstract: A decoder provided according to an aspect of the present invention determines a type of each network abstraction layer (NAL) unit, and discards a NAL unit when the size of the NAL unit is inconsistent with the size according to the determined type. According to another aspect, a decoder corrects for errors in the non-pay load portions and uses the corrected non-pay load portions to recover the original data contained in the payload portions of the data stream. In an embodiment, various global parameters (which are applicable to the data stream unless changed further in the data stream) and the values in the slice headers are examined to correct the parameters in the slice headers. According to one more aspect, an end of frame is reliably detected by using an expected number of macro-blocks in a frame and a set of logical conditions of slice header parameters.
    Type: Grant
    Filed: November 28, 2008
    Date of Patent: December 11, 2012
    Assignee: Texas Instruments Incorporated
    Inventor: Manisha Agrawal Mohan
  • Patent number: 8228395
    Abstract: In a digital still camera, pixel values representing an image frame in a first format are stored in a memory. The pixel values of the image frame in the first format are converted to a second format. The pixel values in the second format are stored in the memory by overwriting at least a portion of the pixel values in the first format. Memory space is thus conserved by the overwriting, thereby requiring reduced memory for storage of pixel values in the digital still camera. The minimum delay (shot to shot interval) required between user-indicated image capture instances is also reduced.
    Type: Grant
    Filed: August 17, 2009
    Date of Patent: July 24, 2012
    Assignee: Texas Instruments Incorporated
    Inventors: Kedar Satish Chitnis, Jacob Jose
  • Patent number: 8201004
    Abstract: An embedded megamodule and an embedded CPU enable power-saving through a combination of hardware and software. The CPU configures the power-down controller (PDC) logic within megamodule and can software trigger a low-power state of logic modules during processor IDLE periods. To wake from this power-down state, a system event is asserted to the CPU through the module interrupt controller. Thus the entry into a low-power state is software-driven during periods of inactivity and power restoration is on system activity that demands the attention of the CPU.
    Type: Grant
    Filed: September 14, 2007
    Date of Patent: June 12, 2012
    Assignee: Texas Instruments Incorporated
    Inventors: Timothy David Anderson, Lewis Nardini, Jose Luis Flores, Abhijeet Chachad, Raguram Damodaran, Joseph R. M. Zbiciak, Gary Swoboda
  • Patent number: 8199706
    Abstract: UE-initiated accesses within a cellular network are optimized to account for Doppler shift. A user equipment (UE) receives information that designates a particular access slot as high-speed and designates another access slot as low-speed within a given cell. The UE determines its relative speed to a serving base station (NodeB) within the cell. The UE selects either a baseline structure or an alternate structure if the relative speed is less than a threshold value or only an alternate structure if the relative speed exceeds the threshold value. The UE transmits a signal to the NodeB using the selected structure, such that the baseline structure is transmitted only in the designated low-speed access slot and that the alternate structure is transmitted only in the designated high-speed request slot.
    Type: Grant
    Filed: October 26, 2007
    Date of Patent: June 12, 2012
    Assignee: Texas Instruments Incorporated
    Inventors: Pierre Bertrand, Tarik Muharemovic, Jing Jiang
  • Patent number: 8194141
    Abstract: A method and apparatus motion triggered image stabilization. The method includes computing projection vector for at least a portion of a frame of an image using horizontal and vertical sums, performing motion estimation utilizing projection vector with the shift of the projection vector from a previous frame, performing temporal IIR filter on the motion vector, calculating the maximum horizontal and vertical motion vectors, obtaining exposure time based on the horizontal and vertical motion vectors and the gain, returning the exposure time and the gain to the auto-exposure, utilizing the returned exposure time and gain, and producing a frame with less motion blur.
    Type: Grant
    Filed: September 11, 2009
    Date of Patent: June 5, 2012
    Assignee: Texas Instruments Incorporated
    Inventors: Rajesh Narasimha, Aziz Umit Batur
  • Patent number: 8179446
    Abstract: A method of processing a digital video sequence is provided that includes estimating compensated motion parameters and compensated distortion parameters (compensated M/D parameters) of a compensated motion/distortion (M/D) affine transformation for a block of pixels in the digital video sequence, and applying the compensated M/D affine transformation to the block of pixels using the estimated compensated M/D parameters to generate an output block of pixels, wherein translational and rotational jitter in the block of pixels is stabilized in the output block of pixels and distortion due to skew, horizontal scaling, vertical scaling, and wobble in the block of pixels is reduced in the output block of pixels.
    Type: Grant
    Filed: March 3, 2010
    Date of Patent: May 15, 2012
    Assignee: Texas Instruments Incorporated
    Inventors: Wei Hong, Dennis Wei, Aziz Umit Batur
  • Patent number: 8181067
    Abstract: An interface unit is provided in a JTAG test and debug procedure involving a plurality of processor cores. The interface unit includes a TAP unit. A switch unit is coupled to the interface unit and switch units are coupled to each of the plurality of processor/cores. When the processor/cores have advanced power management systems, a sleep inhibit signal can be applied to the processor/core state machine preventing the state machine from entering a lower power state. The parameters of the processor/core can be tested to determine when the test and debug procedures can be implemented. When the (power) parameters are to low to permit test and debug, the test and debug unit can provide a command forcing the state machine into a state for which test and debug procedures can be implemented.
    Type: Grant
    Filed: January 20, 2009
    Date of Patent: May 15, 2012
    Assignee: Texas Instruments Incorporated
    Inventor: Robert A. McGowan
  • Patent number: 8175147
    Abstract: Video encoding (such as H.263, MPEG-4, H.264/AVC) modifies TMN5-type rate control frame skipping and quantization parameter updating according to buffer fullness levels with I-frame initial quantization parameter values depend upon quantization parameter value of prior P-frames but also has within I-frame prediction and parameter increase to avoid excessive bits. And variable input frame rate is accommodated by adjusting buffer fullness measures. The quantization also applies to image compression.
    Type: Grant
    Filed: August 3, 2006
    Date of Patent: May 8, 2012
    Assignee: Texas Instruments Incorporated
    Inventors: Jennifer L. H. Webb, Sreenivas Kothandaraman
  • Patent number: 8165202
    Abstract: The video encoding rate control with the quantization parameter for basic units of macroblocks of a picture adapting to deviation from the average quantization parameter over pictures of the same type (i.e., I-pictures, P-pictures, and B-pictures).
    Type: Grant
    Filed: March 30, 2007
    Date of Patent: April 24, 2012
    Assignee: Texas Instruments Incorporated
    Inventors: Akihiro Yonemoto, Masato Shima
  • Patent number: 8160872
    Abstract: A layered code-excited linear prediction (CELP) encoder, an Adaptive Multirate Wideband (AMR-WB) encoder and methods of CELP encoding and decoding. In one embodiment, the encoder includes: (1) a core layer subencoder and (2) at least one enhancement layer subencoder, at least one of the core layer subencoder and the enhancement layer subencoder having first and second adaptive codebooks and configured to retrieve a pitch lag estimate from the second adaptive codebook and perform a closed-loop search of the first adaptive codebook based on the pitch lag estimate.
    Type: Grant
    Filed: April 3, 2008
    Date of Patent: April 17, 2012
    Assignee: Texas Instruments Incorporated
    Inventor: Jacek P. Stachurski
  • Patent number: 8160144
    Abstract: Motion estimation in video encoding switches among motion estimation methods for successive predicted pictures depending upon statistics of prior pictures. Locally averaged motion vectors, fraction of intra-coded macroblocks, average quantization parameter, and so forth provide tests for applicability of particular motion estimation methods, such as ones which perform better for large motion or perform better for small motion with complex texture.
    Type: Grant
    Filed: April 20, 2007
    Date of Patent: April 17, 2012
    Assignee: Texas Instruments Incorporated
    Inventors: Srenivas Varadarajan, Mihir Narendra Mody, M V Ratna Reddy
  • Patent number: 8160150
    Abstract: Method, video encoders, and digital systems are provide in which motion vector determination includes selecting a plurality of candidate motion vectors for a macroblock using a cost function including both a block distortion measure and a motion vector cost measure for single-partition motion vectors in the plurality of candidate motion vectors and using a cost function including a distortion measure without a motion vector cost measure for multi-partition motion vectors in the plurality of candidate motion vectors, and refining the plurality of candidate motion vectors to obtain a refined plurality of candidate motion vectors, wherein multi-partition motion vectors of the plurality of candidate motion vectors are refined using a cost function including a distortion measure without a motion vector cost measure and single-partition motion vectors of the plurality of candidate motion vectors are refined using a cost function including both a block distortion measure and a motion vector cost measure.
    Type: Grant
    Filed: April 9, 2008
    Date of Patent: April 17, 2012
    Assignee: Texas Instruments Incorporated
    Inventor: Darnell J. Moore
  • Patent number: 8151031
    Abstract: A digital signal processor (DSP) co-processor according to a clustered architecture with local memories. Each cluster in the architecture includes multiple sub-clusters, each sub-cluster capable of executing one or two instructions that may be specifically directed to a particular DSP operation. The sub-clusters in each cluster communicate with global memory resources by way of a crossbar switch in the cluster. One or more of the sub-clusters has a dedicated local memory that can be accessed in a random access manner, in a vector access manner, or in a streaming or stack manner. The local memory is arranged as a plurality of banks. In response to certain vector access instructions, the input data may be permuted among the banks prior to a write, or permuted after being read from the banks, according to a permutation pattern stored in a register.
    Type: Grant
    Filed: March 6, 2009
    Date of Patent: April 3, 2012
    Assignee: Texas Instruments Incorporated
    Inventors: Eric Biscondi, David J. Hoyle, Tod D. Wolf
  • Patent number: 8146031
    Abstract: A method for generating and evaluating a table model for circuit simulation in N dimensions employing mathematical expressions for modeling a device. The table model uses an unstructured N-dimensional grid for approximating the expressions.
    Type: Grant
    Filed: December 4, 2008
    Date of Patent: March 27, 2012
    Assignee: Texas Instruments Incorporated
    Inventor: Gang Peter Fang
  • Patent number: 8126707
    Abstract: Methods, encoders, and digital systems are provided for predictive encoding of speech parameters in which an input frame is encoded by quantizing a parameter vector of the input frame with a strongly-predictive codebook and a weakly-predictive codebook to obtain a strongly-predictive distortion and a weakly-predictive distortion, adjusting a correlation indicator based on a relative correlation of the input frame to a previous frame, wherein the correlation indicator is indicative of the strength of the correlation of previously encoded frames, and encoding the input frame with the weakly-predictive codebook unless the correlation indicator has reached a correlation threshold.
    Type: Grant
    Filed: April 4, 2008
    Date of Patent: February 28, 2012
    Assignee: Texas Instruments Incorporated
    Inventors: Ali Erdem Ertan, Jacek Stachurski