Abstract: An interconnection element that includes a first element material adapted to be coupled to a substrate and a second element material comprising a material having a transformable property such that upon transformation, a shape of the interconnection is modified. An example is a material that has a transformable property such that a volume of the first and/or second element material may undergo a thermal transformation from one volume to a different volume (such as a smaller volume).

Abstract: Apparatuses and methods for cleaning test probes used in a semiconductor testing machine of the type having a plurality of test probes configured to contact the surface of a semiconductor wafer to test one or more dies formed thereon. In one embodiment, the apparatus includes a roller-support arm and a cylindrical roller supported by the roller-support arm. The roller has an outer surface comprising a sticky material. Debris on the probes will adhere to the sticky material as roller is rolled across tips of the probes. The probes are thereby cleaned.

Abstract: Resilient spring contacts for use in wafer test probing are provided that can be manufactured with a very fine pitch spacing and precisely located on a support substrate. The resilient contact structures are adapted for wire bonding to an electrical circuit on a space transformer substrate. The support substrates with attached spring contacts can be manufactured together in large numbers and diced up and tested before attachment to a space transformer substrate to improve yield. The resilient spring contacts are manufactured using photolithographic techniques to form the contacts on a release layer, before the spring contacts are epoxied to the support substrate and the release layer removed. The support substrate can be transparent to allow alignment of the contacts and testing of optical components beneath. The support substrate can include a ground plane provided beneath the spring contacts for improved impedance matching.

Abstract: An interconnect assembly can include a semiconductor device that is to be tested, and the semiconductor device can include compliant, elongate contact structures that provide an electrical interface to the semiconductor device. The interconnect assembly can also include a flexible wiring substrate, which can have electrical connections to a semiconductor tester. The flexible wiring substrate can also include electrically conductive contact features located on the substrate in a pattern that corresponds to the elongate contact structures of the semiconductor device to be tested. The flexible wiring substrate can also include wiring that interconnects the probes to the electrical connections to the semiconductor tester. The semiconductor device can be located such that some of the elongate contact structures of the semiconductor device are near some of the conductive contact features of the substrate.

Abstract: A system is provided to enable leakage current measurement or parametric tests to be performed with an isolation buffer provided in a channel line. Multiple such isolation buffers are used to connect a single signal channel to multiple lines. Leakage current measurement is provided by providing a buffer bypass element, such as a resistor or transmission gate, between the input and output of each buffer. The buffer bypass element can be used to calibrate buffer delay out of the test system by using TDR measurements to determine the buffer delay based on reflected pulses through the buffer bypass element. Buffer delay can likewise be calibrated out by comparing measurements of a buffered and non-buffered channel line, or by measuring a device having a known delay.

Abstract: Traces routed through a computer depiction of a routing area of a system, such as an electronics system, comprise a plurality of connected nodes. The traces may be smoothed, straightened, or otherwise adjusted (e.g., to correct design rule violations) by assigning forces to the nodes and moving the nodes in accordance with the nodes. The forces may be based on such things as the proximity of the nodes to each other and to obstacles in the routing area.

Abstract: A probe card assembly, according to some embodiments of the invention, can comprise a tester interface configured to make electrical connections with a test controller, a plurality of electrically conductive probes disposed to contact terminals of an electronic device to be tested, and a plurality of electrically conductive data paths connecting the tester interface and the probes. At least one of the data paths can comprise an air bridge structure trace comprising an electrically conductive trace spaced away from an electrically conductive plate by a plurality of pylons.

Abstract: A probe system for providing signal paths between an integrated circuit (IC) tester and input/output, power and ground pads on the surfaces of ICs to be tested includes a probe board assembly, a flex cable and a set of probes arranged to contact the IC's I/O pads. The probe board assembly includes one or more rigid substrate layers with traces and vias formed on or within the substrate layers providing relatively low bandwidth signal paths linking the tester to probes accessing some of the IC's pads. The flex cable provides relatively high bandwidth signal paths linking the tester to probes accessing others of the IC's pads.

Abstract: Interconnect assemblies having resilient contact elements and methods for making these assemblies. In one aspect, the interconnect assembly includes a substrate and a resilient electrical contact element disposed on the substrate. A first portion of the resilient contact structure is disposed on the substrate and a second portion extends away from the substrate and is capable of moving from a first position to a second position under the application of a force. A stop structure is disposed on the surface of the substrate and on a surface of the first portion of the resilient contact structure. According to another aspect of the present invention, a beam portion of the resilient contact structure has a substantially triangular shape.

Abstract: A cooling assembly includes a package with one or more dies cooled by direct cooling. The cooled package includes one or more dies with active electronic components. A coolant port allows a coolant to enter the package and directly cool the active electronic components of the dies.

Abstract: A method of designing and manufacturing a probe card assembly includes prefabricating one or more elements of the probe card assembly to one or more predefined designs. Thereafter, design data regarding a newly designed semiconductor device is received along with data describing the tester and testing algorithms to be used to test the semiconductor device. Using the received data, one or more of the prefabricated elements is selected. Again using the received data, one or more of the selected prefabricated elements is customized. The probe card assembly is then built using the selected and customized elements.

Abstract: Double-sided interposer assemblies and methods for forming and using them. In one example of the invention, an interposer comprises a substrate having a first surface and a second surface opposite of said first surface, a first plurality of contact elements disposed on said first side of said substrate, and a second plurality of contact elements disposed on said second surface of said substrate, wherein said interposer connects electronic devices via said first and said second plurality of contact elements.

Abstract: A high fidelity “loop-back” or interconnection of terminal pads of an IC on a wafer being tested in production is provided, while simultaneously a DC or low frequency path is provided back to a test system. Two or more IC pads are connected by probes forming the “loop-back,” each probe forming an inductor, the probes being connected together through a trace in a substrate. A capacitor is then provided on a layer of the substrate connected to the trace to form a three-pole filter. To provide isolation of high frequency self-test signals between the probes and lower frequency signals of the test system, an inductor is placed in the path between the tester and probes. The inductor provides an “AC” or high frequency block between the test system and probes, while still allowing the test system to use DC or low frequency signals to verify continuity, leakage, and perform other DC parametric tests.

Abstract: A probe card apparatus is configured to have a desired overall amount of compliance. The compliance of the probes of the probe card apparatus is determined, and an additional, predetermined amount of compliance is designed into the probe card apparatus so that the sum of the additional compliance and the compliance of the probes total the overall desired compliance of the probe card apparatus.

Abstract: An interconnection element of a spring (body) including a first resilient element with a first contact region and a second contact region and a first securing region and a second resilient element, with a third contact region and a second securing region. The second resilient element is coupled to the first resilient element through respective securing regions and positioned such that upon sufficient displacement of the first contact region toward the second resilient element, the second contact region will contact the third contact region. The interconnection, in one aspect, is of a size suitable for directly contacting a semiconductor device. A large substrate with a plurality of such interconnection elements can be used as a wafer-level contactor. The interconnection element, in another aspect, is of a size suitable for contacting a packaged semiconductor device, such as in an LGA package.

Abstract: A probe card assembly can comprise a support structure to which a plurality of probes can be directly or indirectly attached. The probes can be disposed to contact an electronic device to be tested. The probe card assembly can further comprise actuators, which can be configured to change selectively an attitude of the support structure with respect to a reference structure. The probe card assembly can also comprise a plurality of lockable compliant structures. While unlocked, the lockable compliant structures can allow the support structure to move with respect to the reference structure. While locked, however, the compliant structures can provide mechanical resistance to movement of the support structure with respect to the reference structure.

Abstract: A system is provided for controlling the delay in an isolation buffer. Multiple such isolation buffers are used to connect a single signal channel to multiple lines and controlled to provide an equal delay. Isolation buffer delay is controlled to be uniform by varying either power supply voltage or current. A single delay control circuit forming a delay-lock loop supplies the delay control signal to each buffer to assure the uniform delay. Since controlling delay can also vary the output voltage of each isolation buffer, in one embodiment buffers are made from two series inverters: one with a variable delay, and the second without a variable delay providing a fixed output voltage swing. To reduce circuitry needed, in one embodiment an isolation buffer with a variable power supply is provided in a channel prior to a branch, while buffers having a fixed delay are provided in each branch.

Abstract: In a probe card assembly, a series of probe elements can be arrayed on a silicon space transformer. The silicon space transformer can be fabricated with an array of primary contacts in a very tight pitch, comparable to the pitch of a semiconductor device. One preferred primary contact is a resilient spring contact. Conductive elements in the space transformer are routed to second contacts at a more relaxed pitch. In one preferred embodiment, the second contacts are suitable for directly attaching a ribbon cable, which in turn can be connected to provide selective connection to each primary contact. The silicon space transformer is mounted in a fixture that provides for resilient connection to a wafer or device to be tested. This fixture can be adjusted to planarize the primary contacts with the plane of a support probe card board.

Abstract: An interconnection apparatus and a method of forming an interconnection apparatus. Contact structures are attached to or formed on a first substrate. The first substrate is attached to a second substrate, which is larger than the first substrate. Multiple such first substrates may be attached to the second substrate in order to create an array of contact structures. Each contact structure may be elongate and resilient and may comprise a core that is over coated with a material that imparts desired structural properties to the contact structure.

Abstract: Techniques for performing wafer-level burn-in and test of semiconductor devices include a test substrate having active electronic components such as ASICs mounted to an interconnection substrate or incorporated therein, metallic spring contact elements effecting interconnections between the ASICs and a plurality of devices-under-test (DUTs) on a wafer-under-test (WUT), all disposed in a vacuum vessel so that the ASICs can be operated at temperatures independent from and significantly lower than the burn-in temperature of the DUTs. The spring contact elements may be mounted to either the DUTs or to the ASICs, and may fan out to relax tolerance constraints on aligning and interconnecting the ASICs and the DUTs. Physical alignment techniques are also described.