Abstract: A digital display unit including an analog to digital converter (ADC). When the optimal sampling frequency for sampling an analog display signal is greater than the maximum sampling frequency of the ADC, the analog display signal is sampled using 2:1' interleaved sampling. A smaller image represented by the sampled values is then upscaled prior to being displayed. Such upscaling compensates for the decreased number of samples that would be generated by sampling at lower sampling frequency during 2:1 interleaved sampling.

Abstract: A digital display unit for enabling a user to conveniently select a desired monitor mode to process a display signal. A monitor mode is generally selected by measuring some display signal parameters. If multiple source modes share the same display signal values, all the corresponding monitor modes are stored associated with these common display signal parameter values. The user is provided a convenient interface (such as pushing a button or using a menu provided with an on-screen-display) to cause the display monitor to change the monitor mode. The next monitor mode is again among those associated with the measured display signal parameter values. Accordingly, all the monitor modes associated with the measured display signal parameters can be tried using the interface until a satisfactory display is obtained on the display unit.

Abstract: A television system (TV) with an interlaced display screen for displaying network application data. Pixel data elements representing network application data display are received in a non-interlaced mode. The received data is filtered to reduce sharp transitions in the display. The filtered data is provided in an interlaced format (i.e., only alternate lines of a frame) for display on the television display screen. The interlaced image display is combined with the television signal display by selecting one of them on point by point basis. Flicker is reduced substantially in the final display of network application data due to the filtering.

Abstract: An upscaler for upscaling a source image to generate a destination image without requiring large buffers. The aspect ratio (ratio of the length of the source image to that of the width) of the source image need not equal the aspect ratio of the destination image. The source image pixel data is received at a first clock rate and the destination image is generated at a second clock rate. The second clock rate is computed such that the frame rate at which the source image is received is the same as the frame rate at which the upscaled image is generated. Because of such a clock rate, the upscaler may be implemented using only a line buffer.

Abstract: A memory controller for controlling accesses to a memory storing display entities including network application data displayed on a display screen of a television system. For performing a display screen refresh operation, the network application data is retrieved with a predetermined period. Accordingly, the memory controller determines an expected time for receiving the next request for retrieving the network application data for screen refresh. The memory controller bolcks any lower priority memory access requests from a few clock cycles prior to the determined expected time. As a result, the requests for retrieving network application data can be serviced in an acceptable time.

Abstract: A computer system in which the signal parameters of an analog display signal received by a display unit can be determined automatically. A test data having a predetermined format is sent to a display unit. The test data is encoded to enable display unit to measure display signal parameters such as the timing signals (e.g., start position of each horizontal line) accurately. The test data also includes black and white points, which enable the display unit to measure the voltage levels used to represent black and white signals. Display unit can accordingly adjust the manner in which individual points on a display screen are actuated so that the full scale of brightness levels on individual points can be utilized. CRC-based techniques are used to indicate to the display unit the presence of the test data as the same communication path is used to send test data and display data.

Abstract: A television system (TV) with an interlaced display screen for displaying network application data. Pixel data elements representing network application data display are received in a non-interlaced mode. The received data is filtered to reduce sharp transitions in the display. The filtered data is provided in an interlaced format (i.e., only alternate lines of a frame) for display on the television display screen. The interlaced image display is combined with the television signal display by selecting one of them on point by point basis. Flicker is reduced substantially in the final display of network application data due to the filtering.

Abstract: A television system (TV) which enables a user to view display represented by a television signal as well as to access data network applications. The TV includes an on-screen-display (OSD) controller which stores the network application data and other display entities in a memory module as separate bit maps. A single image for display on a TV display screen is generated by overlaying all the display entities (including television signal, network application data, pointer, and low resolution data) according to a predetermined priority. Display entities (other than TV signal) are stored in separate portions of the memory module as independent surfaces to enable the displays of individual display entities to be generated and modified according to the individual display entity requirements.

Abstract: A display unit which can determine the frequency (original frequency) used by a graphics source for generating an analog signal. A sequence of test patterns are generated according to a predetermined convention. The sequence of test patterns are encoded in an analog display signal in a graphics source and transmitted to a digital display unit. The digital display unit samples the analog display signal to generate a sequence of sampled values. The digital display unit determines whether the sampled values equal one of the sequence of test patterns based on the predetermined convention. The digital display unit varies (changes) the sampling frequency until the sampled values equal one of the sequence of test patterns. The sampling frequency equals the original frequency when the sampled values equal the sequence of test patterns. In one embodiment, zeros and ones are used in alternate positions of each horizontal line.

Abstract: An automatic nasal aspirator for cleaning matter in the nasal canal of an infant. The aspirator includes a collection member for collecting the cleaned matter. The collection member is designed for insertion into the nasal canal. The aspirator further includes a hose having a first end and a second end with the first end being removably connected to the collection member. A motor is connected to the second end of the hose. The motor imparts a suction action to the collection member through the hose, wherein the suction action causes the matter to be cleaned from the nasal canal and collected in the collection member.

Abstract: A clock recovery circuit in a digital display unit for recovering a time reference signal associated with analog display data. The clock recovery circuit includes a phase-locked loop (PLL) implemented in digital domain and an analog filter to eliminate any undesirable frequencies from the output signal of the PLL. The PLL includes independent control loops to track long term frequency drifts of the time reference signal and the transient phase differences respectively. By providing such independent control loops, the generated clock can be better synchronized with the time reference signal.

Abstract: An upscaler for upscaling a source image to generate a destination image without having to maintain the aspect ratio (ratio of the length of the source image to that of the width) of the source image. The source image pixel data is received at a first clock rate and the destination image is generated at a second clock rate. The second clock rate is computed such that the frame rate at which the source image is received is the same as the frame rate at which the upscaled image is generated. Because of such a clock rate, the upscaler may be implemented only a line buffer for upscaling a source image. Prior systems may require large memories such as frame buffers for achieving similar functionality.

Abstract: A peripheral device capable of generating interrupt request signals compliant with the Industry Standard Architecture (ISA) protocol, and the Peripheral Component Interconnect (PCI) protocol. The peripheral device comprises a signal generator block which selectively generates either the interrupt request signals of the PCI protocol or a set of bits representative of interrupt request signals of the ISA protocol. The set of bits are transferred serially to a converter circuit which generates the interrupt request signals of the ISA protocol based on the bits. The signal generator block generates bits in such a way as to support both pulse mode and level mode interrupt request signals for the ISA protocol.