Abstract: A frog lure device that has a life-like swimming action. The device has a diving “collar” disposed around an upper region of the lure body, rather than a lower region, which is common in conventional lure devices. In a specific embodiment, the collar causes the lure body to dive under the surface like a frog. Concurrent with the diving action, the lure device also has a kicking action to resemble a living frog device. The collar also forms a trail of one or more bubbles and a vortex, or slight vacuum behind it. In a specific embodiment, the lure body includes a pair of legs, which have a suitable length to be caught in the vortex and become trapped in the vortex. the pair of legs also straighten out to cause a kicking action and also provide stability to the lure body as it accelerates through the water.

Abstract: A headphone having reduced-tangling potential includes an audio plug for receive electrical signals from an audio device, coupled via wires to ear buds, wherein the ear buds are for receiving electrical signals and outputting audio, wires coupled to the audio plug and to the pair of ear buds, wherein the coupling wire is configured to provide the electrical signals from the audio plug to at least the pair of ear buds, and a restraint device having a pliable material body having an interior channel, wherein the channel restrains movement of the separate ear buds a first resistance, when the audio plug is inserted into the channel, and wherein the channel restrains movement the separate ear buds by a second resistance, when the audio portion is separated from the channel, wherein the first resistance amount exceeds the second resistance amount.

Abstract: A non-volatile memory device includes a first select transistor, a second select transistor, and a first string of first memory cells provided between the first and second select transistors. Each first memory cell has a first resistive memory cell and a first transistor. The first resistive memory cell is in series with a gate of the first transistor. The non-volatile memory device further includes a first bit line coupled to a drain of the first select transistor and a plurality of word lines. Each word line is coupled to one of the first memory cells.

Abstract: A system for providing network infrastructure for energy management and control is disclosed. A controller integrates powerline and wireless networking technologies in order to provide an integrated network. A gateway sends and receives command and control data across the integrated network. Client devices may connect to the integrated network and perform a variety of functions. An appliance module may send and receive data across the integrated network in relation to a particular appliance. A panel meter may send and receive data across the integrated network in relation to data measured at a distribution panel. A serial bridge may connect various devices to the integrated network. Computing devices may remotely or locally connect to the integrated network and send and receive data.

Abstract: A non-volatile memory device includes an array of memory units, each having resistive memory cells and a local word line. Each memory cell has a first and a second end, the second ends are coupled to the local word line of the corresponding memory unit. Bit lines are provided, each coupled to the first end of each resistive memory cell. A plurality of select transistors is provided, each associated with one memory unit and having a drain terminal coupled to the local word line of the associated memory unit. First and second global word lines are provided, each coupled to a control terminal of at least one select transistor. First and second source lines are provided, each coupled to a source terminal of at least one select transistor. The memory device is configured to concurrently read out all resistive memory cells in one selected memory unit in a read operation.

Abstract: There is disclosed a memory system and method. The memory system may include a plurality of memory planes including two or more data memory areas, and a memory controller adapted to controlling reading, writing, and erasing of the plurality of memory planes. When any one of the data memory areas is occupied with one of a write operation and an erase operation, the controller may reconstruct data stored in the one occupied data memory area by reading parity information and data stored in the plurality of memory areas other than the one occupied data memory area.

Abstract: A method of designing and manufacturing a solid-state electrochemical battery cell for a battery device. The method includes building a database of a plurality of first characteristics of a solid-state cells for a battery device and determining at least a third characteristic of the solid-state cell for a given application. The method also includes selecting at least one material of the solid-state electrochemical battery cell, the selected material being from the plurality of first characteristics and forming a plurality of factorial combinations of each component using the selected plurality of first characteristics to derive a respective plurality of solid-state electrochemical battery cells. The method performs a design optimization process for the third characteristic. A step of identifying an optimal design of the second characteristics with the selected first characteristics for each solid-state electrochemical battery cell from the plurality of solid-state cells is included.

Abstract: A sequence of data packets is received within an integrated circuit device and stored within a first memory thereof. Error descriptor values are updated within a second memory of the integrated circuit device based on error information associated with the sequence of data packets. The error descriptor values each include an address field to specify a corresponding storage region of the first memory and an error field to specify an error status of data values stored within the storage region. A sequence of multiple-bit error values are generated based, at least in part, on the error fields and address fields within respective subsets of the error descriptor values. Concurrently with generation of at least one of the multiple-bit error values the state of one or more bits of the data values stored in the first memory based are changed based on a previously-generated one of the multiple-bit error values.

Abstract: A headphone having reduced tendency to tangle comprises an input portion for receiving electrical signals from an output device, an output portion for providing audio signals to a user in response to the electrical signals, a plurality of wires coupled to the input portion and the output portion for providing the electrical signals to the output portion, and a restraint mechanism coupled to the plurality of wires and cable of being repositioned along the plurality of wire, wherein the restraint mechanism is for physically receiving insertion of at least a portion of the input portion and for physically restraining movement of the portion of input portion with respect to output portion when the portion of the input portion is physically inserted into the restraint mechanism, wherein a temporary and removable closed loop of wire is formed from the plurality of wires, until a sufficient separation force is applied.

Abstract: A method for programming a two terminal resistive memory device, the method includes applying a bias voltage to a first electrode of a resistive memory cell of the device; measuring a current flowing through the cell; and stopping the applying of the bias voltage if the measured current is equal to or greater than a predetermined value.

Abstract: A solar energy system. The system includes a thermal solar system comprising an air plenum positioned between the system and the underside body. In a specific embodiment, the air plenum is configured according to a specified aspect ratio. The system uses an air moving device to transfer a volume of air through the plenum. The air moving device is configured to maintain a flow rate associated with the volume of air at a specified velocity. The air plenum is configured to reduce the particle concentration of the air traveling through the plenum and to undergo heat treatment for use inside the target building where the thermal solar system is implemented, which keeps the air entering the building clean and healthy.

Abstract: A system for providing network infrastructure for energy management and control is disclosed. A controller integrates powerline and wireless networking technologies in order to provide an integrated network. A gateway sends and receives command and control data across the integrated network. Client devices may connect to the integrated network and perform a variety of functions. An appliance module may send and receive data across the integrated network in relation to a particular appliance. A panel meter may send and receive data across the integrated network in relation to data measured at a distribution panel. A serial bridge may connect various devices to the integrated network. Computing devices may remotely or locally connect to the integrated network and send and receive data.

Abstract: A method for purifying silicon bearing materials for photovoltaic applications includes providing metallurgical silicon into a crucible apparatus. The metallurgical silicon is subjected to at least a thermal process to cause the metallurgical silicon to change in state from a first state to a second state, the second stage being a molten state not exceeding 1500 Degrees Celsius. At least a first portion of impurities is caused to be removed from the metallurgical silicon in the molten state. The molten metallurgical silicon is cooled from a lower region to an upper region to cause the lower region to solidify while a second portion of impurities segregate and accumulate in a liquid state region. The liquid state region is solidified to form a resulting silicon structure having a purified region and an impurity region. The purified region is characterized by a purity of greater than 99.9999%.

Abstract: A method of forming a vertical interconnect for a memory device. The method includes providing a substrate having a surface region and defining a cell region, a first peripheral region, and a second peripheral region. A first thickness of dielectric material is formed overlying the surface region. A first bottom wiring structure spatially configured to extend in a first direction is formed overlying the first dielectric material for a first array of devices. A second thickness of a dielectric material is formed overlying the first wiring structure. The method includes forming an opening region in the first peripheral region. The opening region is configured to extend in a portion of at least the first thickness of dielectric material and the second thickness of dielectric material to expose a portion of the first wiring structure and to expose a portion of the substrate.

Abstract: The invention provides a solar concentrator structure including a first concentrating element. The first concentrating element includes a first aperture region, a first exit region, a first side and a second side. The solar concentrator structure further includes a second or more concentrating elements integrally coupled with the first concentrating element in a parallel manner. The second concentrating element includes a second aperture region, a second exit region, the third side, and a fourth side. The third side joins with the second side to form an apex notch structure characterized by a radius of curvature. Additionally, the solar concentrator structure includes a separation region by a width separating the first exit region from the second exit region and a triangular region including the apex notch structure and a base defined by the separation region and a refractive index of about 1 characterizing the triangular region.

Abstract: A solar cell concentrator structure includes a first concentrator element having a first aperture region and a first exit region including a first back surface region and a first corner region. The structure also includes a second concentrator element integrally formed with the first concentrator element. The second concentrator element includes a second aperture region and a second exit region-including a second back surface region and a second corner region. Additionally, the structure includes a first radius of curvature of 0.10 mm and less characterizing the first corner structure and the second corner structure, a first coupling region between the first exit region and a first surface region of a first photovoltaic device. The structure further includes a second radius of curvature of 0.10 mm and less characterizing a region between the first concentrator element and the second concentrator element.

Abstract: The present invention provides a method for forming high quality silicon material, e.g., polysilicon. The method includes transferring a raw silicon material in a crucible having an interior region. The crucible is made of a quartz or other suitable material, which is capable of withstanding a temperature of at least 1400 Degrees Celsius. The method includes subjecting the raw silicon material in the crucible to thermal energy to cause the raw silicon material to be melted into a liquid state to form a melted material at a temperature of less than about 1400 Degrees Celsius. Preferably, the melted material has an exposed region bounded by the interior region of the crucible.