Abstract: In a covered graphite slider apparatus for the liquid phase epitaxial growth of mercury cadmium telluride, this invention shows the addition of an improved wipe-off arrangement positioned in tandem with the CdTe substrate upon which the HgCdTe epitaxial layer is grown. This arrangement includes the providing of a discardable CdTe drainage apron adjacent the substrate for preventing residual growth solution from migrating back onto the substrate which has just been wiped-off by the LPE slider.

Abstract: A high-temperature hetero-epitaxial piezo-resistive pressure sensor in which an epitaxial layer of a wide-bandgap semiconductor such as GaAs is grown onto a silicon wafer and the piezoresistors are implanted into the wide-bandgap layer.

Abstract: A gaseous composition sensor which is a microstructure device comprising a heated planar thin film diaphragm sensor member suspended over a shallow flat bottomed etched pit in a single crystal silicon substrate.

Abstract: A three-dimensional CMOS integrated circuit structure in which two complementary field effect transistors are fabricated in vertical alignment with one another, and in which both transistors are single crystal and share a common crystal lattice structure and form a single unitary crystalline structure.

Abstract: A microscopic size absolute pressure sensor for air or gas of the thermal conductivity type, a silicon nitride covered silicon microchip has an elongated V-groove anisotropically etched in the silicon with a heated silicon nitride bridge element extending over the surface of the V-groove.

Abstract: A method for accurate front-to-back alignment of patterns onto a wafer for fabrication of multiple Burrus LED's. The front surface of the wafer has on it epitaxial layers, a dielectric layer and a metallization layer. The metallization layer includes perpendicular alignment indicia which intersect at metal contacts of the front surface of the wafer. The perimeter of the wafer is etched away to reveal the alignment indicia which when thus exposed are visible from the back side of the wafer. The exposed indicia is used to align holes in the backside metal contact to the metal contacts on the front surface.

Abstract: A self-aligned gate process for integrated circuits based on modulation doped (Al, Ga)As/GaAs field effect transistors and in which the regions on each side of the metal silicide gate are heavily ion implanted to form the low resistance regions on either side of the gate.

Abstract: A monolithic integrated focal plane sensor array having elements sensitive to IR radiation and elements sensitive to mm-wave radiation. The sensor elements of the array sensitive to mm-wave have microantennas coupled to the sensors.

Abstract: This invention describes the use of etch process monitors or indicators to improve the reproducibility of etching hourglass shaped mesas for buried heterostructure laser/amplifier structures or integrated optical components in III-V compounds (e.g. GaAs/AlGaAs or InP/InGaAsP).

Abstract: A piezoresisitve pressure sensor having a diaphragm of silicon nitride with a stressed resistor under the edge of the diaphragm in a single crystal supporting wafer. The signal is derived from the stress in the silicon where the diaphragm attaches to the edge of the opening etched through the silicon.

Abstract: The gated Transmission Line Model (GTLM) structure is a novel characterization device and measurement tool for integrated circuit process monitoring. This test structure has Schottky gates between the ohmic contacts of a TLM pattern. The gate lengths are varied and the gate-to- ohmic separations are kept constant to provide an accurate determination of several important FET channel parameters. It offers a precise method for measuring the FET source resistance which requires no parameter fitting and which works equally well on planar, self-aligned gate, and recessed gate FET's. In addition, the GTLM structure offers the only available means to measure sheet resistance of enhancement-mode FET channels. The gated-TLM structure can also be used to find the effective free surface potential. The structure may be combined with capacitance-voltage analysis or geometric magnetoresistance analysis to create mobility and doping profile of actual FET channels.

Abstract: An integrated quantum well laser structure which has a plurality of quantum well lasers for providing a plurality of light beams each having a different wavelength for use in wavelength division multiplexing.

Abstract: A high efficiency UV responsive negative electron affinity photocathode with the long wavelength cutoff tunable over the wavelength from .about.200 to .about.300 nm based on Al.sub.x Ga.sub.1-x N. Negative electron affinity photocathodes for sharply enhanced photoemission yield can be formed by applying a layer of cesium to the surface of Al.sub.x Ga.sub.1-x N for which the Fermi energy level is appropriately positioned.

Abstract: A method of preparing a UV detector of Al.sub.x Ga.sub.1-x N. Metal organic chemical vapor deposition (MOCVD) is utilized to grow AlN and then Al.sub.x Ga.sub.1-x N on a sapphire substrate. A photodetector structure is fabricated on the AlGaN.

Abstract: This invention is to a three dimensional active vision sensor. This invention uses a multifacet holographic scanner to move a laser spot across an object at high speed in a raster pattern and a digital position detector to give a highly accurate, low noise, digital representation of the angle to the laser spot on the object. The integration of these two devices is a unique solution for providing range (3-dimensional data) of an arbitrary object in real time.

Abstract: In a covered graphite slider apparatus for the liquid phase epitaxial growth of mercury cadmium telluride this invention shows the addition of a wipe-off well into the moving part of the slider apparatus, which well contains pieces of CdTe to assist wipe-off of HgCdTe following LPE growth.

Abstract: An O.sub.2 sensor built on a silicon chip which has a SiO.sub.2 dielectric layer bridging over a depression in the surface of the chip. A ZrO.sub.2 layer overlies the bridge and a pair of spaced apart palladium electrodes are on the surface of the ZrO.sub.2. A heater for the ZrO.sub.2 is embedded in the SiO.sub.2 bridge.

Abstract: An improved internally matched Schottky barrier beam lead diode for use in millimeter wave frequency circuits. In this diode device which is made on a chip, a reactive shunt loop comprising a matching inductor and series connected capacitor is fabricated on the chip adjacent the diode and couples the ohmic beam lead to the Schottky contact beam lead.

Abstract: An integrated quantum well laser structure which has a plurality of quantum well lasers for providing a plurality of light beams each having a different wavelength for use in wavelength division multiplexing.

Abstract: A cadmium telluride boule encapsulated with an encapsulant material consisting of about 80% by volume of powdered beta-phase calcium sulfate hemihydrate, about 20% by volume of powdered alpha-phase calcium sulfate hemihydrate and water. This specially encapsulated boule can then be sawn with a multiblade wafering apparatus used to simultaneously saw the boule into multiple substrate wafers.