Patents Represented by Attorney, Agent or Law Firm Ostrolenk, Faber, Gerb & Soffen, LLP
  • Patent number: 7485050
    Abstract: A micropattern grip surface for use on a grip, and particularly a grip for a golf club, wherein the pattern includes alternating upstanding ridges and grooves between the ridges. In a preferred embodiment, the ridges extend with a generally longitudinal direction of extension component on the grip with a generally circumferential direction of extension component and also may be parallel. The ridges in an embodiment zigzag along the longitudinal direction. In an embodiment, at intersections or bends between the zig and the zag line elements, additional free end barbs extend from the intersections. The density, width and height of the line elements of the ridges are selected to provide drag on the hand or object gripping the grip, preferably in both the longitudinal and circumferential directions, and to give the grip a velvety feel. Alternatively, each of the ridges is comprised of some line elements.
    Type: Grant
    Filed: January 17, 2006
    Date of Patent: February 3, 2009
    Assignee: Grip Surface Technologies, Inc.
    Inventor: Timothy Rose
  • Patent number: 7485920
    Abstract: Semiconductor devices having recombination centers comprised of well-positioned heavy metals. At least one lattice defect region within the semiconductor device is first created using particle beam implantation. Use of particle beam implantation positions the lattice defect region(s) with high accuracy in the semiconductor device. A heavy metal implantation treatment of the device is applied. The lattice defects created by the particle beam implantation act as gettering sites for the heavy metal implantation. Thus, after the creation of lattice defects and heavy metal diffusion, the heavy metal atoms are concentrated in the well-positioned lattice defect region(s).
    Type: Grant
    Filed: November 4, 2002
    Date of Patent: February 3, 2009
    Assignee: International Rectifier Corporation
    Inventors: Richard Francis, Chiu Ng
  • Patent number: 7485808
    Abstract: The present invention relates to a holding device for moveably accommodating a line. Furthermore, the invention relates to an aircraft that comprises a multitude of such holding devices. Finally, the invention relates to a multitude of holding devices according to the invention for section-by-section line routing in an aircraft. The holding device according to the invention, for movably accommodating at least one line, comprises a guide body that can be attached to an attachment surface in an aircraft, as well as a slide body that is designed to envelope at least one line in the region of the guide body. To prevent any tensile stress or abrasion in or on the line from arising when the attachment surface moves, the slide body is movably held in the guide body in such a way that the slide body compensates for any movement.
    Type: Grant
    Filed: April 27, 2006
    Date of Patent: February 3, 2009
    Assignee: Airbus Deutschland GmbH
    Inventors: Hans-Peter Guthke, Carsten Papke, Lutz Zeuner, Lueder Kosiankowski
  • Patent number: 7485932
    Abstract: An accumulation mode FET (ACCUFET) which includes an insulated gate, an adjacently disposed insulated source field electrode, and a source contact that makes Schottky contact with the base region of the ACCUFET.
    Type: Grant
    Filed: July 20, 2005
    Date of Patent: February 3, 2009
    Assignee: International Rectifier Corporation
    Inventor: Naresh Thapar
  • Patent number: 7486152
    Abstract: The cathode of a first varactor diode (VD1) is connected to a resonator element (XD) of an oscillator (2) via a capacitor (C1) and is connected to a triangular wave generator circuit (3) via an inductor (RFC1) and a resistor element (R1), whereas the anode is connected to the cathode of a second varactor diode (VD2) via a capacitor (C2) and is grounded via an inductor (RFC3). The cathode of a zener diode (ZD1) is connected to a node of the inductor (RFC1) and the resistor element (R1), whereas the anode is grounded via a resistor element (R2). The cathode of the second varactor diode (VD2) is connected to a node of the zener diode (ZD1) and the resistor element (R2) via an inductor (RFC2), whereas the anode is grounded. In other embodiments, certain component(s) may be omitted and/or a fixed supply potential may be substituted for the ground potential.
    Type: Grant
    Filed: November 18, 2004
    Date of Patent: February 3, 2009
    Assignee: Murata Manufacturing Co., Ltd.
    Inventor: Akira Kato
  • Patent number: 7482205
    Abstract: A starting wafer for high voltage semiconductor devices is formed by implanting arsenic into the top surface of a p type silicon substrate wafer to a depth of about 0.1 micron. A N type non-graded epitaxial layer is then grown atop the substrate without any diffusion step so that the arsenic is not intentionally driven. Device junction are then diffused into the epitaxially grown layer.
    Type: Grant
    Filed: December 11, 2006
    Date of Patent: January 27, 2009
    Assignee: International Rectifier Corporation
    Inventor: Thomas Herman
  • Patent number: 7482654
    Abstract: A power semiconductor device which includes a source field electrode, and at least one insulated gate electrode adjacent a respective side of the source field electrode, the source field electrode and the gate electrode being disposed in a common trench, and a method for fabricating the device.
    Type: Grant
    Filed: April 20, 2005
    Date of Patent: January 27, 2009
    Assignee: International Rectifier Corporation
    Inventors: Jianjun Cao, Timothy D. Henson, Naresh Thapar, Paul Harvey, David Kent
  • Patent number: 7482795
    Abstract: A pre-bias protection circuit for a converter circuit including a switching stage having high-and low-side switches connected in series at a switching node and an output stage connected to the switching node having a capacitor having a pre-existing pre-bias voltage at startup of the converter circuit, the pre-bias protection circuit controlling discharge of the pre-bias voltage when the low-side switch is turned ON during a start up of the converter circuit. The pre-bias protection circuit includes a first circuit for providing a first output; a second circuit providing a second output; and a comparator circuit for comparing the first output and the second output and producing a third output comprising a pulse width modulated signal for driving the low side switch such that the pulse width modulated signal starts with a small duty cycle and thereafter increases to a larger duty cycle, thereby to prevent the pre-bias voltage from discharging during startup.
    Type: Grant
    Filed: July 25, 2007
    Date of Patent: January 27, 2009
    Assignee: International Rectifier Corporation
    Inventors: Parviz Parto, Yang Chen
  • Patent number: 7482655
    Abstract: An IGBT device, comprising a substrate having a conductivity type; a drain electrode arranged on a bottom surface of the substrate; an epitaxial layer arranged on the substrate and having a conductivity type opposite that of the substrate; at least one body diffusion arranged within the epitaxial layer and having a conductivity type the same as that of the substrate; at least one source diffusion arranged within the body diffusion and having a conductivity type the same as that of the epitaxial layer; a gate electrode to control the IGBT device; a source electrode electrically coupled to the body diffusion and the source diffusion; an additional diffusion arranged within the epitaxial layer and having a conductivity type the same as that of the substrate, the additional diffusion forming a collector region of a vertical bipolar arrangement in the IGBT; and a sense electrode electrically coupled to the additional diffusion; wherein the presence of minority carriers in the epitaxial layer may be detected in acc
    Type: Grant
    Filed: May 11, 2005
    Date of Patent: January 27, 2009
    Assignee: International Rectifier Corporation
    Inventor: Bruno Nadd
  • Patent number: 7482681
    Abstract: A semiconductor package which includes a conductive can, a semiconductor die received in the interior of the can and connected to an interior portion thereof at one of its sides, at least one interconnect structure formed on the other side of the semiconductor die, and a passivation layer disposed on the other side of the semiconductor die around the interconnect structure and extending at least to the can.
    Type: Grant
    Filed: August 15, 2007
    Date of Patent: January 27, 2009
    Assignee: International Rectifier Corporation
    Inventor: Martin Standing
  • Patent number: 7482285
    Abstract: The epitaxial silicon junction receiving layer of a power semiconductor device is formed of upper and lower layers. The lower layer has a resistivity of more than that of the upper layer and a thickness of more than that of the upper layer. The total thickness of the two layers is less than that of a single epitaxial layer that would be used for the same blocking voltage. P-N junctions are formed in the upper layer to define a vertical conduction power MOSFET device. The on-resistance is reduced more than 10% without any blocking voltage reduce. The upper epitaxial layer can be either by direct second layer deposition or by ion implantation of a uniform epitaxial layer followed by a driving process.
    Type: Grant
    Filed: October 17, 2002
    Date of Patent: January 27, 2009
    Assignee: International Rectifier Corporation
    Inventors: Zhijun Qu, Kenneth Wagers
  • Patent number: 7482605
    Abstract: An energy filter device for beams which are used in the course of ion beam therapy, wherein at least one passive modulator is provided. The modulator can comprise a scattering film for the beams and a collimator with an opening for controlling the beams, or a magnetic filter and an absorber, or a nonlinear filter and an apparatus for clipping the intensity of individual energy levels of the beams.
    Type: Grant
    Filed: May 25, 2004
    Date of Patent: January 27, 2009
    Assignee: GSI Helmholtzzentrum Für Schwerionenforschung GmgH
    Inventors: Gerhard Kraft, Ulrich Weber, Sebastian Kraft, Stephan Kraft
  • Patent number: 7482393
    Abstract: A method for producing submicron polytetrafluoroethylene (“PTFE”) powder in a free-flowing, readily dispersible form. The irradiated PTFE starting material is placed in a desired solvent and undergoes grinding until the PTFE particles reach submicron size. The submicron particles are subsequently recovered from the solvent and dried to form a powder that may have particles less than 1.00 ?m in size. The dry PTFE powder may then be readily dispersed to submicron size into a desired application system. The submicron PTFE powder of this method is free-flowing, readily dispersible in various application systems, tends not to “dust” or self-agglomerate. Improved aqueous and organic dispersions of submicron PTFE particles may also be formed that display increased stability and require much less agitation than other processes of forming such dispersions. Such improved PTFE dispersions may be formed with or without the addition of surfactants, wetting agents, rheology modifiers, pH-adjusting agents, and the like.
    Type: Grant
    Filed: December 29, 2004
    Date of Patent: January 27, 2009
    Assignee: Shamrock Technologies Inc.
    Inventors: Charles A. Cody, William Neuberg, Manshi Sui, Youssef Awad
  • Patent number: 7480211
    Abstract: The secular perpetual calendar comprises an additional mechanism (4 to 13) integrated in a conventional perpetual calendar mechanism comprising a last wheel (13) making one revolution in 400 years, this wheel (13) carrying a cam (13?) of which the steps cooperate with a lever (9) on which pivots a wheel (6) which carries a satellite (7?) on which is attached the February cam (7) and the cam (13?), which makes one quarter turn every century, presenting three low steps enabling the lever (9) to move back in such a way that the cam (7) on which the multiple lever (2) will press is in the same position as for a conventional 28-day month of February three times in succession for the years 2100, 2200 and 2300, and then a high step to restore the 29th of February of the year 2400.
    Type: Grant
    Filed: February 14, 2007
    Date of Patent: January 20, 2009
    Assignee: Franck Müler Watchland S.A.
    Inventor: Pierre-Michel Golay
  • Patent number: 7480158
    Abstract: A first drive control signal regenerating circuit outputs an ON timing drive signal at turn-ON of a main switch element, and a second drive control signal regenerating circuit generates an OFF timing drive signal at turn-OFF of the main switch element. A rectifying switch controlling switch element connected between the gate and source of a rectifying switch element is driven by an output of the second drive control signal regenerating circuit. An output of the first drive control signal regenerating circuit connects to the gate of a commutating switch controlling switch element, which connects to one end of an auxiliary winding, the other end thereof being connected to the gate of a commutating switch element. Accordingly, the rectifying switch element is directly controlled from the primary side.
    Type: Grant
    Filed: August 31, 2007
    Date of Patent: January 20, 2009
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Eito Moromizato, Tadahiko Matsumoto
  • Patent number: D584992
    Type: Grant
    Filed: June 29, 2007
    Date of Patent: January 20, 2009
    Assignee: Rosy Blue, N.V.
    Inventor: Dipu Mehta
  • Patent number: D585000
    Type: Grant
    Filed: February 9, 2007
    Date of Patent: January 20, 2009
    Assignee: Yamaha Hatsudoki Kabushiki Kaisha
    Inventors: Hiroshi Shimokawa, Takuya Nakamura
  • Patent number: D585475
    Type: Grant
    Filed: July 7, 2008
    Date of Patent: January 27, 2009
    Assignee: All-Logic Int. Co., Ltd.
    Inventor: Shun-Tien Yang
  • Patent number: D585477
    Type: Grant
    Filed: July 7, 2008
    Date of Patent: January 27, 2009
    Assignee: All-Logic Int. Co., Ltd.
    Inventor: Shun-Tien Yang
  • Patent number: D585898
    Type: Grant
    Filed: April 1, 2008
    Date of Patent: February 3, 2009
    Assignee: SDI Technologies, Inc.
    Inventor: Andrew Skurdal