Patents Represented by Attorney Patterson and Sheridan, LLP
  • Patent number: 8280153
    Abstract: Techniques are disclosed for visually conveying a trajectory map. The trajectory map provides users with a visualization of data observed by a machine-learning engine of a behavior recognition system. Further, the visualization may provide an interface used to guide system behavior. For example, the interface may be used to specify that the behavior recognition system should alert (or not alert) when a particular trajectory is observed to occur.
    Type: Grant
    Filed: August 18, 2009
    Date of Patent: October 2, 2012
    Assignee: Behavioral Recognition Systems
    Inventors: Wesley Kenneth Cobb, Bobby Ernest Blythe, David Samuel Friedlander, Rajkiran Kumar Gottumukkal, Ming-Jung Seow, Gang Xu
  • Patent number: 8281294
    Abstract: One embodiment of the present invention sets forth a technique for representing and managing a multi-architecture co-processor application program. Source code for co-processor functions is compiled in two stages. The first stage incorporates a majority of the computationally intensive processing steps associated with co-processor code compilation. The first stage generates virtual assembly code from the source code. The second stage generates co-processor machine code from the virtual assembly. Both the virtual assembly and co-processor machine code may be included within the co-processor enabled application program. A co-processor driver uses a description of the currently available co-processor to select between virtual assembly and co-processor machine code. If the virtual assembly code is selected, then the co-processor driver compiles the virtual assembly into machine code for the current co-processor.
    Type: Grant
    Filed: November 12, 2007
    Date of Patent: October 2, 2012
    Assignee: NVIDIA Corporation
    Inventors: Julius Vanderspek, Nicholas Patrick Wilt, Jayant Kolhe, Ian A. Buck, Bastiaan Aarts
  • Patent number: 8278744
    Abstract: A semiconductor device includes: a semiconductor chip mounting substrate, a control circuit board, a power terminal holder and a semi-fixing member. The semiconductor chip mounting substrate includes a substrate, a semiconductor chip provided on a first major surface of the substrate, and a first and second semiconductor chip connection electrodes. The control circuit board is provided generally in parallel to the first major surface and includes a control circuit, a control signal terminal connected to the control circuit, and a through hole extending in a direction generally perpendicular to the first major surface. The power terminal holder is provided on opposite side of the control circuit board from the semiconductor chip mounting substrate and includes a power terminal. The semi-fixing member includes a shank portion and an end portion. The shank portion is fixed to the power terminal holder and penetrates through the through hole.
    Type: Grant
    Filed: August 5, 2009
    Date of Patent: October 2, 2012
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Kazuaki Onishi
  • Patent number: 8279231
    Abstract: Read completion buffer space is allocated in accordance with a preset limit. When a read request is received from a client, the sum of a current allocation of the read completion buffer space and a new allocation of the read completion buffer space required by the read request is compared with the preset limit. If the preset limit is not exceeded, read completion buffer space is allocated to the read request. If the preset limit is exceeded, the read request is suspended until sufficient data is read out from the read completion buffer.
    Type: Grant
    Filed: October 29, 2008
    Date of Patent: October 2, 2012
    Assignee: NVIDIA Corporation
    Inventors: Samuel Hammond Duncan, John H. Edmondson, Raymond Hoi Man Wong, Lukito Muliadi
  • Patent number: 8280907
    Abstract: A method, system and article of manufacture for data processing and more particularly for managing access to data in a database that should be available for a limited number of accesses. One embodiment provides a method comprising receiving, from a requesting entity, a query against a database having consumable data that is configured to be accessible for only a predefined number of accesses. The query is configured to access the consumable data and is executed against the database to obtain a query result that includes the consumable data. The method further comprises determining whether the predefined number of accesses is reached as a result of the execution of the query against the database. If so, the consumable data is made inaccessible. The obtained query result is returned to the requesting entity.
    Type: Grant
    Filed: November 30, 2005
    Date of Patent: October 2, 2012
    Assignee: International Business Machines Corporation
    Inventors: Richard D. Dettinger, Daniel P. Kolz, Richard J. Stevens
  • Patent number: 8276689
    Abstract: In one embodiment, a method of forming a wellbore includes running a liner drilling assembly into the wellbore, the liner drilling assembly having a liner, a conveying member, one or more connection members, and a drilling member. The method includes temporarily suspending the liner at a location below the rig floor; releasing the conveying member and the drilling member from the liner; re-connecting the conveying member to the liner; releasing the liner from its location of temporary suspension; and advancing the liner drilling assembly.
    Type: Grant
    Filed: May 18, 2007
    Date of Patent: October 2, 2012
    Assignee: Weatherford/Lamb, Inc.
    Inventors: Richard L. Giroux, Albert C. Odell, II, Wei Xu
  • Patent number: 8278139
    Abstract: A method and apparatus is provided for forming a resistive memory device having good adhesion among the components thereof. A first conductive layer is formed on a substrate, and the surface of the first conductive layer is treated to add adhesion promoting materials to the surface. The adhesion promoting materials may form a layer on the surface, or they may incorporate into the surface or merely passivate the surface of the first conductive layer. A variable resistance layer is formed on the treated surface, and a second conductive layer is formed on the variable resistance layer. Adhesion promoting materials may also be included at the interface between the variable resistance layer and the second conductive layer.
    Type: Grant
    Filed: September 25, 2009
    Date of Patent: October 2, 2012
    Assignee: Applied Materials, Inc.
    Inventors: Siu F. Cheng, Deenesh Padhi
  • Patent number: 8280062
    Abstract: According to one embodiment, a sound corrector includes a signal outputter, a response signal, a frequency specifier, a coefficient specifier, a filter, and an outputter. The signal outputter outputs a measurement signal to measure acoustical properties of an object to be measured. The response signal receiver receives a response signal from the object in response to the measurement signal. The frequency specifier specifies a resonant frequency at a resonance peak from the response signal. The coefficient specifier specifies a correction coefficient of a correction filter for reducing the resonant frequency based on the specified resonant frequency. The filter performs filtering on a signal to be output to the object using the correction filter with the correction coefficient. The outputter outputs the signal having undergone the filtering to the object.
    Type: Grant
    Filed: August 4, 2009
    Date of Patent: October 2, 2012
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Takashi Fukuda, Toshifumi Yamamoto, Norikatsu Chiba, Shigeyasu Iwata, Yasuhiro Kanishima, Kazuyuki Saito, Yutaka Oki
  • Patent number: 8279239
    Abstract: A method allowing for quick manipulation of weight values associated with points on a polygonal mesh that is to be deformed. A point on the polygonal mesh may be selected by the user. Then, a solution space of possible positions for the selected point may be calculated by solving a deformation model for a range of weight values. A graphical representation of the solution space may be provided, such as a locus of possible positions for the selected point, where each point on the locus corresponds to a particular weight value. Manipulation of these weight values, and hence, the deformation of the polygonal mesh, may be achieved simply by selecting a position on the locus. The mesh may be updated to reflect the weight corresponding to the selected position.
    Type: Grant
    Filed: March 2, 2009
    Date of Patent: October 2, 2012
    Assignee: Pixar Animation Studio
    Inventors: Robert Jensen, Oren Jacob, Eric Gregory
  • Patent number: 8274017
    Abstract: Embodiments of the invention generally relate to a semiconductor processing chamber and, more specifically, a heated support pedestal for a semiconductor processing chamber. In one embodiment, a pedestal for a semiconductor processing chamber is provided. The pedestal comprises a substrate support comprising a conductive material and having a support surface for receiving a substrate, a resistive heater encapsulated within the substrate support, a hollow shaft coupled to the substrate support at a first end and a mating interface at an opposing end, the hollow shaft comprising a shaft body having a hollow core, and a cooling channel assembly encircling the hollow core and disposed within the shaft body for removing heat from the pedestal via an internal cooling path, wherein the substrate support has a heat control gap positioned between the heating element and the ring-shaped cooling channel.
    Type: Grant
    Filed: December 18, 2009
    Date of Patent: September 25, 2012
    Assignee: Applied Materials, Inc.
    Inventors: Lipyeow Yap, Tuan Anh Nguyen, Dale R. Du Bois, Sanjeev Baluja, Thomas Nowak, Juan Carlos Rocha-Alvarez, Jianhua Zhou
  • Patent number: 8275821
    Abstract: A method, computer-readable medium, and an apparatus for generating a transcendental value. The method includes receiving an input containing an input value and an opcode and determining whether the opcode corresponds to a trigonometric operation or a power-of-two operation. The method also includes calculating a fractional value and an integer value from the input value, generating the transcendental value based on the fractional value by adding at least a portion of the fractional value with at least one of a shifted fractional value produced by shifting the portion of the fractional value and a constant value, and providing the transcendental value in response to the request. In this fashion, the same circuit area may be used to carry out both trigonometric and power-of-two calculations, leading to greater circuit area savings and performance advantages while not sacrificing significant accuracy.
    Type: Grant
    Filed: September 7, 2007
    Date of Patent: September 25, 2012
    Assignee: International Business Machines Corporation
    Inventors: Eric Oliver Mejdrich, Adam James Muff, Matthew Ray Tubbs
  • Patent number: 8275779
    Abstract: Embodiments of the invention allow structured data to be transferred between a source application and a target application that process structured data in different formats. For example, structured data may have a set of associated rules which transform the structured data based on a set of variables. The source application may register variable definitions for each of the variables in a registry. The target application may read the registry and register values for each of the rule variables. Once values are registered for the variables, the source application may transfer the structured data to a transformation engine that applies the rules, using the registered values for the variables, to transform the structured data into a format compatible with the target application. In doing so, the transformation engine can generate a document in any format compatible with the target application and subsequently transfer the generated document to the target application.
    Type: Grant
    Filed: January 22, 2009
    Date of Patent: September 25, 2012
    Assignee: International Business Machines Corporation
    Inventors: Thomas J. Eggebraaten, Jeffrey W. Tenner, Shannon E. Wenzel, Eric W. Will
  • Patent number: 8276129
    Abstract: One embodiment of the present invention sets forth a system that allows a software developer to perform shader debugging and performance tuning. The system includes an interception layer between the software application and the application programming interface (API). The interception layer is configured to intercept and store source code versions of the original shaders included in the application. For each object in the frame, the interception layer makes shader source code available to the developer, so that the developer can modify the source code as needed, re-compile only the modified shader source code, and run the application. Consequently, shader debugging and performance tuning may be carried out in a manner that is more efficient and effective relative to prior art approaches.
    Type: Grant
    Filed: August 13, 2007
    Date of Patent: September 25, 2012
    Assignee: NVIDIA Corporation
    Inventors: Jeffrey T. Kiel, Derek M. Cornish
  • Patent number: 8276132
    Abstract: One embodiment of the present invention sets forth a technique for representing and managing a multi-architecture co-processor application program. Source code for co-processor functions is compiled in two stages. The first stage incorporates a majority of the computationally intensive processing steps associated with co-processor code compilation. The first stage generates virtual assembly code from the source code. The second stage generates co-processor machine code from the virtual assembly. Both the virtual assembly and co-processor machine code may be included within the co-processor enabled application program. A co-processor driver uses a description of the currently available co-processor to select between virtual assembly and co-processor machine code. If the virtual assembly code is selected, then the co-processor driver compiles the virtual assembly into machine code for the current co-processor.
    Type: Grant
    Filed: November 12, 2007
    Date of Patent: September 25, 2012
    Assignee: NVIDIA Corporation
    Inventors: Julius Vanderspek, Nicholas Patrick Wilt, Jayant Kolhe, Ian A. Buck, Bastiaan Aarts
  • Patent number: 8274999
    Abstract: Packet network performance is assessed using transit delay metrics and compliance masks generated at various evaluation nodes of the network. The evaluation nodes may employ network probes that make precise measurements of transit delays and thereby of transit delay variations. Based on the assessments, a master may be added to the network or relocated within the network, rate of timing packets generated by the master may be adjusted up or down, or oscillators used at the slaves may be upgraded.
    Type: Grant
    Filed: July 2, 2010
    Date of Patent: September 25, 2012
    Assignee: Symmetricom, Inc.
    Inventors: Kishan Shenoi, George P. Zampetti, Lee Cosart
  • Patent number: 8273624
    Abstract: Methods for implanting ions into a substrate by a plasma immersion ion implanting process are provided. In one embodiment, a method for implanting ions into a substrate includes providing a substrate into a processing chamber, generating a plasma from a gas mixture including a reacting gas and a etching gas in the chamber, adjusting the ratio between the reacting gas and the etching gas in the supplied gas mixture and implanting ions from the plasma into the substrate. In another embodiment, the method includes providing a substrate into a processing chamber, supplying a gas mixture including reacting gas and a halogen containing reducing gas into the chamber, forming a plasma from the gas mixture, gradually increasing the ratio of the etching gas in the gas mixture, and implanting ions from the gas mixture into the substrate.
    Type: Grant
    Filed: November 8, 2010
    Date of Patent: September 25, 2012
    Assignee: Applied Materials, Inc.
    Inventors: Peter Porshnev, Majeed A. Foad
  • Patent number: 8273330
    Abstract: The present invention relates to active substances in particulate form, to methods for preparing them and to their uses. The present invention provides particulate powders, such as might be of use for delivery using a dry powder inhaler (DPI) or similar delivery device, having properties which may be beneficial to the DPI delivery process.
    Type: Grant
    Filed: April 24, 2003
    Date of Patent: September 25, 2012
    Assignee: Nektar Therapeutics
    Inventors: Peter York, Boris Yu Shekunov, Mahboob Ur Rehman, Jane Catherine Feeley
  • Patent number: 8274757
    Abstract: According to one embodiment, a recording head includes a main pole, a trailing core, a first coil wound around the trailing core, a leading core, and a second coil wound around the leading core. The trailing core includes a return pole opposed to a trailing side of the main pole with a write gap therebetween, and side shields arranged individually on opposite sides of the main pole transversely relative to tracks and magnetically separated from the main pole at a distance not more than double a track pitch of the recording medium. The leading core includes a junction opposed to a leading side of the main pole with a gap therebetween and joined to the side shields with a width of 20 ?m or less transversely relative to the tracks and a connecting portion joined to the main pole in a position off the recording medium.
    Type: Grant
    Filed: September 2, 2011
    Date of Patent: September 25, 2012
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Takuya Matsumoto, Tomoko Taguchi, Masaya Ohtake
  • Patent number: 8274092
    Abstract: This invention provides an optoelectronic semiconductor device having a rough surface and the manufacturing method thereof. The optoelectronic semiconductor device comprises a semiconductor stack having a rough surface and an electrode layer overlaying the semiconductor stack. The rough surface comprises a first region having a first topography and a second region having a second topography. The method comprises the steps of forming a semiconductor stack on a substrate, forming an electrode layer on the semiconductor stack, thermal treating the semiconductor stack, and wet etching the surface of the semiconductor stack to form a rough surface.
    Type: Grant
    Filed: October 15, 2010
    Date of Patent: September 25, 2012
    Assignee: Epistar Corporation
    Inventors: Chiu-Lin Yao, To-Cheng Hsu
  • Patent number: 8276117
    Abstract: Embodiments of the invention provide techniques for displaying and refactoring of programs, including database statements. In one embodiment, database statements embedded in the program source are evaluated to identify statements of the source code affected by, or affecting, the changed element of the database. An indication of the statements of source code affected by or affecting the changed element of the database may be presented to a user.
    Type: Grant
    Filed: August 3, 2007
    Date of Patent: September 25, 2012
    Assignee: International Business Machines Corporation
    Inventors: Azadeh Ahadian, Stephen Andrew Brodsky, Michael George Burke, Rebecca B. Nin, Igor Peshansky, Mukund Raghavachari, Sonali Surange