Patents Represented by Attorney Patterson and Sheridan, LLP
  • Patent number: 8340407
    Abstract: A method for generating an interpolated output image, including generating a first interpolation array including RGB values, at least one of which is interpolated, based on a first interpolation region, and generating a first homogeneity array based on the first interpolation array including homogeneity values calculated based on a first homogeneity neighborhood having the same pixel locations as the first interpolation region. The method includes generating a second interpolation array based on a second interpolation region, and generating a second homogeneity array based on the second interpolation array and a second homogeneity neighborhood, where the second homogeneity neighborhood includes the same pixel locations as the second interpolation region. The method includes determining, for a first pixel location, that the homogeneity value in the first homogeneity array is greater than the homogeneity value in the second homogeneity array, and outputting the RGB color values in the first interpolation array.
    Type: Grant
    Filed: January 14, 2009
    Date of Patent: December 25, 2012
    Assignee: Cisco Technology, Inc.
    Inventor: Mark Kalman
  • Patent number: 8336623
    Abstract: Embodiments include methods for recovering petroleum products from a formation containing heavy crude oil. In one embodiment, a method includes positioning a steam generator within the petroleum-bearing formation, flowing a fuel source and an oxidizing agent into the steam generator, generating and releasing steam from the steam generator to heat the heavy crude oil, flowing a catalytic material containing a nanocatalyst into the petroleum-bearing formation, and exposing the catalytic material to the heavy crude oil. The method further provides forming lighter oil products from the heavy crude oil within the petroleum-bearing formation and extracting the lighter oil products from the petroleum-bearing formation. In some examples, the fuel source contains methane, syngas, or hydrogen gas, and the oxidizing agent contains oxygen gas, air, or oxygen enriched air. The nanocatalyst may contain cobalt, iron, nickel, molybdenum, chromium, tungsten, titanium, alloys thereof, or combinations thereof.
    Type: Grant
    Filed: April 26, 2010
    Date of Patent: December 25, 2012
    Assignee: World Energy Systems, Inc.
    Inventors: John E. Langdon, Charles H. Ware
  • Patent number: 8340352
    Abstract: A sequence layer in a machine-learning engine configured to learn from the observations of a computer vision engine. In one embodiment, the machine-learning engine uses the voting experts to segment adaptive resonance theory (ART) network label sequences for different objects observed in a scene. The sequence layer may be configured to observe the ART label sequences and incrementally build, update, and trim, and reorganize an ngram trie for those label sequences. The sequence layer computes the entropies for the nodes in the ngram trie and determines a sliding window length and vote count parameters. Once determined, the sequence layer may segment newly observed sequences to estimate the primitive events observed in the scene as well as issue alerts for inter-sequence and intra-sequence anomalies.
    Type: Grant
    Filed: August 18, 2009
    Date of Patent: December 25, 2012
    Assignee: Behavioral Recognition Systems, Inc.
    Inventors: Wesley Kenneth Cobb, David Samuel Friedlander, Kishor Adinath Saitwal
  • Patent number: 8341613
    Abstract: Embodiments of the invention provide a method for reducing stack space consumption via a head-call optimization. When compiling the source code of a computer application, a compiler application may be configured to analyze program flow to identify a “head-call” within any functions included in the program source code. Once identified, the “head-call” may be removed during program compilation. Doing so may reduce the number of elements pushed onto a program's stack space during program execution.
    Type: Grant
    Filed: December 4, 2007
    Date of Patent: December 25, 2012
    Assignee: International Business Machines Corporation
    Inventors: Aran Donohue, Ian Richard Finlay
  • Patent number: 8341380
    Abstract: One embodiment of the present invention sets forth a system and method for supporting high-throughput virtual to physical address translation using compressed TLB cache lines with variable address range coverage. The amount of memory covered by a TLB cache line depends on the page size and page table entry (PTE) compression level. When a TLB miss occurs, a cache line is allocated with an assumed address range that may be larger or smaller than the address range of the PTE data actually returned. Subsequent requests that hit a cache line with a fill pending are queued until the fill completes. When the fill completes, the cache line's address range is set to the address range of the PTE data returned. Queued requests are replayed and any that fall outside the actual address range are reissued, potentially generating additional misses and fills.
    Type: Grant
    Filed: August 5, 2010
    Date of Patent: December 25, 2012
    Assignee: NVIDIA Corporation
    Inventors: James Leroy Deming, Mark Allen Mosley, William Craig McKnight, Emmett M. Kilgrariff, Steven E. Molnar, Colyn Scott Case
  • Patent number: 8339398
    Abstract: According to embodiments of the invention, a data structure may be created which may be used by both an image processing system and by a physics engine. The data structure may have an initial or upper portion representing bounding volumes which partition a three dimensional scene and a second or lower portion representing objects within the three dimensional scene. The integrated acceleration data structure may be used by an image processing system to render a two dimensional image from a three dimensional scene, and by a physics engine to perform physics based calculations in order to simulate physical phenomena in the three dimensional scene. Furthermore, the physics engine may update the integrated acceleration data structure in response to changes in position or shape of objects due to physical phenomena.
    Type: Grant
    Filed: September 28, 2006
    Date of Patent: December 25, 2012
    Assignee: International Business Machines Corporation
    Inventor: Robert A. Shearer
  • Patent number: 8341358
    Abstract: One embodiment of the invention sets forth a mechanism for efficiently write dirty data from the L2 cache to a DRAM. A dirty data notification, including a memory address of the dirty data, is transmitted by the L2 cache to a frame buffer logic when dirty data is stored in the L2 cache. The frame buffer logic uses a page-stream sorter to organize dirty data notifications based on the bank page associated with the memory addresses included in the dirty data notifications. The page-stream sorter includes multiple sets with entries that may be associated with different bank pages in the DRAM. The frame buffer logic transmits dirty data associated with an entry that has a maximum threshold of dirty data notifications to the DRAM. The frame buffer logic also transmits dirty data associated with the oldest entry when the number of entries in a set reaches a maximum threshold.
    Type: Grant
    Filed: September 18, 2009
    Date of Patent: December 25, 2012
    Assignee: NVIDIA Corporation
    Inventors: John H. Edmondson, James Roberts
  • Patent number: 8337279
    Abstract: A method and apparatus for conditioning a polishing pad is provided. The conditioning element is held by a conditioning arm rotatably mounted to a base at a pivot point. An actuator pivots the arm about the pivot point. The conditioning element is urged against the surface of the polishing pad, and translated with respect to the polishing pad to remove material from the polishing pad and roughen its surface. The interaction of the abrasive conditioning surface with the polishing pad surface generates a frictional force. The frictional force may be monitored by monitoring the torque applied to the pivot point, and material removal controlled thereby. The conditioning time, down force, translation rate, or rotation of the conditioning pad may be adjusted based on the measured torque.
    Type: Grant
    Filed: June 22, 2009
    Date of Patent: December 25, 2012
    Assignee: Applied Materials, Inc.
    Inventors: Sivakumar Dhandapani, Stan D. Tsai, Daxin Mao, Sameer Deshpande, Shou-Sung Chang, Gregory E. Menk, Charles C. Garretson, Jason Garcheung Fung, Christopher D. Cocca, Hung Chih Chen
  • Patent number: 8335731
    Abstract: A method of establishing a profitability model for use in the establishment of a wind power plant, the method including the steps of: establishing wind power plant-related data related to a scenario; calculating the profitability of the wind power plant by using a data processing system, by making use of the wind power-related data such as solution parameters and financing parameters, in relation to at least one scenario; and presenting a profitability model related to establishing a wind power plant based on the scenario and the calculated profitability using data processing system. Benefits of this profitability model minimizes risk and improves the basis for decision regarding the establishment of a wind power plant.
    Type: Grant
    Filed: December 26, 2008
    Date of Patent: December 18, 2012
    Assignee: Vestas Wind Systems A/S
    Inventors: Kristoffer Claudi Heller, Flemming Lundager Petersen, Allan Linderup Smed, Martin Duraj Jensen
  • Patent number: 8335892
    Abstract: One embodiment of the present invention sets forth a technique for arbitrating requests received by an L1 cache from multiple clients. The L1 cache outputs bubble requests to a first one of the multiple clients that cause the first one of the multiple clients to insert bubbles into the request stream, where a bubble is the absence of a request. The bubbles allow the L1 cache to grant access to another one of the multiple clients without stalling the first one of the multiple clients. The L1 cache services multiple clients with diverse latency and bandwidth requirements and may be reconfigured to provide memory spaces for clients executing multiple parallel threads, where the memory spaces each have a different scope.
    Type: Grant
    Filed: December 30, 2009
    Date of Patent: December 18, 2012
    Assignee: NVIDIA Corporation
    Inventors: Alexander L. Minkin, Steven J. Heinrich, Rajeshwaran Selvanesan, Charles McCarver, Stewart Glenn Carlton, Anjana Rajendran
  • Patent number: 8334599
    Abstract: An electronic device provides a stack of semiconductor chips. A redistribution layer of a first semiconductor chip is arranged at the bottom of the stack. The redistribution layer of the first semiconductor chip comprises external pads.
    Type: Grant
    Filed: August 21, 2008
    Date of Patent: December 18, 2012
    Assignee: Qimonda AG
    Inventors: Michael Bruennert, Ullrich Menczigar, Christian Mueller, Sitt Tontosirin, Hermann Ruckerbauer
  • Patent number: 8335236
    Abstract: Methods and apparatus for automatically configuring an aggregated link between a device supporting Fiber Channel over Ethernet (FCoE) and two or more FCoE Forwarders (FCFs) configured as a virtual switch in an effort to isolate FCoE traffic from FCoE Initialization Protocol (FIP) traffic in the aggregated link without user intervention. The virtual switch may be configured using virtual PortChannel (vPC) or MultiChassis EtherChannel (MCEC) technology, for example. For some embodiments, following an exchange of Data Center Bridge Exchange (DCBX) Protocol packets identifying the aggregated link relationship to the device (e.g., a host or intermediate bridge), subchannels may be automatically created within the aggregated link and designated as carrying either FCoE or FIP traffic, thereby isolating the subchannels. In this manner, a user need not perform manual isolation of FCoE-carrying trunks in a data center environment.
    Type: Grant
    Filed: May 6, 2010
    Date of Patent: December 18, 2012
    Assignee: Cisco Technology, Inc.
    Inventors: Sandeep Dhar, Pradeep Kanyar
  • Patent number: 8334857
    Abstract: A method and system are implemented to dynamically control a display refresh rate. Specifically, one embodiment of the present invention sets forth a method, which comprises the steps of driving a display device at a first refresh rate over a period of time, measuring a number of first content frames with changes in content out of a plurality of content frames that are generated over the period of time for the display device, and driving the display device at a second refresh rate if the number of the first content frames meets a first condition associated with a first threshold reference, and optionally driving the display device at a third refresh rate if the number of first content frames meets a second condition associated with a second threshold reference.
    Type: Grant
    Filed: December 14, 2007
    Date of Patent: December 18, 2012
    Assignee: Nvidia Corporation
    Inventors: Michael A. Ogrinc, Brett T. Hannigan, David Wyatt
  • Patent number: 8335394
    Abstract: An image processing method for boundary resolution enhancement is disclosed. Firstly, an image is transferred into an image layer. Noise of the image layer is removed by a bilateral filter and crisp edges are retained at the same time. Moreover, the image layer is interpolated by an interpolation filter for resolution enhancement. The image processing method of the present invention can lower the image blur degree substantially, enhance the image resolution and be widely implemented in all sorts of image/video processing hardware devices.
    Type: Grant
    Filed: March 26, 2010
    Date of Patent: December 18, 2012
    Assignee: Corel Corporation
    Inventors: Lihua Zhu, Haihua Wu, Chung-Tao Chu, Richard Hua
  • Patent number: 8334017
    Abstract: A method and apparatus are provided for formation of a composite material on a substrate. The composite material includes carbon nanotubes and/or nanofibers, and composite intrinsic and doped silicon structures. In one embodiment, the substrates are in the form of an elongated sheet or web of material, and the apparatus includes supply and take-up rolls to support the web prior to and after formation of the composite materials. The web is guided through various processing chambers to form the composite materials. In another embodiment, the large scale substrates comprise discrete substrates. The discrete substrates are supported on a conveyor system or, alternatively, are handled by robots that route the substrates through the processing chambers to form the composite materials on the substrates. The composite materials are useful in the formation of energy storage devices and/or photovoltaic devices.
    Type: Grant
    Filed: September 17, 2010
    Date of Patent: December 18, 2012
    Assignee: Applied Materials, Inc.
    Inventors: Victor L. Pushparaj, Pravin K. Narwankar, Dieter Haas, Bipin Thakur, Mahesh Arcot, Vikas Gujar, Omkaram Nalamasu
  • Patent number: 8331742
    Abstract: Method and apparatus enable optical evanescent sensing utilizing a waveguide with an annular core. The annular core can provide detectable sensitivity to a measurand due to optical interactions with contents along an inside surface of the annular core since optical properties of the contents vary with changes in the measurand.
    Type: Grant
    Filed: February 22, 2010
    Date of Patent: December 11, 2012
    Assignee: Weatherford/Lamb, Inc.
    Inventors: Domino Taverner, Edward M. Dowd
  • Patent number: 8330799
    Abstract: According to one embodiment, an image output apparatus includes an input module, a separator, a first image processor, a second image processor, and a controller. The input module is configured to input 3D images. The separator is configured to separate a plurality of left-eye images and a plurality of right-eye images from the 3D images. The first image processor is configured to process the plurality of left-eye images or the plurality of right-eye images. The second image processor is configured to process the plurality of right-eye images or the plurality of left-eye images. The controller is configured to execute control to output the plurality of left-eye images or the plurality of right-eye images processed by at least one of the first image processor and the second image processor.
    Type: Grant
    Filed: August 25, 2011
    Date of Patent: December 11, 2012
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Takayuki Arai, Tatsuya Ono
  • Patent number: 8332842
    Abstract: Techniques are disclosed for creating an application restore point when an application is installed or updated and for restoring the application and other elements of a computing system modified by the installation and update processes to a state as they exist at the application restore point. The application restore point captures information about which files are modified, created, or deleted by the installation and update processes. In one embodiment, a user invokes an installer process to install or update the application. When the installer process modifies or creates a file, an original copy of the file, or a reference to the file is placed into the application restore point. To restore the application, files of the computing system having original copies in the application restore point are replaced with the original copies while all new files referred to in the application restore point are deleted.
    Type: Grant
    Filed: November 14, 2008
    Date of Patent: December 11, 2012
    Assignee: International Business Machines Corporation
    Inventors: Elizabeth Bauer, Doug Chartrand, Kevin Kirkeby, Sanjay A. Patel
  • Patent number: 8330184
    Abstract: In one embodiment, a bidirectional voltage-regulator diode includes first to fifth semiconductor layers formed on an inner surface of a first recess formed in a semiconductor substrate of an N-type in the order. The first semiconductor layer of the N-type has a first impurity concentration lower than an impurity concentration of the semiconductor substrate. The second semiconductor layer of a P-type has a second impurity concentration. The third semiconductor layer of the P-type has a third impurity concentration higher than the second impurity concentration. The fourth semiconductor layer of the P-type has a fourth impurity concentration lower than the third impurity concentration. The fifth semiconductor layer of the N-type has a fifth impurity concentration.
    Type: Grant
    Filed: March 17, 2011
    Date of Patent: December 11, 2012
    Assignee: Kabushiki kaisha Toshiba
    Inventor: Tetsuro Nozu
  • Patent number: 8330130
    Abstract: A charged particle beam device is described. The device includes an emitter unit including an emitter tip; a voltage supply unit adapted for providing a stable voltage to generate a stable extraction field at the emitter tip; a pulsed voltage supply member adapted for providing a pulsed voltage to generate a pulsed extraction field on top of the stable extraction field; a measuring unit for measuring an emitter characteristic; and a control unit adapted for receiving a signal from the measuring unit and for control of the pulsed voltage supply member.
    Type: Grant
    Filed: October 16, 2008
    Date of Patent: December 11, 2012
    Assignee: ICT Integrated Circuit Testing Gesellschaft fur Halbleiterpruftechnik mbH
    Inventors: Dieter Winkler, Udo Weigel, Stefan Grimm