Abstract: A binary number is generated representative of net motion during a field interval of an interlaced video signal from which a field to field difference signal is derived having a sign bit and a group of magnitude bits. The magnitude bits are compared with a first threshold to provide a first threshold indicating signal which, with the sign bit, are applied via respective bus lines to each correlator of a group of five correlators. The correlators are addressed using variable modulo addressing to detect patterns representative of 2--2 pull down and 3-2 pull down film originated frames. Logic is provided for detecting when one and only one of the five correlators indicates film detection to verify film mode operation. Error reduction is further enhanced by comparing the field difference signal with a second threshold, higher than the first, to provide a second thresold indicating signal to each correlator via a second bus.

Abstract: A satellite receiver for digitally encoded television signals includes apparatus for generating a signal indicating the alignment of the receiving antenna which is responsive to the number of errors contained in the digitally encoded television signals. The antenna alignment signal has the form of an audio signal which is coupled to sound reproducing device associated with the satellite receiver. The audio signal corresponds to a continuous tone when the number of errors is less than a predetermined threshold indicating that error correction is possible. The elevation of the antenna is set according with the location of the receiving site. Thereafter, the azimuth of the antenna is coarsely aligned by first rotating the antenna in small increments so locate a region in which the continuous tone is produced. During this coarse alignment procedure, the tuner of the satellite receiver attempts to locate a tuning frequency at which and demodulation and error correction is possible.

Abstract: An auxiliary video data slicer for extracting auxiliary video information from a video signal includes a peak detector. The peak detector determines a peak amplitude of horizontal sync pulses that are included in the video signal and a peak amplitude of a run-in-clock (RIC) waveform that is included in an auxiliary information component of the video signal. A variable threshold level for the peak detector is varied in a first range to detect the peak amplitude of the sync pulses. A threshold voltage for detecting the leading edge of sync pulses is derived from the peak amplitude of the sync pulses. The location of the RIC waveform within a video line interval is determined in response to detection of a sync pulse edge. The variable threshold level of the peak detector is varied in a second range to detect the peak amplitude of the RIC signal. A data slicing threshold level for extracting auxiliary video information is derived from the peak value of the RIC signal.

Abstract: A television receiver includes a decoder for decoding a data component of a television signal, such as extended data services (EDS) data. The data component includes data representative of time of day information. A controller in the receiver processes the time of day information to set the time of day stored in the television receiver to a time value that is accurate to seconds.

Abstract: A television receiver system having secondary picture display capability (such as PIP or POP) includes two tuners and signal processing arrangements, and circuitry for receiving a transmitted channel guide. In response to a "BROWSE" command, the receiver maintains the currently-tuned first channel as the source for the main picture, displays text related to a television show on a second channel, activates the secondary picture display circuitry, and tunes the second tuner to the second channel. In this way, the viewer can simultaneously get the benefit of both a text description of the television show on the second channel and view a secondary image of the television show on the second channel, without tuning away from the first channel supplying the main picture.

Abstract: A VCR includes circuitry for controlling a cable converter unit, circuitry for detecting the presence of a television signal, and control code transmission circuitry for remotely controlling a cable converter unit. Advantageously, because the VCR is coupled to the output of the cable converter unit, the VCR can monitor the television signals received from the cable converter unit to ensure that commands sent to the cable converter unit from the VCR are executed. It is herein recognized that a skip list programmed into a VCR may be used by the VCR to control a cable box. That is, in response to a channel up command received by the VCR, the VCR would not change channels itself, but rather controls the cable box to select the next preferred channel entered in the skip list of the VCR. In this mode of operation, the channel tuning keys (e.g., CHAN UP, CHAN DN) of the VCR remote control are used to control an external source of signals, while the VCR mechanism control keys (e.g.

Abstract: A picture in picture (PIP) video signal is applied to a display device via a non-linear processor that is enabled during display of a main picture component and disabled during display of an inset picture component responsive to a PIP identification signal. The non-linear processor is formed in an integrated circuit which includes a pin for connection to a capacitor that stores peak levels of the PIP video signal. The PIP identification signal is subjected to a voltage level translation for varying the pin voltage over a range of values, .DELTA.V, for facilitating ON/OFF operation of the non-linear processor and is applied to a selected plate of the capacitor for varying the pin voltage without substantial alternation of charge stored within the capacitor whereby only a single pin is required for both capacitor storage and on/off control of the non-linear processor and undesirable visual artifacts, such as "trailing contrast bars", are avoided.

Abstract: Motion compensated video output signal (SO) produced by a soft switching or "fading" (SSW) between the a motion compensated interpolation (MCI) and a "fallback" mode (FFI) (e.g., intra-field), controlled by a "measure of confidence" (CF) in the reliability of the estimated motion vector. The confidence measure includes the following two components, namely: (i) a "basic confidence measure" (e.g., a block based, minimum motion estimation error (BME) and (ii) a measure based on the motion velocity or "speed" of movement of the motion vector or its horizontal (MVX) and vertical components (MVY).

Abstract: In a videocassette recorder including "VCR PLUS+.TM." videocassette recorder programming system capability and autoprogramming capability, it is herein recognized that the channel-mapping procedure may be greatly simplified by using the autoprogramming feature to locate and program all active channels, and then by mapping only those channels which are active, instead of requiring the user to select all 125 possible channel-programming positions.

Abstract: A television receiver, includes a graphics generator for generating for display a stylized image of the environment in which the user's physical television receiver is situated. The image includes graphical representations of functions which are available for selection and control by a user, and at least one of which functions affect the display of the video image. In one embodiment of the invention, a video inset-image from a PIP unit is completely surrounded by a graphics image. The PIP image is aligned with the screen of a graphically displayed television receiver to portray an image of a television displaying an received television program. Alternatively, an animated graphics presentation is displayed in the screen area of the graphically-displayed television receiver to simulate live video.

Abstract: PLL apparatus for generating an oscillatory signal phase locked to a component of a further signal comprises a variable oscillator for generating the oscillatory signal and a source of the further signal. A phase detector responsive to the oscillatory signal and to the component of the further signal, provides a phase error signal which is coupled to the variable oscillator via a limiter. Circuit means are provided for controlling the limiting level of the limiter. The dual limiting substantially improves the loop noise tolerance and reduces the loop sensitivity to occasional phase reversals of the component of the further signal. Additional enhancements to loop stability and noise immunity are provided by an unlock detector which detects and totalizes phase rotations in a selected area of a phase plane and by a phase wrap detector which maintains a lock indication during phase angle wrapping.

Abstract: A digital video signal processing system receives encoded packets of data representing video image information in compressed form. A video decoder and an associated video RAM are used to decode and decompress the video packets to form groups of video image representative digital words. The video decoder also includes an on-screen display (OSD) unit which converts a graphics bit map stored in a section of the video RAM to groups of graphic image representative digital words. The image representative digital words and the graphic representative digital words are multiplexed together under the control of the OSD display unit.

Abstract: A television receiver having an electronically controlled tuner is presented. A controlled local oscillator provides a local oscillator signal for the mixer. The controlled local oscillator includes an first input terminal for receiving a control signal for controlling its frequency and a first output terminal for providing an output local oscillator signal. A phase-locked loop includes a second input terminal for receiving the local oscillator signal and a second output terminal for providing a signal back to the first input terminal of the controlled local oscillator for controlling its frequency. At least a portion of the coupling between the first output terminal and the second input terminal, and the second output terminal and the first input terminal, have a common line.

Abstract: A cable converter includes a first signal path from an RF input terminal to an RF output terminal including a tuner portion, a decoder portion, and a remodulator portion for remodulating a selected channel to an unused cable channel in the upper UHF band of cable channels in the range of cable channels 84 through 125. The subject cable converter also includes a direct parallel, second signal path from the RF input terminal to the RF output terminal. The second signal path passing all of the cable channels received at the RF input terminal to the RF output terminal substantially unimpeded.

Abstract: In a videocassette recorder including VCR PLUS.TM. capability and autoprogramming capability, the channel-mapping procedure may be greatly simplified by using the autoprogramming feature to locate and program all active channels, and then by mapping only those channels which are active, instead of requiring the user to select all 125 possible channel-programming positions. It is herein recognized that it is desirable that the autoprogramming scan list and the channel guide list be independently modifiable. In one embodiment, the performance of an autoprogramming function resets the lists to a state in which both lists contain identical data.

Abstract: To accomplish automatic error correction in an electronics instrument, the instrument includes a controller, coupled to at least one peripheral unit via a communications bus for bidirectional communication with the peripheral unit, coupled to a memory circuit for storing data indicative of the operational status of the peripheral unit, and coupled to a power supply which supplies power to the peripheral unit. The controller reads the operational status data from the peripheral unit and upon detection of an error condition, writes data indicative of status to the memory circuit and causes a removal of power, for a predetermined time, from said peripheral unit, followed by the reapplication of the power. The power supplies themselves are also monitored and, in the event of a detected error in power supply output, the power supply is turned off and turned on in an attempt to clear the problem.

Abstract: It is desirable that a cordless telephone system include a single base unit and at least two remote handunits. With such a system, two users may maintain participation in a three-way conversation while being free to move about within reasonable transmitting distance to and from the base unit. Circuitry is provided in which a signal received from one handunit is transmitted to the other handunit, and sidetone from one handunit is transmitted back to that handunit.

Abstract: For the purpose of a high precision frequency fine tuning, for example, to a certain television channel, an analog circuit, the frequency of which can be balanced, for example, an demodulator, is balanced in an integrated circuit with the help of a control current. The control current generated in a regulating loop is dependent on a reference frequency with the appropriate accuracy and on a reference frequency with the appropriate accuracy and on a reference capacitancy integrated on the chip. After selecting a frequency, the analog circuit is calibrated and the frequency is subsequently fine-tuned in a measuring mode. Following that, the analog circuit operates in the normal mode.

Abstract: A first input-first output type circuit manages m n-bit words using m stages connected in series with first and second non-overlapping clock signals controlling even-numbered and odd numbered ones of the m stages, respectively. A process for controlling the circuit involves a first write step during which each word in a first half of the m words is written into both an odd-numbered stage and a successive even numbered stage so that m/2 of the m words occupy all m of the stages. After the first write step is completed, a second write step begins during which the m/2 words written during the first write step are shifted and stored in the ((m/2)+1)-th through m-th stages. Writing is disabled in each of the m stages beginning with the m-th stage and proceeding successively to the first stage. The m/2 words not written during the first write step are written into those stages not yet disabled in the same manner as in the first write step.

Abstract: A composite video input signal is combined with a noise reduction signal to form a noise reduced first video signal which is delayed by multiple time periods of (i) one line less one-half color cycle, (ii) one line and (iii) one line plus one-half color cycle to form respective ones of first, second and third time delayed signals. The first and third delayed signals are combined to form an averaged signal from which a subtractor subtracts the composite video input signal. The resultant difference signal is limited to form the noise reduction signal. The noise reduced first video signal and the second delayed video signal are combined in an output circuit to provide noise reduced and separated chrominance and luminance output signals.