Abstract: In the pointing device of the present invention, a sensor is connected via an amplifier section to a microcomputer. Further, a reference voltage generator is connected to the microcomputer and the amplifier section. With this construction, the microcomputer modifies a coefficient, used when calculating a reference voltage for determining a cursor speed, in response to the size of a force applied to the sensor by an operator.

Abstract: A method of semiconductor fabrication that reduces an antenna effect that can occur during a plasma etching procedure. The semiconductor device has circuitry fabricated over the surface of a silicon substrate and includes a gate structure having a gate oxide layer beneath a conductor layer. The method includes etching a polysilicon layer formed over the surface of the circuitry. The method also includes forming trenches in the polysilicon layer at the roots of sidewalls of gate structures of the semiconductor device, at an early stage of plasma etching, before the polysilicon layer has been completely consumed. The plasma may include a gas mixture of chlorine and oxygen. The gas mixture may have a chlorine/oxygen flow ratio of about 100/5 sccm.

Abstract: The present invention provides a facsimile apparatus and controlling method, in which a confidential box number for PC transmission function for sending received information to a personal computer (15) is preliminarily registered. When a facsimile correspondence accompanying the confidential box number for PC transmission function is received, a control section (1) sends out the received information to an interface (10). Thus, the facsimile apparatus can distinguish information to be destined for the personal computer (15) from other received information to automatically send the information to the personal computer (15) by utilizing a confidential communication function thereof.

Abstract: A semiconductor device includes connector leads which have an offset portion supported by the primary surface of a semiconductor chip on which electronics circuitry is formed into an integrated circuit. The offset portion is disposed near the contact pads for connecting the electronics circuitry. The remaining portion of the connector leads far from the contact pads is spaced from the primary surface by an adhesive strip of electrically insulative material. Bonding wires connect the connector leads to the contact pads. The total thickness of the package is reduced to accomplish a thinner and flatter semiconductor device.

Abstract: A portable hands-free telephone converter that allows a user to speak on the telephone without using the hands to hold a handset or the like. The telephone converter includes a first coupler for coupling the telephone converter to the receiver of the handset, a second coupler for coupling the telephone converter to the transmitter of the handset, a converter, coupled via the first coupling means and the second coupling means to the handset, for receiving the incoming voice from the receiver and outputting the user's voice to the transmitter, and a controller, coupled to the converter, for amplifying the user's voice signal and for amplifying the incoming voice signal received by the converter from the handset receiver.

Abstract: A motion detector and a motion area detector detect shifts of areas at which motions exist by using signals of fields before and after the field to be detected. According to shifts of the detected areas, an initial vector closest to the true motion is selected among prospective initial vectors produced at an initial vector selector or an initial vector detector by a block matching method, thereby reducing detection errors in motion vectors occurring at a time of the detection of motion vectors, and thereby improving accuracy of motion vectors, so that image distortions would reduced in an interpolating process.

Abstract: A method for accurately measuring the threshold voltage of a MOSFET device. A variable DC voltage is connected between the drain and the source, and the source and the substrate are grounded. The drain-to-source voltage is varied among a first predetermined number of levels in a first range that approaches zero volts. The value of one K parameter for each level of the drain-to-source voltage is obtained. A curve representing the K parameter versus drain-to-source voltage characteristic is plotted. The intercept of the curve with the K parameter axis, by linear extrapolation of the curve is obtained, the intercept represents the threshold voltage of the MOSFET device.

Abstract: This invention deals with the formation of the multi-level electrode metal structure and the interconnecting inter-level metal studs used in the fabrication of VLSI circuits. After the metal layers have been formed the inter-level dielectric material used in forming the structure is etched away leaving an air dielectric between the levels. The electrode metal and the inter-level metal studs are coated with a thin envelope oxide and the entire structure is covered with a passivation layer using material with a poor step coverage. The structure of this invention provides reduced parasitic capacitance, better step coverage in interconnecting layers, and improved circuit performance.

Abstract: A new method of metallization using a new design of metal contact shape, contact/via profile, and metal lines having considerably reduced current density and improved electromigration of metal lines is achieved. Metal contacts are formed in a rectangular shape instead of a square shape with the wider side perpendicular to the current direction. Contact openings are made having concavo-concave profiles which can provide a wider conducting cross-sectional area than can conventional openings with a vertical profile near the contact bottom. Gaps are formed within wide and high current metal lines so that current density can be effectively lowered by utilizing the whole metal line uniformly.

Abstract: A furnace with a large quartz tube with a gas inlet on one end, and a large opening at the other end for introducing and withdrawn wafers on a support. At least one small quartz tube is provided within and adjacent the sidewall of the large tube that has a gas inlet on one end outside of the large tube, and apertures in the sidewall. In use, a major stream of gas is provided by a gas inlet on the large tube that flows longitudinally through the large tube. A series of secondary streams of gas are provided from the apertures in the small tube that flow perpendicular to the major stream and across the surfaces of the wafers.

Abstract: A runnable block including a block body having a first engage projection and first engage recess respectively provided on the top and bottom surfaces of the block body, and four wheels rotatably attached to both sides of the block body via wheel shafts. A part of each wheel of this block protrudes farther downward than a lowermost surface including the lower engage section, and the diameter of each wheel is set approximately equal to the distance from the top of the first engage projection to the bottom of the first engage recess. As one block is coupled to another block by engaging the first engage projection of the former block to the first engage recess of the latter block, the wheels of both blocks mutually contact each other. This contact allows the rotation of one wheel to be transmitted to the other wheel, so that when the coupled blocks run, all the wheels of the blocks rotate.

Abstract: A structure for the data processing device, including a memory cell array part having a plurality of memory cells for storing data, first and second address terminals for receiving address signals, a first controller for receiving a first read signal and generating a first read control signal, a second controller for receiving a second read signal and generating a second read control signal, a first latch circuit for holding data provided by a memory cell corresponding to an address signal provided at the first address terminal in response to the first read control signal, and a second latch circuit for holding data provided by a memory cell corresponding to the address signal provided at the second address terminal in response to the second read control signal.

Abstract: In an ignition system for sensing a change in a resistance value during a combustion of a heating resistive element and detecting a fire extinction, a resistance value of the heating resistive element is sensed by a resistance value detecting circuit at a predetermined time interval set by an interval setting circuit, and a difference between the resistance value and that sensed before an elapse of the predetermined period of time is calculated by a resistance value calculating circuit. A comparing circuit compares a difference in the resistance values with a reference value stored in a reference value memory, and a extinction detecting circuit detects a fire extinction when the difference calculated by the resistance value difference calculating circuit had exceeded the reference value. Accordingly, there is attained an ignition system which reasonably determines a fire extinction without an additional complex structure.

Abstract: A multi-layered optical disk reading method which reproduces encoded data from each data layer by focusing a laser beam precisely onto the data layer of the multi-layered optical disk. After a multi-layered optical disk is loaded, a central processing unit (CPU) receives an operator's signal to access a certain data layer. Then the CPU refers to stored data in the CPU's memory for diffraction angle to focus the laser beam onto the certain data layer. The CPU retrieves an operational coded signal, and transmits the signal to a liquid crystal diffraction device to modulate the liquid crystal diffraction device to deflect and focus the laser beam onto the certain data layer. After the liquid crystal diffraction device is modulated by the operational signal from the CPU, the CPU also operates a routing circuit to transmit a read-out signal from a detector which receives a reflected laser beam from the certain data layer, to a selected decoding circuit in a data processor.

Abstract: A compact contactless flash memory array for semiconductor EEPROM devices having a number of memory cell units. Field oxide layers for the flash memory array are first grown over the surface of an SOI wafer. Gate oxide layers are then grown. Floating gates are then formed by patterning the first polysilicon layer. Source/drain buried bitlines for the flash memory array are formed. A first BPSG (borophosphosilicate glass) layer is deposited and then reflown and etched back. An oxide-nitride-oxide layer is formed. A second polysilicon layer is deposited with in-situ dope. A WSi.sub.x layer then forms. Stacked gates for the flash array are formed by patterning into the formed oxide-nitride-oxide, second polysilicon and WSi.sub.x layers. The stacked gates are then covered with a second BPSG layer. Contact openings for the source/drain buried lines are formed.

Abstract: A method for executing software which is stored in an external memory attached to console equipment having a CPU uses software assets advantageously. The console equipment is designed to bank switch from a BIOS ROM included in the console equipment to the software stored in the external memory during an initialization routine, to check the genuineness of the software during a security check routine, and to execute the software by the CPU of the console equipment during a program executing routine if the software is judged to be genuine during the security check routine. In some embodiments of the method, the program is executed by the CPU during the program executing routine after the security check routine, at least, has been skipped. In other embodiments, the security check is always forced to be successful. Circuitry for performing the method is also disclosed.

Abstract: A compact contactless trenched flash memory array for semiconductor EEPROM devices is disclosed. The flash memory array comprises a number of memory cell units. Each of the cell units comprises a body line, source and drain regions and a stacked gate constructed over a silicon wafer substrate. The source and drain regions are buried regions and the body line is isolated by the surrounding buried source/drain regions and trenches formed to cut deep down to the substrate of the wafer. The stacked gate includes a first polysilicon layer, an oxide-nitride-oxide configuration, a second polysilicon layer, a pad oxide layer and a nitride layer. The source and drain buried regions sandwiches the body line, and the stacked gate substantially sits directly atop the body line. The flash memory array is free from the serious problem of short channel effect.

Abstract: A video coding apparatus receives a video signal containing moving-picture information, together with other information present in certain horizontal scanning lines in the vertical blanking intervals. The video coding apparatus compresses the moving-picture information into a compressed digital video data stream, assembles the other information into packets, and multiplexes the packets with the compressed digital video data stream to generate an output signal. A video decoding apparatus demultiplexes this signal to separate the packets from the compressed digital video data stream, decompresses the compressed digital video data, and outputs a video signal having information obtained from the packets in certain horizontal scanning lines in the vertical blanking intervals, and decompressed moving-picture information in other horizontal scanning lines.

Abstract: A method of modular reduction P mod Q based on a precomputation. Two quantities are precomputed and stored in a look-up table. Based on these stored precomputed quantities, two stages of partial modular reduction are performed. The result of the second stage of partial modular reduction is then adjusted according to the value of Q, to determine the modular reduction result. The modular reduction result may be provided to variable radix multiplication logic circuitry.