Patents Represented by Attorney, Agent or Law Firm Rabine Berdo, P.C.
  • Patent number: 8163630
    Abstract: A method of manufacturing a semiconductor device by thinning a substrate by grinding, and performing ion implantation. In a diode in which a P anode layer and an anode electrode are formed at a side of a right face of an N? drift layer, and an N+ cathode layer and a cathode electrode are formed at a side of a back face of the N? drift layer, an N cathode buffer layer is formed thick compared with the N+-type cathode layer between the N?-type drift layer and the N+ cathode layer, the buffer layer being high in concentration compared with the N? drift layer, and low compared with the N+ cathode layer. When a reverse bias voltage is applied, a depletion layer is stopped in the middle of the N cathode buffer layer, and thus prevented from reaching the N+ cathode layer, so that the leakage current is suppressed.
    Type: Grant
    Filed: April 13, 2010
    Date of Patent: April 24, 2012
    Assignee: Fuji Electric Co., Ltd.
    Inventor: Michio Nemoto
  • Patent number: 8164197
    Abstract: A semiconductor device according to the present invention includes: a first interlayer dielectric film; a lower wire formed on the first interlayer dielectric film; a second interlayer dielectric film formed on the first interlayer dielectric film and the lower wire; and an upper wire formed on the second interlayer dielectric film to intersect with a prescribed portion of the lower wire in plan view. The first interlayer dielectric film is provided with a groove dug from the upper surface thereof in a region including the prescribed portion in plan view. The prescribed portion enters the groove. At least a portion of the second interlayer dielectric film formed on the lower wire has a planar upper surface.
    Type: Grant
    Filed: August 6, 2008
    Date of Patent: April 24, 2012
    Assignee: Rohm Co., Ltd.
    Inventors: Yuichi Nakao, Satoshi Kageyama
  • Patent number: 8165476
    Abstract: A single sideband modulator uses a radio-frequency signal output by a voltage controlled oscillator to modulate a reference optical signal output by a local light source, thereby obtaining several sideband signals, and combines the sideband signals into a single reproduced optical signal. The optical coupler couples the reproduced optical signal with a received optical signal to generate an optical beat signal, from which a photoelectric transducer and loop filter generate a control voltage for the voltage controlled oscillator. These components operate as an optical phase locked loop that efficiently locks the reproduced optical signal in frequency and phase with the received optical signal by using the energy of all sidebands of the reference optical signal. The phase locked loop is useful for coherent detection of the received optical signal.
    Type: Grant
    Filed: June 18, 2009
    Date of Patent: April 24, 2012
    Assignee: Oki Electric Industry Co., Ltd.
    Inventor: Akihiro Fujii
  • Patent number: 8164667
    Abstract: An image sensing device and image sensing method is described, in which an interrupt circuit is disposed to interrupt a clock signal input to a logic circuit not associated with the reading of image data when the image data is read, so as to temporarily interrupt the operation of the logic circuit, thereby reducing the power noises caused by the current generated during the operation of the logic circuit.
    Type: Grant
    Filed: May 8, 2009
    Date of Patent: April 24, 2012
    Assignee: Pixart Imaging Inc.
    Inventors: Le-Chun Ho, Wen-Cheng Yen, Keng-Hao Chang
  • Patent number: 8162278
    Abstract: A mount structure includes a base and a bearer. The base has a slot, and at least one combining block is disposed protruding from the slot. The bearer has a bearing portion and a combining portion. The bearing portion is connected to a display, and the combining portion is installed in the slot through hooks, buckles, latches, screws, or other combining methods, such that the bearer is fixed on the base. Moreover, the combining portion is provided with reinforcing ribs for enhancing the structural strength of the bearer.
    Type: Grant
    Filed: August 31, 2011
    Date of Patent: April 24, 2012
    Assignee: AmTran Technology Co., Ltd
    Inventor: Chun-Ping Tai
  • Patent number: 8164160
    Abstract: A semiconductor device according to the present invention has a multilayer wiring structure laminating and disposing a plurality of with sandwiching an insulating film and includes: a copper wire having copper as a main component; an insulating film formed on the copper wire; an aluminum wire having aluminum as a main component and formed on the insulating film to be electrically connected to the copper wire via a via hole formed to penetrate through the insulating film; and a surface protective film formed on the aluminum wire; and the surface protective film formed with a pad opening exposing a portion of the aluminum wire as an electrode pad for electrical connection with an external portion.
    Type: Grant
    Filed: May 30, 2008
    Date of Patent: April 24, 2012
    Assignee: Rohm Co., Ltd.
    Inventors: Yuichi Nakao, Takahisa Yamaha
  • Patent number: 8164201
    Abstract: Disclosed are a semiconductor device wherein warping of a semiconductor chip due to a sudden temperature change can be prevented without increasing the thickness, and a semiconductor device assembly. The semiconductor device comprises a semiconductor chip, a front side resin layer formed on the front surface of the semiconductor chip by using a first resin material, and a back side resin layer formed on the back surface of the semiconductor chip by using a second resin material having a higher thermal expansion coefficient than the first resin material. The back side resin layer is formed thinner than the front side resin layer.
    Type: Grant
    Filed: June 28, 2006
    Date of Patent: April 24, 2012
    Assignee: Rohm Co., Ltd.
    Inventors: Masaki Kasai, Osamu Miyata
  • Patent number: 8159033
    Abstract: A junction forming region is formed between a drain region of a MOS structure and a device isolation region which surrounds the MOS structure and is in contact with the drain region, to form a PN junction together with the drain region. As a consequence, it is possible to adjust a breakdown voltage of an ESD protection device which is fabricated in the same process as that for an internal device without varying basic performance of the internal device even at a final stage of an LSI manufacturing process.
    Type: Grant
    Filed: March 4, 2009
    Date of Patent: April 17, 2012
    Assignee: Lapis Semiconductor Co., Ltd.
    Inventor: Hirokazu Hayashi
  • Patent number: 8160792
    Abstract: A failure detection system for accurately detecting a failure of a clutch. A clutch actuation mechanism changes the relative positions of drive-side and driven-side members of the clutch. A position detector detects a position of the clutch actuation mechanism as a clutch position. A control unit obtains torque transmitted from the drive-side member to the driven-side member as actual transmission torque. The control unit detects a failure of the clutch based on the actual transmission torque and the clutch position.
    Type: Grant
    Filed: February 22, 2008
    Date of Patent: April 17, 2012
    Assignee: Yamaha Hatsudoki Kabushiki Kaisha
    Inventor: Kengo Minami
  • Patent number: 8159119
    Abstract: Disclosed are a vacuum channel transistor including a planar cathode layer formed of a material having a low work function or a planar cathode layer including a heat resistant layer formed of a material having a low work function, and a manufacturing method of the same. In the vacuum channel transistor, electrons can be emitted even when a low voltage is applied to a gate layer, a voltage of an anode layer has a small influence on electron emission of a cathode layer, and instability of emission current is obviated. Accordingly, high efficiency and a long lifespan can be achieved, and thus operational stability is secured.
    Type: Grant
    Filed: September 30, 2008
    Date of Patent: April 17, 2012
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Dae Yong Kim, Hyun Tak Kim
  • Patent number: 8160071
    Abstract: An L2/L3 packet processing and method are disclosed to process various Ethernet packets by interworking with a PBBN (Provider Backbone Bridges Network), a PBN (Provider Bridges Network), and an IPN (Internet Protocol Network).
    Type: Grant
    Filed: December 1, 2009
    Date of Patent: April 17, 2012
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Yong Wook Ra, Chang Ho Choi, Tae Kyu Kang, Byung Jun Ahn
  • Patent number: 8159271
    Abstract: A scan driver includes a voltage setting circuit, a counter circuit, a logic circuit, a dynamic decoder, N level shift circuits and N output stage circuits, wherein N is a natural number. The voltage setting circuit sets N voltage signals to a first level. The counter circuit provides count data to the logic circuit, which generates M control signals according to the count data, wherein M is a natural number. The dynamic decoder includes multiple transistors, arranged in N rows, for receiving the respective N voltage signals. The transistors are further arranged in M columns and are controlled by the respective M control signals to determine levels of the N voltage signals. The N level shift circuits lift the levels of the respective N voltage signals, and the N output stage circuits output respective N gate signals based on the N voltage signals whose levels are shifted.
    Type: Grant
    Filed: November 14, 2008
    Date of Patent: April 17, 2012
    Assignee: Novtek Microelectronics Corp.
    Inventor: Ching-Ho Hung
  • Patent number: 8157096
    Abstract: A foldable air cushion includes a main air tube piece composed by a main body and buffer walls; and side air tube pieces configured adjacent to the main air tube piece and each composed by a side body and folding portions. A bending line is configured between the main body and the buffer walls, and the side body and the folding portions. A folding line is configured between the main air tube piece and the side air tube pieces, while the folding areas are configured on the side air tube piece adjacent to the intersection of the bending line and the folding line. When the main air tube piece is bended along the bending line, the side bodies of the side air tube pieces are folding along the folding areas, and the side air tube pieces are folded along the folding line, a containing space will be formed between the main air tube piece and the side air tube pieces.
    Type: Grant
    Filed: December 11, 2006
    Date of Patent: April 17, 2012
    Inventors: Chian Hua Liao, Yao Sin Liao, Bo Xin Jian
  • Patent number: 8160041
    Abstract: A radio communication terminal and a radio communication system which can avoid an obstacle that is caused by a malicious wormhole while using a harmless wormhole. There are provided: a radio communication terminal in which a relay route about a certain node is stored as a backup route about the node and the backup route is changed and set as a relay route about the node in accordance with a detection of an obstacle caused by application data; and a radio communication system in which a sink node transmits a transfer destination change command in association with the change setting and a node which received the command sets a node of a transferring source of the command as a transfer destination node.
    Type: Grant
    Filed: November 16, 2009
    Date of Patent: April 17, 2012
    Assignee: Oki Electric Industry Co., Ltd.
    Inventor: Jun Nakashima
  • Patent number: 8157684
    Abstract: A belt is entrained about the rollers. A belt guide is secured to an inner surface of the belt and is guided by pulleys. The belt guide is formed of a material that has a dissipation factor of tan ??0.05 at a resonance frequency of 1 Hz±10% and at a temperature of 50±0.5° C., and a storage modulus of E??8.0×106 (Pa) at a resonance frequency of 1 Hz±10% and at a temperature of 50±0.5° C. Another material has tan ??0.05 at 1 Hz±10% and at 50±0.5° C., and E??8.0×106 (Pa) at 1 Hz±10% and at 50±0.5° C. The belt guide may be formed of a plurality of layers.
    Type: Grant
    Filed: February 7, 2005
    Date of Patent: April 17, 2012
    Assignee: Oki Data Corporation
    Inventor: Michiaki Ito
  • Patent number: 8151826
    Abstract: A water-saving switch equipment, which arranged in the outlet of a tap body, includes a button arranged in the button groove of the tap body, and a water-saving piece arranged under the button. The water-saving piece has a piece which is in the chamber of the outlet. The water-saving switch equipment may adjust the water output without switching on or off the tap's spool.
    Type: Grant
    Filed: August 28, 2009
    Date of Patent: April 10, 2012
    Assignee: Xiamen Clease Industries Co., Ltd.
    Inventor: Tangjun Dan
  • Patent number: 8154070
    Abstract: A nonvolatile memory includes a semiconductor substrate having a body member and a step member formed on the body member, a highly doped first well layer formed on the step member, a control electrode formed on the step member, a first and a second diffusion layers in the substrate, lightly doped second well layers formed on the main surface of the substrate between the first or the second diffusion layer and the first well layer, and a first and a second charge-storage multi-layers sandwiching the step member and the control electrode, each of the first and the second charge-storage multi-layers including a bottom oxide layer, a charge-storage film, a top oxide layer and a floating electrode which are formed in that order.
    Type: Grant
    Filed: December 5, 2007
    Date of Patent: April 10, 2012
    Assignee: Oki Semiconductor Co., Ltd.
    Inventor: Toshikazu Mizukoshi
  • Patent number: 8155162
    Abstract: A nitride semiconductor laser device is formed by growing a group III nitride semiconductor multilayer structure on a substrate. The group III nitride semiconductor multilayer structure has a laser resonator including an n-type semiconductor layer, a p-type semiconductor layer and a light emitting layer held between the n-type semiconductor layer and the p-type semiconductor layer. The laser resonator is arranged to be offset from the center with respect to a device width direction orthogonal to a resonator direction toward one side edge of the device. A wire bonding region having a width of not less than twice the diameter of an electrode wire to be bonded to the device is formed between the laser resonator and the other side edge of the device.
    Type: Grant
    Filed: December 30, 2010
    Date of Patent: April 10, 2012
    Assignee: Rohm Co., Ltd.
    Inventors: Shinichi Kohda, Yuji Ishida
  • Patent number: D657606
    Type: Grant
    Filed: June 3, 2010
    Date of Patent: April 17, 2012
    Assignee: Tsann Kuen (Zhangzhou) Enterprise Co., Ltd.
    Inventor: Kunyu Tsai
  • Patent number: D658164
    Type: Grant
    Filed: June 17, 2011
    Date of Patent: April 24, 2012
    Assignee: JS. Element Limited
    Inventor: Sik Yuen Chan