Patents Represented by Attorney Rahul D. Engineer
  • Patent number: 7145120
    Abstract: A guided heating apparatus and a method for using the same is provided. The apparatus includes a guiding enclosure, a supporting piece, and an absorbing piece. The guiding enclosure guides and keeps energy from an energy source within the guiding enclosure. The guiding enclosure is made of a material reflective of the energy. The energy source is either one of a microwave source and an infrared source. The supporting piece is detachably coupled with the guiding enclosure and is made of a material transparent to the energy. The absorbing piece is coupled to and supported by the supporting piece within the guiding enclosure. The absorbing piece is made of at least one material that absorbs the energy and transfers the energy to an object to be heated. The absorbing piece has a predetermined composition that controls an energy absorption rate of the absorbing piece.
    Type: Grant
    Filed: August 27, 2004
    Date of Patent: December 5, 2006
    Assignee: Intel Corporation
    Inventors: Song-Hua Shi, Bob Sankman
  • Patent number: 7125321
    Abstract: A multi-platen, multi-slurry chemical mechanical polishing method comprises providing a substrate having a surface that includes at least one nitride structure and an oxide layer atop the nitride structure, performing a first CMP process on the substrate using a first platen with a silica based slurry to remove a bulk portion of the oxide layer without exposing the nitride structure, performing a second CMP process on the substrate using a second platen with a ceria based slurry to remove a residual portion of the oxide layer and to expose at least a portion of the nitride structure, and performing a third CMP process on the substrate using the first platen with a silica based slurry to remove at least one defect caused by the ceria based slurry.
    Type: Grant
    Filed: December 17, 2004
    Date of Patent: October 24, 2006
    Assignee: Intel Corporation
    Inventors: Matthew J Prince, Mansour Moinpour, Francis M Tambwe, Gary Ding
  • Patent number: 7126527
    Abstract: Methods and apparatuses for mobile device location via a network based local area augmentation system. In one embodiment a plurality of base stations each has a known location. Each base station includes a positioning receiver to generate base station location information and a link to a network to transmit the base station location information. A correction information calculation module is coupled to the network to receive base station location information from each of the base stations via the network. The correction information calculation module calculates correction information as a function of the base station location information and the known location for all of the base stations.
    Type: Grant
    Filed: June 23, 2000
    Date of Patent: October 24, 2006
    Assignee: Intel Corporation
    Inventor: Sundeep Bajikar
  • Patent number: 7125583
    Abstract: A method for improving thickness uniformity and throughput of a carbon doped oxide deposition process is described. That method comprises removing pre-deposition steps in a deposition phase. Moreover, helium plasma is added to a pre-clean phase to eliminate the production of dummy wafers.
    Type: Grant
    Filed: May 23, 2002
    Date of Patent: October 24, 2006
    Assignee: Intel Corporation
    Inventors: Ebrahim Andideh, Kevin L. Peterson, Jeff Bielefeld
  • Patent number: 7109504
    Abstract: According to a first embodiment of the invention, a dual cathode electrode for generating EUV light is disclosed. The dual cathode electrode may include a first outer cathode, a second inner cathode, and an anode disposed between the inner and outer cathodes. The dual cathode electrode also includes a plasma disposed in between the cathodes that emits EUV photons when it is excited by an arc between the anode and the cathodes. According to a second embodiment of the invention, several Dense Plasma Focus (DPF) electrodes are placed along a circle. The DPF electrodes, when activated, will emit electron photons from the circle in which they are placed thereby avoiding obscuration used to protect UV mirrors against debris.
    Type: Grant
    Filed: June 30, 2004
    Date of Patent: September 19, 2006
    Assignee: Intel Corporation
    Inventors: Manish Chandhok, Eric Panning, Bryan J. Rice
  • Patent number: 7045468
    Abstract: A MOSFET structure in which the channel region is contiguous with the semiconductor substrate while the source and drain junctions are substantially isolated from the substrate, includes a dielectric volume formed adjacent and subjacent to portions of the source and drain regions. In a further aspect of the invention, a process for forming an isolated junction in a bulk semiconductor includes forming a dielectric volume adjacent and subjacent to portions of the source and drain regions.
    Type: Grant
    Filed: August 21, 2003
    Date of Patent: May 16, 2006
    Assignee: Intel Corporation
    Inventor: Chunlin Liang
  • Patent number: 7045408
    Abstract: An integrated circuit is described that comprises a PMOS transistor and an NMOS transistor that are formed on a semiconductor substrate. A silicate glass layer is formed on only the PMOS transistor or the NMOS transistor; and an etch stop layer is formed on the silicate glass layer. Also described is a method for forming an integrated circuit. That method comprises forming a PMOS transistor structure and an NMOS transistor structure on a semiconductor substrate, forming a silicate glass layer on only the PMOS transistor structure or the NMOS transistor structure, and forming an etch stop layer on the silicate glass layer.
    Type: Grant
    Filed: May 21, 2003
    Date of Patent: May 16, 2006
    Assignee: Intel Corporation
    Inventors: Thomas Hoffmann, Chris Auth, Mark Armstrong, Stephen Cea
  • Patent number: 6456161
    Abstract: An amplifier circuit comprising an input stage capable of receiving and amplifying an input signal, a gain stage electrically coupled to the input stage that is capable of further amplifying the input signal, and an output stage electrically coupled to the gain stage that is capable of charging a capacitance of the amplifier circuit and outputting the amplified input signal. The gain stage of the amplifier circuit comprises a pair of gain transistors with base terminals that are electrically coupled to the input stage, collector terminals that are electrically coupled to a path to ground, and emitter terminals that are electrically coupled to the output stage.
    Type: Grant
    Filed: June 11, 2001
    Date of Patent: September 24, 2002
    Assignee: Fairchild Semiconductor Corporation
    Inventor: Steven Obed Smith
  • Patent number: 6416927
    Abstract: Copolymers and terpolyers are used in chemically amplified resists. The terpolymers are of the formula: wherein R3 is selected from the group consisting of hydrogen and a C1 to C10 aliphatic hydrocarbon, wherein the aliphatic hydrocarbon contains substituents selected from the group consisting of hydrogen, hydroxy, carboxylic acid, carboxylic anhydride, and combinations thereof; R4 is selected from the group consisting of hydrogen and a C1 to C10 aliphatic hydrocarbon, wherein the aliphatic hydrocarbon contains substituents selected from the group consisting of hydrogen, hydroxy, carboxylic acid, carboxylic anhydride, and combinations thereof; R5 is selected from the group consisting of hydrogen and methyl; R6 is selected from the group consisting of t-butyl and tetrahydropyranyl; m and n are each integers; and wherein n/(m+n) ranges from about 0.1 to about 0.5.
    Type: Grant
    Filed: September 29, 2000
    Date of Patent: July 9, 2002
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sang-jun Choi, Chun-geun Park, Young-bum Koh