Abstract: A content addressable memory (CAM or L3 Table) contains flow information for each active flow of packets passing through a given node of a data communications network. The CAM has associated with each entry (corresponding to each active flow) a packet counter, a byte counter, a token bucket and a contract value. Each flow is assigned one of a plurality of output queues and optionally at least one output threshold value. A token bucket algorithm is employed on each flow to determine whether packets from that flow exceed the contract value. Such packets may be dropped or optimally modified to reflect an alternate output queue and/or alternate threshold before being sent to the selected output queue for transmission from the node. In another aspect an access control list CAM (ACLCAM) contains masked flow information. The ACLCAM provides an index to internal token bucket counters and preconfigured contract values of an aggregate flow table which becomes affected by the packet statistics.
Type:
Grant
Filed:
May 28, 2002
Date of Patent:
September 28, 2004
Assignee:
Cisco Technology, Inc.
Inventors:
Raymond J. Kloth, Thomas J. Edsall, Michael Fine, Dinesh G. Dutt
Abstract: A system and method for enabling data exchanges between various data processing systems, including disparate systems, is described. In one exemplary embodiment, the present invention can receive a hierarchical data structure containing a plurality of data categories; identify a plurality of conversion targets included in the plurality of data categories; generate a plurality of tabular data structures, each of the plurality of tabular data structures corresponding to one of the plurality of conversion targets; and join each of the generated plurality of tabular data structures.
Abstract: Shaping tool for the polymerisation of profiled parts (P) made of a composite material, comprising a mould (10) formed of several unconnected elements (14, 16), a flexible and leak tight bladder (24) capable of pushing a part blank into contact with the walls of a cavity (12) formed in the mould (10), and devices (36) such as flexible walls or the leak tight bladders capable of holding elements (14, 16) of the mould (10) in contact with each other. The result is a part (P) with outside surfaces free of geometric and dimensional defects.
Abstract: A circuit controls an oscillation amplitude of a crystal oscillator including a crystal resonator, a current source supplying a bias current, and an output transistor coupled to the crystal resonator and the current source. The circuit includes a peak detector for detecting a peak voltage of an output signal of the crystal oscillator, and a controller coupled to the peak detector and to the current source for controlling the current source in accordance with a difference between the peak voltage and a target voltage, the target voltage being set to be substantially equal to 2Vth, where Vth is a threshold voltage of the output transistor. A frequency control circuit controls a first switched-capacitor array and a second switched-capacitor array coupled to the crystal resonator, and alternately switches a unit capacitor in the first switched-capacitor array and a unit capacitor in the second switched-capacitor array based on a frequency control signal.
Abstract: Analogue interface (24) for an, information exchange circuit by amplitude modulation of a carrier wave, comprising an interface input (102, 104) intended to be connected to the terminals of an antenna (22), a demodulator (150) one output of which is connected to a logical unit (26) in the information exchange circuit, and means (106) of supplying a power supply voltage to the information exchange circuit. According to the invention, the interface also comprises means of rectifying and filtering (116, 118) the carrier wave, connected to one input of the demodulator (150) and a device (120, 122, 132) for regulating the said power supply voltage.
Application in particular to the identification and sorting of objects or persons.
Abstract: A distributed cache management system controls individual cache objects so they are selectively updated if messages are received at another cache in an expected order and selectively invalidated if messages are received with certain error state, thus causing reference to be made to the central database. In specific embodiments of the invention, each change to an object in the central database is assigned a unique version number with an inherent ordering to serialize all changes, and the version number is used as a key to determine if messages have been lost or otherwise received at a cache out of order. In a further specific embodiment, full object state information is communicated among caches without need for verification through the central database. Thus if messages are lost or received out of order, the state can be applied to the targeted objects in the local cache assuring full synchronization.
Type:
Grant
Filed:
February 9, 2001
Date of Patent:
September 14, 2004
Assignee:
Persistence Software, Inc.
Inventors:
Rene Zhu, Randy Dale Picolet, Vivek P. Singhal
Abstract: A method and apparatus for providing computer network access points the capability for multiple-level accounting. A gateway device located at the access point is capable of generating Internet protocol accounting start and stop requests based on various events that need to be accounted for when a user accesses a network. These events include the user account logon, the service establishments and the Point to Point protocol (PPP) connections between the gateway device and public and private domains within the network. The counter is capable of tracking the duration of sessions and connections and the byte-count associated with the specified session or connection. The gateway device communicates with an accounting server which stores the accounting requests and matches start requests with subsequent stop requests.
Type:
Grant
Filed:
June 7, 2000
Date of Patent:
September 14, 2004
Assignee:
Cisco Systems, Inc.
Inventors:
Shujin Zhang, Shuxian Lou, Roman Peter Kochan, Aravind Sitaraman
Abstract: An ultrasound imaging system and method for making a harmonic image of a good SNR (signal-to-noise ratio) by effectively removing fundamental frequency components through a pulse-compressing using weighted chirp signals, is provided. The ultrasound imaging system includes: a transducer array for converting weighted chirp signals to ultrasound signals, and transmitting the ultrasound signals to a target object; a receiver for receiving signals reflected from the target object; a pulse-compressor for selectively pulse-compressing fundamental frequency components or harmonic frequency components in the reflected signals; and a producer for producing receive-focused signals from the pulse-compressed signals. Therefore, the ultrasound imaging system can form ultrasound image using the fundamental frequency components, and can form ultrasound harmonic image using the harmonic frequency components according to 2fo-correlation method or 2fo-correlation (PI) method.
Abstract: MOS transistor comprising:
a channel region (120) made of a semiconducting material above which there is a grid structure, the grid structure comprising a grid (110) and insulating spacers (122) coating the sides of the grid,
regions called source and drain extension regions (116a, 118a) located on each side of the channel, in direct contact with the semiconducting material of the channel, and arranged essentially under the grid structure, the extension regions being made of a non-insulating material,
source and drain regions (146, 148) made of metal, in contact with source and drain extension regions respectively and extending partly under the grid structure.
Application to manufacturing of integrated circuits.
Abstract: The present invention concerns an emergency opening control device for an aircraft door comprising:
at least one triggering mechanism (10) for emergency opening,
at least one door actuator (8), and
means of power supply (14, 16) to the actuator driven by the triggering mechanism.
The device also comprises means (20) for modification of the output delivered by the means of power supply to the actuator, to allow the door to be opened more slowly in an initial phase of opening and more rapidly in at least one subsequent opening phase.
Type:
Grant
Filed:
December 3, 2003
Date of Patent:
September 7, 2004
Assignee:
Airbus France
Inventors:
Jérôme Baderspach, Albert Modern, Sébastien Rondot
Abstract: The invention concerns a semi-conductor device comprising on a substrate:
a first dynamic threshold voltage MOS transistor (10), with a gate (116), and a channel (111) of a first conductivity type, and
a current limiter means (20) connected between the gate and the channel of said first transistor.
In accordance with the invention, this first transistor is fitted with a first doped zone (160) of the first conductivity type, connected to the channel, and the current limiter means comprises a second doped zone (124) of a second conductivity type, placed against the first doped zone and electrically connected to the first zone by an ohmic connection.
Application to the manufacture of CMOS circuits.
Abstract: A method for fabricating ion exchange waveguides, such as lithium niobate or lithium tantalate waveguides in optical modulators and other optical waveguide devices, utilizes pressurized annealing to further diffuse and limit exchange of the ions and includes ion exchanging the crystalline substrate with a source of ions and annealing the substrate by pressurizing a gas atmosphere containing the lithium niobate or lithium tantalate substrate above normal atmospheric pressure, heating the substrate to a temperature ranging from about 150 degrees Celsius to about 1000 degrees Celsius, maintaining pressure and temperature to effect greater ion diffusion and limit exchange, and cooling the structure to an ambient temperature at an appropriate ramp down rate. In another aspect of the invention a powder of the same chemical composition as the crystalline substrate is introduced into the anneal process chamber to limit the crystalline substrate from outgassing alkaline earth metal oxide during the anneal period.
Abstract: A hand-held, PCMCIA cellular radio modem card is described which uses a non-standard power output level. The non-standard power output is defined as the maximum RF power attainable such that the current drawn by the power amplifier does not exceed 400 mA. This definition permits the use of the wireless modem inside hand-held computing devices without the use of an additional battery pack extension.
Type:
Grant
Filed:
July 21, 2000
Date of Patent:
August 31, 2004
Assignee:
Sierra Wireless, Inc.
Inventors:
Trent McKeen, Robert M. Lukas, Bruce M. Miller
Abstract: Video data predictive encoding methods using the two kinds of prediction modes, the global and local motion compensation modes, are provided, by which unnecessary MCSEL is reduced as much as possible, and the data compression efficiency is improved. In the encoder, after a code word MCBPC indicating the macroblock type and presence/absence of the DCT coefficient of each of two blocks for sending color-difference signals, a code word MCSEL indicating which motion-compensating mode, global or local, was adopted for the prediction of the current macroblock is output if the macroblock was not intraframe-encoded.
Type:
Grant
Filed:
July 28, 1999
Date of Patent:
August 31, 2004
Assignee:
Nippon Telegraph and Telephone Corporation
Abstract: A method and apparatus for altering code to effectively hide main memory latency using software prefetching with non-faulting loads prefetches data from main memory into local cache memory at some point prior to the time when the data is requested by the CPU during code execution. The CPU then retrieves its requested data from local cache instead of directly seeing the memory latency. The non-faulting loads allow for safety and more flexibility in executing the prefetch operation earlier because they alleviate the concern of incurring a segmentation fault, particularly when dealing with linked data structures. Accordingly, the memory access latency that the CPU sees is essentially the cache memory access latency. Since this latency is much less than the memory latency resulting from a cache miss, the overall system performance is improved.
Abstract: The present invention, generally speaking, uses multiple selectable power supply paths, a saturation detector, or combinations of the same to achieve efficient power supply processing. In one aspect of the invention, a power supply processing circuit includes a first switched converter stage and a second linear stage. Depending on the power supply desired, the first stage may be bypassed to avoid conversion losses. In another aspect of the invention, a saturation detector is used to control the first stage such that the second stage operates efficiently just short of saturation, thereby avoiding distortion.
Type:
Grant
Filed:
August 29, 2001
Date of Patent:
August 24, 2004
Assignee:
Tropian, Inc.
Inventors:
Kenneth R. Cioffi, Nigel J. Tolson, Earl W. McCune