Abstract: This invention controls and modulates switched-mode power amplifiers to enable the production of signals that include amplitude modulation (and possibly, but not necessarily, phase modulation), the average power of which may be controlled over a potentially wide range.

Abstract: A PCMCIA modem card uses a switch to output an analog baseband radio signal across a PCMCIA connector pin normally used to output a conventional digital signal. In this way, the analog signal can be accessed to test the radio receiver of the PCMCIA modem card.

Abstract: An apparatus for the mounting of semiconductor chips comprises a bondhead with a pick-up tool with a longitudinal drill hole to which vacuum can be applied for the gripping and transport of a semiconductor chip. To detect whether the pick-up tool has gripped the semiconductor chip, a body with a reflecting surface is arranged in the longitudinal drill hole of the pick-up tool which, when passing over the light source on absence of the semiconductor chip deflects light shining from underneath into the longitudinal drill hole of the pick-up tool into a horizontal plane. The pick-up tool has locations which are pervious to the deflected light of the light source. At least one optical element is arranged on the bondhead which concentrates at least part of the deflected light emerging laterally from the pick-up tool onto a photosensor.

Abstract: Memory may be partitioned into ever-sliding FIFOs. Each of the FIFOs may be stacked end-to-end in memory with the oldest data at the base offset and the newest at the end (or vice-virsa). Each symbol, the pointer may be incremented (modulo the set size) by an appropriate amount (typically J more than for the previous symbol). After each set, the pointers may be incremented by J more than the previous increment and the process starts over, wrapping around the memory if the end of the memory is reached. After a preset number of symbols, the process may restart from an increment of J. Alternatively, the pointers may be decremented rather than incremented. Thus, the newest symbol cannibalizes the memory position vacated by the oldest symbol in the current FIFO, causing the FIFOs to “slide”, providing for a very efficient and reliable use of memory for error-correcting code interleaving.

Abstract: An image display storage and retrieval system provides a mechanism to transmit x-ray images of parcels to one or more remote workstations. The images may be annotated at these workstations to specifically identify articles to be targeted for more thorough investigation.

Abstract: A method is provided for prioritizing the entries in a database, where each entry is composed of multiple dimensions. Prioritization is required when there are multiple matches in the database. The number of matches can be the same as the number of entries in the database. To prioritize such a huge number of entries in a minimum number of clock cycles, a distributed prioritizer is implemented by partitioning stored binary data into half nibbles comprising of two bits of data each. Each half nibble is encoded into an expanded format allotting priority value to the stored encoded half nibbles. The stored encoded half nibbles are compared across a word array to determine an exact match.

Abstract: This invention relates to a processing procedure for an electronic system subject to transient error constraints, in which two virtual sequences installed on a single physical sequence are multiplexed in time in one given real time cycle (the data resulting from each execution of a virtual sequence being stored so that they can be voted before use), and in which if an error is detected, the real time cycle in progress is inhibited and a healthy context is reloaded to make a restart that consists of a nominal execution of the next cycle starting from the reloaded context. This invention also relates to a memory access monitoring device.

Abstract: The invention relates to a test socket (10) for an electronic component, comprising a embossed support layer (12) comprising several embossments (16) with projecting relief, the embossments being provided with at least one conducting test area (14) near the top of the embossment, that may be brought into electrical contact with a terminal of the component. Application to testing bare or packaged electronic components.

Abstract: Articulation device for an aircraft door panel and an aircraft door integrating such a device. An aircraft door panel is articulated on the jamb by a device (20) that defines an approximately elliptical opening and closing trajectory, in which the major axis is approximately perpendicular to the panel. The device (20) comprises in particular a main arm (30), a secondary arm (32) articulated at the end of the main arm and a control lever (34) connecting the secondary arm (32) to the jamb, by articulation axes (A4, A5) close to the articulation axes of the main arm (30) on the jamb and the secondary arm (32) on the main arm. This arrangement makes it possible to fit a more voluminous emergency exit chute into the door panel.

Abstract: A voltage actuated sensory nerve conduction threshold device uses a stepped square wave voltage for bio-electric stimulation of nerve groups. A step voltage is preset as a percentage of a maximum peak stimulus voltage, which allows current to flow through a patient's skin. As an intensity of the maximum stimulus voltage is varied, the stair step voltage varies as a percentage of the intensity of the stimulus voltage. However, if the stimulus voltage drops to a user set or preset value of stair step voltage, the current flowing through the patient's skin is maintained as the voltage is not allowed to go below that value. This avoids the voltage falling below a cutaneous electrical resistance threshold (CERT) of the patient's skin, at which current conduction ceases.

Abstract: A system for tracking a fleet of vehicles, such as trucks or aircraft, includes a set of vehicle processing systems associated with each vehicle. Each vehicle processing system receives a travel route matrix from a remote server, and generates periodic vehicle position information which is compared with a propagating wave associated with different segments, or corridors, of the matrix. When the vehicle position is determined to lie outside the propagating wave and a geo-corridor at a particular point in time, alerts are sent to the server notifying the server of same. Corrective action can then be taken, such as remotely disabling the vehicle, or alerting a fleet manager.

Abstract: The object of the present invention is to provide a high-speed signal search method, device, and a recording medium for the same that can obtain detection results equivalent to precisely moving a window over the entire region of the input signal even when there is not precise movement of a window over the entire signal.

Abstract: The invention concerns a device (16) for indicating incorrect closure of locking means consisting of a plurality of locking mechanisms (14) located between two fan cowlings (6) of an aircraft engine nacelle, the device including a body able to adopt, relative to the cowlings, a retracted position as well as a protruding position providing a warning of incorrect closure. According to the invention, the body of the device is able to cover at least partially at least two locking mechanisms (14) when it is in its retracted position, the retracted position being exclusively anthorised when each locking mechanism able to be at least partially covered by the body of the device is locked.

Abstract: This invention relates to a method for reconfiguring a network of parallel functional elements tolerant to the faults of these functional elements including said basic functional elements (P), spare functional elements (Sp), interconnecting elements (Cm) of these functional elements and a control unit, said method comprising: a step of positioning the functional elements of the logic network on the physical network; a routing step of programming interconnecting elements on the physical network, by choosing a maximum number of interconnecting elements which can be passed between two neighbouring processors using a shortest track search algorithm.

Abstract: The mounting of semiconductor chips onto a flexible substrate takes place in three steps: Firstly, at a dispensing station, adhesive is applied to predetermined substrate sites on the substrate. Then, at a bonding station, semiconductor chips are placed onto the substrate sites. Finally, curing of the adhesive takes place. In accordance with the invention, the substrate is fixed onto a level support surface by means of vacuum during the hardening of the adhesive.

Abstract: A method for designing an Application Specific Integrated Circuit (ASIC) structure on a semiconductor substrate, includes (a) defining a class of circuit designs, the class having a common design part shared within the class and a custom design part variable for individual designs in the class, (b) allocating a set of bottom layers and a set of top metal layers to implement the common design part, the allocated sets of bottom layers and top metal layers having a fixed pattern for the class, and (c) implementing the custom design part using metal layers above the allocated set of bottom layers and below the allocated set of top metal layers. The method may further includes characterizing the ASIC for the common design and using the fixed patterns of the allocated set of bottom layers and the allocated set of top metal layers.

Abstract: A method and system for minimizing bus traffic in a video decoder is disclosed. A method and system for processing a portion of a reference picture includes designating the reference picture, selecting a display picture within the reference picture, transmitting a display picture size, and sending a display picture offset. A method and system for compressing IDCT coefficients corresponding to a macroblock, the macroblock having a plurality of blocks, includes locating each non-zero IDCT coefficient corresponding to one of the plurality of blocks, assigning an index to the non-zero IDCT coefficient, the index designating a location within the one of the plurality of blocks, packing the non-zero IDCT coefficient in little endian format, and specifying a terminator bit corresponding to the non-zero coefficient, the terminator bit indicating the end of all non-zero IDCT coefficients for the one of the plurality of blocks.

Abstract: An apparatus for the transport and equipping of substrates with semiconductor chips comprises a channel with two side walls in which the substrates are transported in a transport direction. The apparatus has at least one comb which can be raised and lowered in order to move the substrates in transport direction as well as resiliently mounted elements which press against the substrates.

Abstract: The invention relates to a process for making a gate for a CMOS transistor structure, made from a stack realized on a face in a semi-conducting material of a substrate, said stack comprising a gate isolation layer, a gate material layer and a gate mask in sequence, the process comprising the following steps: a) anisotropic etching of the top part of the gate material layer not masked by the gate mask, this etching step leaving the bottom part of the gate material layer and leading to the formation of a deposit composed of etching products on the etching sides resulting from the anisotropic etching, b) treatment of the deposit composed of etching products, to make a protection layer reinforced against subsequent etching of the gate material, c) etching of the bottom part of the gate material layer as far as the gate isolation layer, this etching comprising isotropic etching of the gate material layer to make the gate shorter at the bottom than at the top.