Patents Represented by Attorney Richard A. Bachand
  • Patent number: 6724807
    Abstract: Methods and apparatuses for processing Satellite Positioning System (SPS) signals. In one exemplary method, a first set of frequency coefficients, which corresponds to a first Doppler frequency of an SPS signal, is determined, and said SPS signal is processed in a matched filter with the first set of frequency coefficients during a first window of time. A second set of frequency coefficients, which corresponds to a second Doppler frequency of the SPS signal, is determined, and the SPS signal is processed in the matched filter with the second set of frequency coefficients during a second window of time, where the first and second windows of time occur within a period of time which is not greater than one SPS frame period.
    Type: Grant
    Filed: December 4, 2000
    Date of Patent: April 20, 2004
    Assignee: Snaptrack Inc.
    Inventors: Norman F. Krasner, Paul Conflitti
  • Patent number: 6687501
    Abstract: A system and method for dynamically calibrating a base station in a wireless communication system, is presented herein. In accordance with an embodiment of the invention, the system includes a base station for transmitting, receiving, and processing communication signals and a wireless communication device for communicating with the base station. The wireless communication device is configured to determine its location (e.g., using GPS information), to detect the arrival time of a first signal transmitted from the base station, and to calculate a line-of-sight (LOS) delay corresponding to the LOS distance between the wireless communication device and the base station. The LOS distance calculation is based on the base station location information and the wireless communication device location information.
    Type: Grant
    Filed: July 20, 2001
    Date of Patent: February 3, 2004
    Assignee: Qualcomm Incorporated
    Inventor: Samir S. Soliman
  • Patent number: 6389841
    Abstract: A family of organometallic liquid absorbents that can have their thermophysical properties tailored for specific applications. Processes to manufacture these liquid absorbents and methods to optimize their thermodynamic properties are included. These organometallic liquid absorbents are used in compressor driven and heat driven heat pumps (50) and cryocoolers (99). With optimum thermodynamic properties, these heat pumps systems are highly efficient. These liquid absorbents are not damaging to the environment, are non-toxic and non-corrosive and are applicable to environmentally clean and highly efficient heat pumps, refrigerators, air conditioners, process heating and cooling systems, electronics cooling systems, cryocoolers and gas separation processes.
    Type: Grant
    Filed: August 16, 2000
    Date of Patent: May 21, 2002
    Assignee: HySorb Technology, Inc.
    Inventors: Karl Thomas Feldman, Jr., Craig M. Jensen
  • Patent number: 6347334
    Abstract: A method for implementing a link level service in a computer network having a first port device and a second port device. Node identification data is stored in the second port device. A physical-layer communications coupling is provided between the first port device and the second port device which may be a point-to-point, loop, or switched circuit connection. The first port device sends a request node identification (RNID) message addressed to the second port device. The second port device creates an accept message and copies stored node identification data into the accept message. The second port device sends the accept message to the first port device.
    Type: Grant
    Filed: January 6, 1999
    Date of Patent: February 12, 2002
    Assignee: McData Corporation
    Inventors: Kenneth J. Fredericks, Michael E. O'Donnell, Joseph C. Elliott
  • Patent number: 6285306
    Abstract: A delta sigma digital signal processor (Delta DSP) accepts at its input a delta-sigma modulated pulse stream (46) and average it in simplified finite impulse response (FIR) filter (48). The output of averager (49) is fed in a functional processor (50). A functional processor consists of a number of selectable arithmetic units. These units are programmed in PAL or microprocessor. Selector output (52) is added with signal (54) which is delayed output of (61) multiplied by constant (1−L). Output of functional processor circuit (61) is fed into simplified version of FIR filter of length N to get desired analog output signal. The second part of invention is related to a delta-sigma analog signal processor (Delta ASP) which incorporates delta-sigma modulator (148) and analog double switch (141) for processing of input analog signal (130) and delta-sigma pulse density stream (132). Analog low pass filter (142) is used to get desired output (140).
    Type: Grant
    Filed: November 25, 1997
    Date of Patent: September 4, 2001
    Inventor: Djuro G. Zrilic
  • Patent number: 6240096
    Abstract: The present invention is a fiber channel switch employing a distributed queuing algorithm for interconnecting a plurality of devices (workstations, supercomputer, peripherals) through their associated node ports (N_ports) and employs a fabric having a shared memory coupled to a plurality of fabric ports (F_ports) through a bi-directional bus over which memory addresses, frame data and communications commands are transmitted. Each F_port includes a port controller employing a distributed queuing algorithm associated with a control network for communicating commands between the ports related to when and where frame transfers should be made, wherein the bi-directional bus provides an independent data network for access to the shared memory such that frames can be transferred to and from the shared memory in response to port controller commands.
    Type: Grant
    Filed: January 12, 2000
    Date of Patent: May 29, 2001
    Assignee: McData Corporation
    Inventor: David Book
  • Patent number: 6233236
    Abstract: A switch including a plurality of input/output (I/O) ports and a switching element programmably coupling a first of the I/O ports with a second of the I/O ports. An analysis device is associated with the first I/O port measuring at least one data traffic parameter specific to data traffic between the first I/O port and the second I/O port.
    Type: Grant
    Filed: January 12, 1999
    Date of Patent: May 15, 2001
    Assignee: McDATA Corporation
    Inventors: Jeffrey J. Nelson, Michael E. O'Donnell
  • Patent number: 6192048
    Abstract: A method and apparatus which obviates the throughput limitations retries generated by busy conditions of conventional switches which are limited to but a single path between any two ports through the use of a “hunt group” concept whereby multiple paths can be provided between a participating group member and another port. These multiple paths may be associated in groups of, for example, eight, with each grouping of eight paths then comprising a “hunt group” whereby the first available member of the hunt group will be selected to enable the connection should the first be “busy”. The particular embodiment disclosed comprises a plurality of sequentially organized hunt groups starting on a boundary of eight associated with ports 0-7, 8-15, . . . through 248-255.
    Type: Grant
    Filed: October 2, 1997
    Date of Patent: February 20, 2001
    Assignee: McData Corporation
    Inventors: Jeffrey J. Nelson, James P. Fugere, Ken N. Jessop
  • Patent number: 6182874
    Abstract: An apparatus and system for carrying a weight-bearing object, such as a golf bag, has a hip belt member for supporting the weight bearing object and reducing the load on the user's back and shoulders. An attachment member is coupled to the hip belt member for attaching the hip belt member to the weight-bearing object, and a belt fastener connects the hip belt member about the user's waist. Additional shoulder straps can be utilized to lift the object and stabilize and reduce movement of the weight-bearing object about the user. Hip belt members and shoulder pads can have vent slots for ventilation and improved comfort, while being worn in hot weather. Hip belt members and shoulder pads can have heat storage material added to cool the user, while being worn in hot weather.
    Type: Grant
    Filed: May 25, 1999
    Date of Patent: February 6, 2001
    Inventor: K. Thomas Feldman, Jr.
  • Patent number: 6148004
    Abstract: A method and apparatus for the establishment of dynamic Enterprise System Connection ("ESCON") connections over a Fibre Channel connection allows a port state machine (or port module) to request dynamic ESCON connections from the exchange context of the Fibre Channel frame and to implement dynamic linking of the Fibre Channel exchanges to ESCON ports while also linking and monitoring the status of these connections for all subsequent frames associated on a particular exchange. In a particular embodiment, the method and apparatus provides the ability to establish dynamic connections through an ESCON Director switch based off of the Originator Exchange Identifier ("OX.sub.-- ID") of the FC-2 header and information contained in the FC-4 header of the Fibre Channel frame. Once a connection path has been established for a particular OX.sub.-- ID, that connection is maintained until the exchange is terminated.
    Type: Grant
    Filed: February 11, 1998
    Date of Patent: November 14, 2000
    Assignee: McData Corporation
    Inventors: Jeffrey J. Nelson, Robert Hale Grant
  • Patent number: 6138185
    Abstract: A switch having a plurality of input/output (I/O) ports and a crossbar device programmably coupling a first of the I/O ports with a second of the I/O ports. A plurality of port request controllers (PRCs) are coupled such that each PRC is associated with one of the I/O ports. A plurality of serial request busses are arranged such that each serial request bus couples each PRC with its associated port. A plurality of serial response busses are coupled such that each serial response bus coupling each PRC with its associated PRC. In operation, the serial request and response busses operate independently in a non-blocking fashion to process connection and clear requests in parallel.
    Type: Grant
    Filed: October 29, 1998
    Date of Patent: October 24, 2000
    Assignee: McData Corporation
    Inventors: Jeffrey J. Nelson, Ken N. Jessop
  • Patent number: 6115361
    Abstract: A method for implementing a link level service in a computer network having a first port device and a second port device coupled by a communication link. Prior to a link incident being reported, the first port device executes a link incident record registration (LIRR) ELS message addressed to the second port device. The second port device responds to the LIRR by adding an address of the first port device to a registration list of ports registered to receive link incident reports. The second port device also responds to the LIRR by sending an accept reply message addressed to the first port device. After a link incident is detected by the second port device, the second port device generates a link incident record comprising data describing the link incident. The second port device selects an address from the registration list sends a registered link incident record ELS message addressed to the selected address.
    Type: Grant
    Filed: January 6, 1999
    Date of Patent: September 5, 2000
    Assignee: McData Corporation
    Inventors: Kenneth J. Fredericks, Michael E. O'Donnell, Giles R. Frazier, Roger G. Hathorn
  • Patent number: 5961656
    Abstract: A method for verifying a desired operation of an untrusted memory device is performed under load and includes shadowing read and write operations to the untrusted memory device and to a trusted memory device. The shadowing is performed by concurrently writing data to both the trusted and untrusted memory devices, and concurrently reading data from both the trusted and the untrusted memory devices. All data returned from the trusted and untrusted memory devices in response to the read operations are compared, and if any data compared does not have a same value, a value from the trusted memory device is returned and an error indication is generated.
    Type: Grant
    Filed: October 31, 1995
    Date of Patent: October 5, 1999
    Assignee: Sun Microsystems, Inc.
    Inventors: Billy J. Fuller, Thomas G. Whitten
  • Patent number: 5950889
    Abstract: An apparatus and system for carrying a weight-bearing object, such as a golf bag, has a hip belt member for supporting the weight-bearing object and reducing the load on the user's back and shoulders. An attachment member is coupled to the hip belt member for attaching the hip belt member to the weight-bearing object, and a belt fastener connects the hip belt member about the user's waist. Additional shoulder straps can be utilized to stabilize and reduce movement of the weight-bearing object about the user.
    Type: Grant
    Filed: September 11, 1997
    Date of Patent: September 14, 1999
    Inventor: Karl Thomas Feldman, Jr.
  • Patent number: 5900021
    Abstract: A configurable input device for an integrated circuit having a plurality of input pads, the input device including a plurality of buffers, where each buffer is associated with one of the input pads. Each buffer receives a mode select signal and the buffer is responsive to the mode select signal to place the buffer in an enabled mode or a disabled mode. A receiver portion within each buffer is coupled to the associated input pad. The receiver portion pulls the associated input pad to a preselected logic state while the buffer is in the disabled mode. An output driver within each buffer generates an output signal responsive to a signal on the associated input pad while the buffer is in the enable mode and provides a high impedance while the buffer is in the disabled mode. An output node is coupled to the output drivers of the plurality of buffers.
    Type: Grant
    Filed: April 4, 1997
    Date of Patent: May 4, 1999
    Assignees: United Memories, Inc., Nippon Steel Semiconductor Corporation
    Inventors: John William Tiede, Jon Allan Faue
  • Patent number: 5892712
    Abstract: A bistable non-volatile latch circuit adapted to store a non-volatile binary data state during a program operation, and to assume one of two stable states in response to a power up operation that correspond uniquely to the data state has first and second circuit sections. The first circuit section has a first non-volatile current path with means to set the impedance of the first current path in a non-volatile manner. A first end of the first current path is connected to provide a logic output signal, which represents a binary logic state depending on a voltage applied to the a first signal input node. The set/reset signal to the first current path varies between at least the power source voltage and a program voltage that is negative with respect to the power source voltage. A second circuit section generates an output voltage on a second output node that represents a binary logic state opposite from the output states of the first circuit section.
    Type: Grant
    Filed: April 29, 1997
    Date of Patent: April 6, 1999
    Assignee: NVX Corporation
    Inventors: Ryan T. Hirose, Loren T. Lancaster
  • Patent number: 5883479
    Abstract: A circuit and method to clamp a node of a power device connected to a driving node of a polyphase d-c motor to a reference potential during a powering off of the drive includes a current mirror and a comparator. A first input of the comparator is connected to the reference potential, and a second input is connected to the driving node. The reference potential may be a ground potential, or, preferably, the potential at another driving node of the motor. An output of the comparator is connected to a first side of the current mirror. A circuit is connected to apply a current reflecting the output of the comparator to a low side driver connected to the node.
    Type: Grant
    Filed: July 1, 1997
    Date of Patent: March 16, 1999
    Assignee: STMicroelectronics, Inc.
    Inventors: Paolo Menegoli, Gianluca Colli
  • Patent number: 5870539
    Abstract: A computer implemented method and computer system for testing a target software product is presented. The method includes constructing a finite state machine in which portions of the target product are ascribed to states of the state machine. The state machine may correspond to a predetermined test case for the target software product. A number of state functions are provided, each of the state functions performing at least one verification on the target software product. The state functions also may include transitioning from one state to the next, for example, by a "next window" a "previous window" action if the target software program is a windows based program. The state functions may also verify that a current state in which the state machine exists is a correct state, may verify information that is supposed to have been written to a memory is written in fact to the memory, and may verify that the path to the information is correct.
    Type: Grant
    Filed: July 1, 1996
    Date of Patent: February 9, 1999
    Assignee: Sun Microsystems, Inc.
    Inventor: Daniel H. Schaffer
  • Patent number: 5837613
    Abstract: A method for planarizing integrated circuit topographies, wherein, after a first layer of spin-on glass is deposited, a layer of low-temperature oxide is deposited before a second layer of spin-on glass.
    Type: Grant
    Filed: November 24, 1997
    Date of Patent: November 17, 1998
    Assignee: STMicroelectronics, Inc.
    Inventors: Alex Kalnitsky, Yih-Shung Lin
  • Patent number: D404019
    Type: Grant
    Filed: May 15, 1997
    Date of Patent: January 12, 1999
    Assignee: Microtome Precision, Inc.
    Inventors: Robert K. Lindsley, Joseph A. Durben, Charles D. Travis