Patents Represented by Attorney Richard A. Jordan
  • Patent number: 5778384
    Abstract: A virtual file system accessing subsystem is disclosed for use in connection with a computer system connected in a computer network. The computer system runs a selected operating system, such as Microsoft's MS-DOS and Windows operating systems. The virtual file system accessing subsystem facilitates the accessing of a virtual logical storage device that is identified by a virtual logical storage device identifier and that has a virtual logical storage device file system that includes at least a portion of a remote file system maintained by another device connected in the computer network. The virtual file system accessing subsystem comprises an operating system request redirector for enabling the operating system to direct access requests from an application program which identify the virtual logical storage device to a remote access element for processing.
    Type: Grant
    Filed: December 22, 1995
    Date of Patent: July 7, 1998
    Assignee: Sun Microsystems, Inc.
    Inventors: Joseph E. Provino, Philip M. Rosenzweig
  • Patent number: 5765206
    Abstract: A processor processes a segmented to linear virtual address conversion instruction to convert segmented virtual addresses in a segmented virtual address space to a linear virtual address in a linear virtual address space. The segmented virtual address space comprises a plurality of segments each identified by a segment identifier, each segment comprising at least one page identified by a page identifier. The linear virtual address space includes a plurality of pages each identified by a page identifier. In processing the segmented to linear virtual address conversion instruction, the processor uses a plurality of segmented to linear virtual address conversion descriptors, each associated with a page in the segmented virtual address space, each segmented to linear virtual address conversion descriptor identifying the page identifier of one of the pages in the linear virtual address space.
    Type: Grant
    Filed: February 28, 1996
    Date of Patent: June 9, 1998
    Assignee: Sun Microsystems, Inc.
    Inventors: Paul H. Hohensee, David Dice, Robert G. Vandette, David L. Reese
  • Patent number: 5745636
    Abstract: An image processing system comprising and image recording system and an image rendering system. The image recording system records images of a scene, and comprises a recording device for recording images of the scene on a series of frames, each frame including image information reflecting the scene as illuminated at the time the frame was recorded, a plurality of individually-energizable light sources each for illuminating the scene; and a synchronizer connected to the recording device and the light sources for synchronizing the separate energization of the light sources and the recording by the recording device of the separate frames in the series. The image rendering system generates a rendered image which reflects a desired light source position.
    Type: Grant
    Filed: August 19, 1996
    Date of Patent: April 28, 1998
    Assignee: GenTech Corp.
    Inventors: Amnon Shashua, Tomaso Poggio
  • Patent number: 5737535
    Abstract: A computer system for connection in a network, which has a number of other devices each of which may receive communications from the computer system. The computer system includes a network interface and a message transmission control circuit. The network interface establishes a communications session with a selected one of the other devices as a destination for transmitting messages to the selected device. The message transmission control circuit enables the network interface to establish a communications session and transmit messages thereover with the selected device. The message transmission control circuit initially enables the network interface to transmit a number of messages corresponding to a log-in credit value selected for the selected device. Thereafter, the message transmission control circuit enables the network interface to transmit message based on flow control information received from the selected device.
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: April 7, 1998
    Assignee: EMC Corporation
    Inventors: Norman J. Bagley, Brian E. Gallagher
  • Patent number: 5732282
    Abstract: A virtual device driver registry for use in connection with a computer system for providing virtual device driver call information to a program operating in said computer system in response to a call information request. The virtual device driver registry maintains a registration database including a plurality of entries, each entry including a virtual device driver identifier and virtual device driver call information. The registry establishes the entries in the registration database in response to receipt of virtual device driver registration requests from the virtual device drivers as they are initialized. The registry responds to call information requests from the programs to provide call information for the registered virtual device drivers.
    Type: Grant
    Filed: June 30, 1995
    Date of Patent: March 24, 1998
    Assignee: Sun Microsystems, Inc.
    Inventors: Joseph E. Provino, Mark M. Towfigh, Jonathan M. Dreyer
  • Patent number: 5732247
    Abstract: An interface subsystem for use in a system including one or more simulation systems facilitates simulation of one or more simulation models under control of one or more tests. The interface subsystem allows the tests and simulation systems to transfer information therebetween and enables said tests to control the simulation systems in simulating the simulation model during a simulation run. The simulation systems include transactors which provide information to the simulation model at the beginning of a simulation run, pause a simulation run in response to detection of a selected event, and generate simulation result information. The interface subsystem includes, associated with each test, a simulation information generator, a simulation control indicator generator, and a information receiver; associated with each simulation system an information receiver associated with each transactor and a simulator interface module; and an interface core.
    Type: Grant
    Filed: March 22, 1996
    Date of Patent: March 24, 1998
    Assignee: Sun Microsystems, Inc
    Inventors: Glenn A. Dearth, Paul M. Whittemore, David A. Medeiros, George R. Plouffe, Jr., Bennet H. Ih
  • Patent number: 5727158
    Abstract: An information processing system includes a plurality of data processing tools, an atomic information repository, and a plurality of generated translation engines. Each data processing tool processes data in accordance with an associated data model, and in the process generates access requests for accessing data in accordance with its associated data model. The atomic information repository stores data items using an organization in an atomic data model which corresponds to the combination of the data models associated with all of the tools. Each translation engine is associated with one of the tools. Each translation engine receives an access request from its associated tool in the associated tool's data model and performs a translation operation to translate the request to the repository's atomic data model, and initiates an access operation with the repository in connection with the translated access request.
    Type: Grant
    Filed: September 22, 1995
    Date of Patent: March 10, 1998
    Assignee: Integra Soft, Inc.
    Inventors: M'hamed Bouziane, Robert C. Webber, III, Vincent A. Mastro, Charles P. Rehberg, Barbara A. Nichols, Roxanne N. Myers
  • Patent number: 5712997
    Abstract: A microprocessor in a computer system processes an instruction stream comprising instructions of a plurality of instruction types including an information retrieval instruction type. The microprocessor comprises a register set, a pending fault flag set, a functional unit, an information retrieval subsystem, and a control subsystem. The register set comprises a plurality of registers, each register for storing information. The pending fault flag set comprises a plurality of pending fault flags each associated with one of said registers, each pending fault flag having selected conditions including a pending fault condition and a no pending fault condition. The functional unit performs processing operations in response to information input thereto. The information retrieval subsystem initiates an information retrieval operation to retrieve of information from said information storage subsystem for storage in a register.
    Type: Grant
    Filed: January 31, 1996
    Date of Patent: January 27, 1998
    Assignee: Sun Microsystems, Inc
    Inventor: David Dice
  • Patent number: 5694541
    Abstract: A console terminal arrangement is disclosed for use in connection with a fault-tolerant computer system including a plurality of processing modules, at least some of the processing modules including an operator input/output interface for receiving operator input from an operator input device and operator display output on an operator display device. The console terminal arrangement facilitates management of all of the processing modules by a single operator from a single location. The arrangement includes a console terminal and a plurality of processing module interfaces interconnected by a network. The console terminal includes an operator input device and an operator display device, and generates operator input messages including processing module management information generated by the operator input device in response to inputs provided by an operator and an address identifying one of the processing modules to be managed by the console terminal.
    Type: Grant
    Filed: October 20, 1995
    Date of Patent: December 2, 1997
    Assignee: Stratus Computer, Inc.
    Inventors: John D. Service, Walter A. Jones, Jr., Richard Urmston, Arthur J. Beaverson, Charles J. Horvath, Matthew A. Trask, John T. Vachon, Jeffrey D. Carter
  • Patent number: 5681906
    Abstract: The present invention provides for amino-crosslinkable coating formulations based on a mixture of a di- or polyhydroxy functional polymeric component selected from the group consisting of diesters, polyesters, alkyd polymers, acrylic polymers and polycarbonate polymers, a crosslinking agent such as a methylol (alkoxymethyl) amino crosslinking agent, and a reactive additive which is the ester reaction product of a phenol carboxylic acid, preferably para-hydroxybenzoic acid, and an epoxy compound selected from glycidyl ethers, glycidyl esters, linear epoxies and aromatic epoxies. The crosslinkable compositions of this invention may be used to prepare curable coating and paint formulations, and also may contain other ingredients such as a crosslinking catalyst, fillers, pigments and the like. When cured, the coatings of this invention exhibit improved physical and chemical properties when compared with cured coatings which do not contain the ester reaction product additive.
    Type: Grant
    Filed: April 19, 1995
    Date of Patent: October 28, 1997
    Assignee: Exxon Chemical Patents Inc.
    Inventors: Albert Ilya Yezrielev, Vijay Swarup, Konstantinos R. Rigopoulos
  • Patent number: 5666368
    Abstract: A new register test system and method is provided for testing a register. The register under test has a number of bit storage locations, each of which is associated with one of a plurality of categories, including, for example, a read/write category, a read-only category, a write-only category, an always-"1" category and an always-"0" category. In accordance with the method, in each of a plurality of iterations, a data word is generated, stored it in the register under test, and thereafter retrieved from the register. For each iteration, an expected pattern is generated for comparison to the retrieved contents, using the original data, the retrieved contents and a plurality of mask patterns each associated with one of the categories. The expected pattern is compared to the pattern of the contents retrieved from the register and whether the register is deemed to be operating properly can be determined by whether the expected pattern corresponds to the retrieved pattern.
    Type: Grant
    Filed: January 30, 1996
    Date of Patent: September 9, 1997
    Assignee: Sun Microsystems, Inc.
    Inventor: Richard A. Proulx
  • Patent number: 5665951
    Abstract: A system for assisting a customer during shopping includes machine-readable currently-owned item indicia store and a compatibility determination subsystem. The machine-readable currently-owned item indicia store includes a smart-card, magnetic disk or the like, for storing indicia identifying selected characteristics of items which are currently owned by the customer, including such information as, for example, accurate color andr styling parameter and metric information. The compatibility determination subsystem generates a compatibility assessment in response to the currently-owned item indicia stored by the currently-owned item indicia store, indicia identifying selected characteristics for items provisionally selected by the customer, and compatibility parameter information identifying compatibilities among various types of indicia.
    Type: Grant
    Filed: February 8, 1996
    Date of Patent: September 9, 1997
    Inventors: Gary H. Newman, Sumin Tchen
  • Patent number: 5655083
    Abstract: A network includes a plurality of computer systems interconnected by a plurality of communication links. At least one of the computer systems includes a resettable computer and a reset circuit. The reset circuit is actuable in response to the receipt of a message containing a received reset code value for generating an interrupt signal and to begin a timing interval, and at the end of said timing interval to generate a reset signal. If the computer is in its normal operational condition, it is responsive to the interrupt signal from the reset circuit to deactuate the reset circuit prior to the end of the time interval to prevent the reset circuit from generating the reset signal. On the other hand, if the computer is in the hung condition, it does not respond to the interrupt signal, and so the reset circuit at the end of the time interval will generate the reset signal to enable the computer to initiate a reset operation.
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: August 5, 1997
    Assignee: EMC Corporation
    Inventor: Norman J. Bagley
  • Patent number: 5598515
    Abstract: An arrangement for generating reconstructon information to facilitate reconstruction of three-dimensional features of objects in a scene based on two-dimensional images of the scene taken from a plurality of locations. The arrangement includes a plurality of elements including an epipole generating means, a homography generating means and a depth value generating means. The epipole generating means identifies the location of epipoles, that is, the coordinates in each image plane, in which the images were recorded, of the point of intersection of the line interconnecting the centers of projection of the image recorders that record the images. The homography generating means uses the epipoles and the coordinates in the respective images of selected reference points to generate a homography that relates the coordinates of all points in the images.
    Type: Grant
    Filed: January 10, 1994
    Date of Patent: January 28, 1997
    Assignee: Gen Tech Corp.
    Inventor: Amnon Shashua
  • Patent number: 5583464
    Abstract: A resistor circuit includes a resistance control circuit and at least one insulated gate field effect transistor. The resistance control circuit includes a control signal output element including a reference transistor for generating a resistance control signal in response to an internal control signal to maintain the reference transistor at a selected resistance value and a resistance value control element including a reference resistor for generating a circuit control signal for controlling the resistance value of the reference transistor in relation to the resistance value provided by the reference resistor. The field effect transistor is controlled by the resistance control signal to provide a resistance value which is a function of the resistance value of the reference transistor (and therefore of the reference resistor) and ratios of selected physical characteristics of the reference transistor.
    Type: Grant
    Filed: May 13, 1994
    Date of Patent: December 10, 1996
    Assignee: Thinking Machines Corporation
    Inventors: Thomas F. Knight, Jr., William K. Stewart, Edward C. Parish, Jon P. Wade
  • Patent number: 5561768
    Abstract: A partition establishment arrangement for use in a computer system comprising a plurality of processors interconnected by a communications network. The communications network comprises a plurality of communications nodes connected in a series of levels, with the nodes of at least some of the levels being controllable to connect to multiple ones of the nodes in a subsequent level. The partition establishment arrangement determines the controlling of the communication nodes to facilitate the partitioning of the processors into a plurality of partitions. The partition establishment arrangement, in a plurality of iterations, identifies conflict sets of processors to be assigned to respective partitions at a level, each conflict set identifying partitions for which, at a selected level, a processor may be connected to the same communications nodes in the next level.
    Type: Grant
    Filed: March 17, 1992
    Date of Patent: October 1, 1996
    Assignee: Thinking Machines Corporation
    Inventor: Stephen J. Smith
  • Patent number: 5561801
    Abstract: A compiler for compiling a computer program wherein the computer program is adapted for use with a data parallel computer. The compiler comprises a front end which generates a parse tree from a source code. In generating the parse tree, the front end coordinates the compilation of type conversion operations and promotion operations such that run-time efficiency is maximized. In other words, the front end compiles the type conversion operations and promotion operations in an order which maximizes run-time efficiency.
    Type: Grant
    Filed: December 23, 1993
    Date of Patent: October 1, 1996
    Assignee: Thinking Machines Corporation
    Inventors: Joshua E. Simons, James L. Frankel
  • Patent number: 5559459
    Abstract: A clock signal generation arrangement for generating clocking signals for use in a fault-tolerant computer system generates a timing signal in response to a common clock signal. The clock signal generation arrangement comprises a system clock signal generator and a clock signal recovery circuit interconnected by a plurality of clock signal transfer lines. The system clock signal generator generates, in response to a common clock signal, a plurality of system clock signals preferably of uniform frequency and phase for transmission over a like plurality of clock signal transfer lines. The clock signal recovery circuit receives the system clock signals from the clock signal transfer lines and generates a unitary timing signal. The clock signal recovery circuit includes a voting circuit, a latch circuit and a latch control circuit. The voting circuit generates a voted clock signal having signal transitions that are generally aligned with transitions of a majority of the system clock signals.
    Type: Grant
    Filed: December 29, 1994
    Date of Patent: September 24, 1996
    Assignee: Stratus Computer, Inc.
    Inventors: Paul R. Back, Paul R. Carlin, Joseph M. Lamb
  • Patent number: 5550641
    Abstract: An image processing system comprising and image recording system and an image rendering system. The image recording system records images of a scene, and comprises a recording device for recording images of the scene on a series of frames, each frame including image information reflecting the scene as illuminated at the time the frame was recorded, a plurality of individually-energizable light sources each for illuminating the scene; and a synchronizer connected to the recording device and the light sources for synchronizing the separate energization of the light sources and the recording by the recording device of the separate frames in the series. The image rendering system generates a rendered image which reflects a desired light source position.
    Type: Grant
    Filed: August 22, 1994
    Date of Patent: August 27, 1996
    Assignee: GenTech Corporation
    Inventors: Amnon Shashua, Tomaso Poggio
  • Patent number: D377797
    Type: Grant
    Filed: September 27, 1995
    Date of Patent: February 4, 1997
    Assignee: Video Guide, Inc.
    Inventors: Scott E. Stropkay, Mark A. Nichols