Abstract: A process for forming a vertical n-channel DMOS transistor uses a common deposition step to form a phosphorus-rich predeposit simultaneously over the polysilicon gate electrode, over a central surface portion of a p-well region and over the back surface drain region of the chip. This predeposit is followed by a common drive-in step to form an n-type source region within the p-well region, and to make the polysilicon gate electrode and the back surface more conductive. In addition, the process uses the source region contact mask as a shadow mask for anistropically etching a via hole in the source region so that the source metallization can also contact the p-well region and serve also as a shorting contact to the p-well.

Abstract: A pressure sensor includes a three part package including a housing member defining two spaced-apart chambers, a bottom member providing the bottom wall of one of the chambers, and a top cover member hermetically sealing the two chambers from one another and including a port for admission of gases into one of the chambers. A pressure sensing element is disposed in the chamber having the port and mounted on the bottom member, and a signal processing element is mounted in the other chamber. Electrical connections between the two elements are by means of leads which extend into each chamber and pass through a wall separating the chambers. A low temperature differential between the two elements is provided by extending one of the leads from the other one chamber to a position directly underlying and in intimate contact with the bottom surface of the processing element in the other chamber.

Abstract: A moisture sensor consistsof an array of spaced apart, highly abrasion-resistant electrodes disposed on the outside surface of the windshield of a vehicle. When moisture moisture is present, the spaces between the electrodes are bridged by the water and the output impedance of the sensor significantly decreases. This signals the presence of moisture. The electrodes have particles of a conductive metal oxide, e.g., ruthenium oxide, dispersed within a glass matrix which is fused to the windshield glass. The electrodes are formulated as an ink including particles of the metal oxide, a glass frit, and an organic binder. The ink is silk screened onto the windshield in the desired electrode pattern. After drying of the ink, the glass frit is fused to the windshield during normal heating of the windshield to shape it in a known windshield shaping (sagging) process. Novel two layer sensor arrangements, providing even greater resistance to abrasion, are also described.

Abstract: In the fabrication of various hybrid devices, it is the practice to provide thick film conductors of two different compositions, namely, a high palladium content silver-palladium film and an essentially pure silver film. The silver-palladium films are used because of their excellent physical and chemical properties, but are relatively expensive. The silver-based films do not have comparably good properties (with the exception of low electrical resistivity), but are less expensive than the silver-palladium films and are used in substitution therefore on less "demanding" areas of the device. However, the two films interact when in contact, and discontinuities or open circuits can occur as a result. The present invention provides a novel silver-based conductor film including a small percentage of palladium and one or both of aluminum oxide and silicon dioxide.

Abstract: In one embodiment a hot electron transistor uses lead telluride as the host crystal. The desired layers of increased band gap to provide the needed heterojunctions at the emitting and collecting junctions are realized either by substitution of europium and selenium in the host crystal or by superlattices of PbTe-CdTe. Variations described use either a tunneling barrier, graded barrier or camel diode barrier are used at the emitting junction. Other embodiments use a bismuth-antimony semiconductor alloy for one or more of the layers of the crystal.

Abstract: A magnetic sensor is formed by a diode that includes a silicon element whose bulk is of high resistivity and low recombination velocity material and which includes spaced apart on its top surface n-type and p-type zones to which are provided electrical terminals. The element is treated to form at the top surface regions of high recombination velocity so located that when a voltage is applied between the electrical terminals to establish a flow of minority charge carriers between the p-type and n-type zones, such flow, in the absence of an applied magnetic field to be sensed, is little affected by the surface regions of high recombination velocity, but in the presence of any such field, is deflected into such surface regions and extinguished. Advantageously, the surface regions are formed by etching to form grooves and then ion implanting the grooved regions.

Abstract: Camshaft assemblies, methods and apparatus are provided for making camshafts by the expansion of tubular shafts into prelocated cams, journals and other elements, if desired. Features of the camshafts include trilobe or polylobe element openings, preferably splined or serrated for low energy filling and high torque capacity and high strength low alloy mild steel tubular shaft material. The method emphasizes trapping, or loading, the shaft to prevent axial lengthening during expansion such as by mechanical ballizing. The apparatus includes adjustable thrust blocks and locating plungers with incorporated flush pin gages together with hydraulic or other loading means all for use in carrying out the assembly method with various benefits from the incorporated features.

Abstract: A composite device includes a junction transistor and an MOS transistor in which the channel region of the MOS transistor corresponds to a portion of the base region of the junction transistor. Such a device has a variety of applications in NAND and NOR circuits and as an analog transmission gate useful in a multiplexer.

Abstract: JMOS depletion mode transistors include back-to-back junctions in the doped polysilicon layer that serves as the gate. The polysilicon layer includes a first region of the same conductivity type as the channel in contact with the channel, and a second region, of the same conductivity type as the channel and to which the gate potential is applied, spaced apart by a region of the opposite conductivity type that serves as a sink for minority carriers in the channel. Both buried oxide layer and recessed gate JMOS transistors are included.

Abstract: A process for forming a buried patterned silicon oxide layer in a silicon chip in which the layer is formed by implanting oxygen into the chip through a mask of silicon oxide on the surface of the silicon chip. The silicon oxide mask is formed to have essentially vertical side walls by interposing an irradiation step between a pair of isotropic wet etching steps in its formation.

Abstract: A moisture sensor consists of an array of spaced apart, highly abrasion-resistant electrodes disposed on the outside surface of the windshield of a vehicle. When moisture is present, the spaces between the electrodes are bridged by the water and the output impedance of the sensor significantly decreases. This signals the presence of moisture. The electrodes have particles of a conductive metal oxide, e.g., ruthenium oxide, dispersed within a glass matrix which is fused to the windshield glass. The electrodes are formulated as an ink including particles of the metal oxide, a glass frit, and an organic binder. The ink is silk screened onto the windshield in the desired electrode pattern. After drying of the ink, the glass frit is fused to the windshield during normal heating of the windshield to shape it in a known windshield shaping (sagging) process. Novel two layer sensor arrangements, providing even greater resistance to abrasion, are also described.

Abstract: A vertical depletion mode power field effect transistor having a greatly increased drain-to-source breakdown voltage. The drain region is formed in the substrate and separated from the channel by a first insulative layer having apertures which allow the passage of electrical currents. The channel, which is formed between the first insulative layer and a second insulative layer parallel to the substrate surface, contains both a source region, formed by implantation of impurities of the same type as are used to form the drain region, and a gate region. In this configuration, the normally high voltage which exists between the gate and drain is imposed over a greater distance than in conventional depletion mode vertical FETs, so that this new configuration produces vertical power FETs having much higher breakdown voltages than do conventional depletion mode vertical FETs.

Abstract: A printing screen for screen printing fabrication substances such as solder paste has an aperture formed therein so that the screen may be placed on a substrate surface with a pre-mounted device extending through the aperture. A metal cap is bonded to the screen over the pre-mounted device to protect the device against damage during a subsequent screen printing operation. Different elements may, therefore, be bonded to a substrate in completely independent steps without the need for fluxing operations in later bonding operations.

Abstract: An air flow sensor which employs a thermocouple using a film of bismuth.sub.0.92 antimony.sub.0.08 to form junctions with gold, platinum or nickel strips and a resistive strip heater of the same metal.

Abstract: A method and apparatus for printing through holes in ceramic substrates and the like. The substrate is held in position by means of a vacuum applied to an outer peripheral surface portion thereof. The deposited substance is pulled through the holes in the substrate by means of a closely regulated vaccuum applied only to an inner surface portion, the inner and outer vacuum areas being separated in a holder device by means of O-rings. A pressure-time profile which appears in a plenum closely adjacent to the inner chamber may be compared to a previously generated pressure-time profile reference and used to accept or reject parts.

Abstract: High resolution patterns can be etched in tin oxide films in one step using reactive ion etching when the reactant gas consists substantially of nitrogen and/or argon and from small but effective amounts of hydrogen up to about 10 percent by volume hydrogen.

Abstract: An insulated gate field effect transistor of the depletion mode type has a recessed gate structure with opposed gate sections on opposite sides of adjacent bar-like structures defined in a channel region. An opposite conductivity-type island in the channel region is electrically connected to the transistor gate electrode. A voltage applied to the gate electrode generates an electric field effect which extends from the opposed gate sections into said bar-like structures creating opposed depletion regions which modulate channel current. The gate voltage simultaneously biases the island to enhance the gate electric field effect by removing minority charge carriers which would otherwise accumulate in the bar-like structures.

Abstract: A process for forming CMOS devices uses outdiffusion of implanted ions in a patterned refractory silicidable layer to form the source/drain regions of the device. Moreover, the oxidation of the sidewalls of openings formed in the layer serves to isolate the layer from the polysilicon gate electrode which is later formed in the openings in this layer.

Abstract: A process for growing silicon on insulator in which complete isolation of the grown silicon of the substrate silicon by an intermediate oxide layer is obtained. A first epitaxial lateral overgrowth technique is used to grow a continuous layer of silicon through seed holes in a patterned oxide layer overlying the silicon substrate. Then the silicon layer is etched to expose the seed holes which are then oxidized to make the oxide layer aperture-free. This is followed by a second epitaxial lateral overgrowth step to replace the silicon etched in the silicon layer to make the layer substantially planar.

Abstract: A method of fabricating a self-aligned hole-within-a-hole structure which resolves the smaller hole at small dimensions by using a single photolithography step to define the two holes, the step being performed on a planar surface. The method comprises fabricating a block on a substrate having the dimension of the smaller hole, fabricating a sidewall spacer on the block such that the spacer and the block have the dimension of the larger hole, growing a first layer surrounding the sidewall spacer, removing the sidewall spacer, growing a second layer surrounding the block which is thinner than the first layer, and removing the block.