Patents Represented by Attorney, Agent or Law Firm Robert R. Jackson
  • Patent number: 6337578
    Abstract: Redundant circuitry is provided for a programmable logic device that uses an interleaved input multiplexer circuit arrangement. The programmable logic device has at least one row of logic regions and has multiple columns, each of which contains one of the interleaved input multiplexers and one of the logic regions. A set of conductors associated with the row of logic regions is used to convey signals between the logic regions. Each interleaved logic region distributes logic signals from the conductors in the row to two adjacent logic regions. Bypass circuitry is provided in each column for bypassing the interleaved input multiplexer and logic region in that column. If a defect is detected in a column during testing of the device, the manufacturer can repair the device using the bypass circuitry to bypass that column. Spare logic is provided to replace the circuitry lost when a defective column is bypassed.
    Type: Grant
    Filed: February 28, 2001
    Date of Patent: January 8, 2002
    Assignee: Altera Corporation
    Inventors: David E. Jefferson, Srinivas T. Reddy
  • Patent number: 6325318
    Abstract: In a dynamo-electric machine, a stator having a terminal board with at least one pair of slots located along its inside circumference, includes at least one pair of coil holders. Each coil holder is cantilevered from the terminal board at the ends of a pair of slots, and a wire guide is positioned on each coil holder. A wire depositing needle and the stator are placed in relative motion, which causes the guide to support the wire as it is transported along its surface. Coils of wire are created as each pair of slots is wound. The invention will typically be used to form multiple coil windings on a single stator.
    Type: Grant
    Filed: January 7, 2000
    Date of Patent: December 4, 2001
    Assignee: Axis USA, Inc.
    Inventors: Gianfranco Stratico, Pasquale Ciarlitto
  • Patent number: 6325199
    Abstract: A pallet conveyor apparatus for moving pallets, which carry components of a dynamo-electric machine, along and between routes of a manufacturing line is provided. The pallet conveyor apparatus includes a plurality of pallets, at least one substantially horizontal rail structure, at least one loop-shaped conveyor belt, and a drive for causing the conveyor belt to move along an upper track of the rail structure. The conveyor apparatus may be driven with a drive cartridge that fits within the rail structure. A pallet for use with the apparatus has a platform and a seat portion. The platform has an upper surface that supports the component. The seat portion has a substantially inverted “U” shape. The seat portion of the rail structure has a central surface and two opposing surfaces. The dimensions of the seat portion and the rail structure are such that when the seat portion fits over the rail structure a pallet will be prevented from falling off the rail structure.
    Type: Grant
    Filed: September 29, 1999
    Date of Patent: December 4, 2001
    Assignee: Axis USA, Inc.
    Inventors: Raffaele Becherucci, Gianfranco Stratico, Vieri Ancillotti
  • Patent number: 6323677
    Abstract: In order to facilitate the performance of multiplications in programmable logic devices, individual logic modules of such devices are constructed so that one logic module can perform (at least) both one place of binary multiplication and one place of full binary addition. This makes it possible to reduce the number of logic modules that are required to perform a multiplication. It also reduces the number of inter-module connections employed in a multiplication, thereby tending to decrease the time required to perform a multiplication.
    Type: Grant
    Filed: April 4, 2000
    Date of Patent: November 27, 2001
    Assignee: Altera Corporation
    Inventors: Christopher F. Lane, Srinivas T. Reddy, Richard G. Cliff, Ketan H. Zaveri, Bruce B. Pedersen, Kerry Veenstra
  • Patent number: 6320411
    Abstract: A programmable logic device has plural regions of programmable logic and a general-purpose interconnection network for conveying signals to, from, and between the regions. In addition to the general-purpose interconnection network, more direct interconnections are provided from outputs of each region to inputs of one or more other adjacent or nearby regions. At least some of these direct interconnections are preferably multiplexed with more conventional inputs to the other regions so that the input resources required for each region do not become excessive. The invention is particularly useful for devices which perform basic logic using sum-of-products (“Pterm”) logic. However, the invention is also useful in other types of devices such as those which perform basic logic using look-up tables.
    Type: Grant
    Filed: November 19, 1999
    Date of Patent: November 20, 2001
    Assignee: Altera Corporation
    Inventor: David W. Mendel
  • Patent number: 6308744
    Abstract: An apparatus for forming varied length wire coils for insertion stator core slots includes a template positioned that is configured to vary a length of consecutive wire turns while wire is received from a flyer winder. The wire turns may then be inserted into a pair of stator core slots depending upon their respective lengths. A method of using the apparatus to form a winding with varied length turns includes depositing wire turns on a template, varying a length of at least two consecutive wire turns as the wire is deposited on the template, removing the wire turns from the template, and inserting the removed wire turns into a stator core slot.
    Type: Grant
    Filed: June 8, 2000
    Date of Patent: October 30, 2001
    Assignee: Axis USA, Inc.
    Inventors: Raffaele Becherucci, Gianfranco Stratico
  • Patent number: 6309416
    Abstract: A connector for use in providing an anastomotic connection between two tubular body fluid conduits in a patient. The connector is preferably a single, integral, plastically deformable structure that can be cut from a tube. The connector has axial spaced portions that include members that are radially outwardly deflectable from other portions of the connector. The connector is annularly enlargeable so that it can be initially delivered and installed in the patient in a relatively small annular size and then annularly enlarged to provide the completed anastomosis. The radially outwardly deflected members of the first and second portions respectively engage the two body fluid conduits connected at the anastomosis and hold those two conduits together in fluid-tight engagement. Apparatus for use in delivering and deploying a connector is also disclosed.
    Type: Grant
    Filed: March 17, 2000
    Date of Patent: October 30, 2001
    Assignee: St. Jude Medical Cardiovascular Group, Inc.
    Inventors: William J. Swanson, Mark D. Wahlberg, Jason A. Galdonik, Todd Allen Berg
  • Patent number: 6302905
    Abstract: Methods and apparatus for making an anastomotic connection between tubular fluid conduits in a patient. A connector may provided having an annular structure configured for placement partially within one of the tubular fluid conduits and for annular enlargement by expansion of an expandable structure positioned within an interior portion of the connector. The connector may be configured for plastic annular enlargement, and have members with free end portions that are configured to penetrate a wall of the tubular fluid conduits at locations that are annularly spaced around the connection. A portion of the connector may be selectively deflected radially out from a remainder of the connector in response to expansion of the expandable structure disposed inside the connector.
    Type: Grant
    Filed: May 28, 1999
    Date of Patent: October 16, 2001
    Assignee: St. Jude Medical Cardiovascular Group Inc.
    Inventors: David S. Goldsteen, Thomas J. Bachinski, Rudy Mazzocchi, Daniel J. Sullivan
  • Patent number: 6300794
    Abstract: A programmable logic device has a plurality of super-regions of programmable logic disposed on the device in a two-dimensional array of intersecting rows and columns of super-regions. Horizontal and vertical inter-super-region interconnection conductors are associated with each row and column, respectively. Each super-region includes a plurality of regions of programmable logic, and each region includes a plurality of subregions of programmable logic. Inter-region interconnection conductors are associated with each super-region, principally for bringing signals into the super-region and interconnecting the regions in the super-region. Local conductors are associated with each region, principally for bringing signals into the region. At the super-region level the device may be horizontally and vertically isomorphic, which helps make it possible to produce devices with low aspect ratios of one or nearly one. Shared driver circuits may be provided (e.g.
    Type: Grant
    Filed: January 20, 2000
    Date of Patent: October 9, 2001
    Assignee: Altera Corporation
    Inventors: Srinivas T. Reddy, Richard G. Cliff, Christopher F. Lane, Ketan H. Zaveri, Manuel M. Mejia, David Jefferson, Bruce B. Pedersen, Andy L. Lee
  • Patent number: 6300792
    Abstract: Programmable input/output cell circuitry for use in an integrated circuit and having various programmably selectable modes of operation which may include (1) a first output mode in which one output signal is applied to a pin during each cycle of a clock signal, (2) a second output mode in which two different output signals are time-division multiplexed to the pin during respective halves of the clock signal cycle, (3) a first input mode in which one input signal value is received from the pin during each cycle of the clock signal, and (4) a second input mode in which two time-division multiplexed input signals are received from the pin during respective halves of the clock signal cycle and demultiplexed by the input/output cell circuitry.
    Type: Grant
    Filed: March 2, 2000
    Date of Patent: October 9, 2001
    Assignee: Altera Corporation
    Inventor: Bruce Pedersen
  • Patent number: 6298025
    Abstract: Methods and apparatus for recording on DVD-like recording media in which audio content is stored in a high-capacity multi-channel (e.g., six-channel) format are provided. Various channels may use various resolutions. A two-channel audio output may be derived from the multi-channel audio data stream during playback. To facilitate an accurate derivation, the mixing coefficients to be used in generating the derivation can be supplied along with the six-channel audio data.
    Type: Grant
    Filed: April 24, 1998
    Date of Patent: October 2, 2001
    Assignee: Warner Music Group Inc.
    Inventors: Alan McPherson, Gregory Thagard, Edwin Outwater, III, Christopher Cookson
  • Patent number: 6293965
    Abstract: Connectors are provided for making connections between tubular conduits in medical procedures such as those involving treatment of a patient's circulatory system. The connectors are variously configured for making end-to-side or end-to-end connections of tubular conduits. One of the tubular conduits may be a graft conduit, which can be artificial conduit, natural conduit, or a combination of both. The connectors for making end-to-side connections can be generally T-shaped or L-shaped. Various portions of the connectors can attach to the inside or outside of the associated conduit, depending on the connector configuration that is selected.
    Type: Grant
    Filed: March 30, 2000
    Date of Patent: September 25, 2001
    Assignee: St. Jude Medical Anastomotic Technology Group, Inc.
    Inventors: Todd Allen Berg, Thomas J. Bachinski, Alex Alden Peterson, Gregory Alan Boldenow
  • Patent number: 6288970
    Abstract: A programmable logic device memory array circuit is provided that contains a pair of associated combinable single-port memory arrays. The memory array circuit may have a variable depth and width. The combinable single-port memory arrays may be operated independently if desired. Alternatively, a pair of the combinable single-port memory arrays can be combined to form a dual-port memory array. When the single-port memory arrays are combined to form a dual-port memory array, circuitry from a first of the combinable singleport memory arrays is used to perform writing operations and circuitry from a second of the combinable single-port memory arrays is used to perform reading operations. The availability of the dual-port memory array capability allows users to implement circuits such as first-in-first-out buffers and other circuits that require the ability to perform concurrent read and write operations.
    Type: Grant
    Filed: June 30, 1998
    Date of Patent: September 11, 2001
    Assignee: Altera Corporation
    Inventors: Srinivas T. Reddy, Christopher F. Lane, Manuel Mejia
  • Patent number: 6286661
    Abstract: A pallet for carrying dynamo-electric machine component workpieces of different dimensions is provided with first and second support members, at least one of which is movably mounted on the pallet so that the distance between the support members can be adjusted to accommodate a wide range of differently dimensioned workpieces. The pallet may include an aperture which allows a removal device to pass through and remove a workpiece from, or deposit a workpiece to the pallet. Each movable support member is releasably locked so that a user may unlock and adjust the support members to a desired position.
    Type: Grant
    Filed: June 1, 2000
    Date of Patent: September 11, 2001
    Assignee: Axis USA Inc.
    Inventors: Rossano Galassi, Antonio Randazzo, Maurizio Mugelli
  • Patent number: 6278288
    Abstract: A programmable logic integrated circuit device is provided with enhanced capability for dynamically multiplexing signals on the device. Controllable connectors that are provided on the device for connecting any of several connector input signals to a connector output are controlled by control signals that can be programmable selected to be either constant or variable signals. If a control signal is selected to be a variable signal, then the connector controlled by that control signal can be operated as a dynamic multiplexer of the input signals to that connector. The controllable connectors may advantageously be used as the connectors that are employed for allowing several possible signal sources to effectively share a smaller of number of signal drivers.
    Type: Grant
    Filed: May 19, 2000
    Date of Patent: August 21, 2001
    Assignee: Altera Corporation
    Inventors: Andy L. Lee, Richard G. Cliff, David Jefferson, Cameron McClintock, Kurosu R. Altaf
  • Patent number: 6273880
    Abstract: A catheter with at least one integrated lumen and methods of its manufacture and use are provided. A method of manufacture includes: (1) covering a primary mandrel with a first layer, (2) disposing a second layer on the first layer, wherein the second layer has at least one removable secondary mandrel substantially embedded therein, (3) fusing the first layer to the second layer, (4) removing the secondary mandrel from the second layer to form a secondary lumen, and (5) removing the primary mandrel from the first layer to form a primary lumen. The method may further include forming an inflatable balloon at the surface of the second layer where the secondary lumen forms an opening. Also, auxiliary apparatus, such as snare instruments and bundles of optical fibers, may be inserted through the secondary lumen before or during use of the catheter.
    Type: Grant
    Filed: August 17, 1999
    Date of Patent: August 14, 2001
    Assignee: St. Jude Medical Anastomotic Technology Group, Inc.
    Inventors: Todd Allen Berg, Paul J. Hindrichs, Christopher Michael Prigge
  • Patent number: 6271729
    Abstract: A programmable logic device is provided with phase-locked loop (“PLL”) or delay-locked loop (“DLL”) circuitry in which the feedback loop circuitry substantially parallels and duplicates a portion of the clock signal distribution network on the device that receives the main PLL/DLL output signal. In this way the distributed feedback loop circuit more readily provides a substantially exact match for the distributed delay experienced by the signal propagating through the clock signal distribution network that the PLL/DLL circuitry serves.
    Type: Grant
    Filed: December 13, 2000
    Date of Patent: August 7, 2001
    Assignee: Altera Corporation
    Inventors: Chiakang Sung, Joseph Huang, Bonnie I. Wang, Robert R. N. Bielby
  • Patent number: 6271681
    Abstract: A programmable logic integrated circuit device has several features which help it perform according to the PCI Special Interest Group's Peripheral Component Interface (“PCI”) signaling protocol. Regions of programmable logic within the device are closely coupled to the data signal output pins and clock signal input pins such that delay between application of a clock signal to the device and output of a data signal from the device is within PCI signal standards for delay. The device also includes output circuitry that can be configured to selectively invert signals to output enable and data input enable terminals of the output circuitry.
    Type: Grant
    Filed: September 14, 1999
    Date of Patent: August 7, 2001
    Assignee: Altera Corporation
    Inventors: Richard G. Cliff, Francis B. Heile, Joseph Huang, David W. Mendel, Bruce B. Pedersen, Chiakang Sung, Kerry Veenstra, Bonnie I. Wang
  • Patent number: 6263482
    Abstract: A programmable logic device is provided that contains macrocells with selectable inversion circuitry. The macrocells may be organized in groups of macrocells called logic array blocks. The logic array blocks may be interconnected by a programmable interconnect array. Each logic array block has an associated logic array block programmable interconnect array for receiving logic signals, for performing logical AND operations on the logic signals, and for providing resulting product-terms to the macrocells. The macrocells receive the product-terms using a number of normal product-term inputs. Each macrocell has shared expander logic for feeding back an inverted version of a given product term as an input to that macrocell. The shared expander logic also allows the given product term to be inverted without being fed back. The inverted version of the product term that is not fed back may be passed to the output of the macrocell.
    Type: Grant
    Filed: January 26, 1999
    Date of Patent: July 17, 2001
    Assignee: Altera Corporation
    Inventor: James G. Schleicher
  • Patent number: D449911
    Type: Grant
    Filed: October 10, 2000
    Date of Patent: October 30, 2001
    Assignee: White Mop Wringer Company
    Inventor: Lisa M. Goodman