Abstract: A diversity combiner for a digital receiver receives a plurality of complex baseband signals (S.sub.1 (t), S.sub.2 (t)) each having an associated receive signal strength-intensity signal (RSSI.sub.1, RSSI.sub.2). The combiner differentially detects each of the complex baseband signals (S.sub.1 (t), S.sub.2 (t)) to produce a plurality of differential signals (RX.sub.1 (t), RX.sub.2 (t)) in accordance with:RX.sub.1 (t)=S.sub.1 (t).multidot.S.sub.1 *(t-T), andRX.sub.2 (t)=S.sub.2 (t).multidot.S.sub.2 *(t-T)where S.sub.x * is the complex conjugate of S.sub.x and T is a symbol delay. The differential signals (RX.sub.1 (t), RX.sub.2 (t) ) are processed to produce a selected differential signal R(t). The selected differential signal R(t) is converted to produce a plurality of converted signals D.sub.1 (t) and D.sub.2 (t) in accordance with:D.sub.1 (t)=R(t).multidot.e.sup.-j2.pi.fstD.sub.2 (t)=R(t).multidot.e.sup.+j2.pi.fstThe converted signals D.sub.1 (t) and D.sub.2 (t) are further processed to produce timing (.

Abstract: A probabilistic method of detecting viral intrusion into an original computer file is disclosed. In the method, a protection file is first created. In the preferred embodiment, the protection files is created by generating a test string. The test string is compared to the original computer file and is discarded in the event of a match. The test string is kept in the event of a non-match. The protection file is created by storing a plurality of non-matching test strings. In the detection stage, the file to be screened for possible viral infection is compared to each of the test strings of the protection file. The computer file being screened is determined to be probabilistically free of a viral infection if all of the test strings in the protection file do not match the file being screened. However, in the event of a match between a test string and the file being screened, then a change in the file being screened is detected.

Abstract: A parallel processing circuit and a digital signal processor employing such a parallel circuit employs a plurality of identical multiply and accumulate (MAC) processing units. Two input signals are supplied to each of the MAC processing units. In one embodiment, a delay or a shift register delays one of the input digital signal from one MAC to another MAC. A plurality of different processed signals can be generated simultaneously based upon the supplied input digital signals, greatly increasing processing capability without increasing clock speed or increasing bandwidth access to a memory.

Abstract: There is provided an apparatus for measuring magnetic sources that exist in an object and produce magnetic fields outside the object. The apparatus comprises an element for detecting the magnetic fields which has a sensing portion placed in proximity with the object and adapted to incorporate an observing plane. The observing plane consists of a plurality of sensing blocks each containing at least three sensing planes on which a magnetic sensor is each mounted. The normal directions of the sensing planes are different from each other. The apparatus further comprises an element for evaluating three-dimensionally the intensities of other magnetic fields at given evaluation positions on the basis of values of the magnetic fields at the detecting element, and an element for obtaining data of the magnetic sources on the basis of the intensities of the other magnetic fields evaluated by the evaluation element.

Abstract: An equalization method for digitally encoded signals transmitted in a plurality of non-contiguous time slots has a digitally encoded synchronization signal commencing in each time slot followed by a digitally encoded data signal having a digitally encoded marker signal at a predetermined time period. The synchronization signal of the assigned time slot ("first synchronization signal") and the digitally encoded data signal of the assigned time slot including the marker signal, and the digitally encoded synchronization signal of the immediately succeeding non-assigned time slot ("second synchronization signal") are all stored. The location of the minimum energy point of the stored digitally encoded signals is determined. Equalization is performed starting from the first synchronization signal to the minimum energy point. Then, the equalization commences from the second synchronization signal backwards until the minimum energy point is reached.