Patents Represented by Attorney, Agent or Law Firm Ronald P. Kananen
  • Patent number: 6603888
    Abstract: In multiplying circuits, filter coefficients are multiplied to tap outputs between the stages of delay circuits, respectively. The multiplication outputs are added by an adding circuit, thereby performing an interpolation arithmetic operation. Phase information and coefficient adjustment data are inputted to a coefficient generating circuit. Either the nearest neighborhood approximating method or the bilinear approximating method can be selected by the coefficient adjustment data, and any of the intermediate characteristics between the nearest neighborhood approximating method and the bilinear approximating method, characteristics which are closer to those of the nearest neighborhood approximating method between the nearest neighborhood approximating method and the bilinear approximating method, and characteristics which are closer to those of the bilinear approximating method can be freely set.
    Type: Grant
    Filed: October 7, 1999
    Date of Patent: August 5, 2003
    Assignee: Sony Corporation
    Inventors: Atsushi Kikuchi, Koji Aoyama
  • Patent number: 6603340
    Abstract: An inverter type delay circuit, voltage-controlled oscillation circuit, and voltage-controlled delay circuit capable of realizing simplification of circuit configuration, reduction of an effect of power source noise, and reduction of jitter, wherein a delay circuit, voltage-controlled oscillation circuit, and voltage-controlled delay circuit comprised of a plurality of delay stages controlled in drive current in accordance with a bias voltage or a control voltage and determined in delay time by the drive current, adding a change of a power source voltage to the above bias voltage or control voltage by a predetermined ratio and supplying a result of the addition to the above delay stages to suppress the power source voltage dependencies of the delay times of the delay stages, or connecting by a predetermined ratio a plurality of delay stages having different power source voltage dependencies, for example, power source voltage dependencies of opposite delay times, to suppress the power source voltage dependenci
    Type: Grant
    Filed: July 31, 2001
    Date of Patent: August 5, 2003
    Assignee: Sony Corporation
    Inventor: Hiroshi Tachimori
  • Patent number: 6603261
    Abstract: To provide an AC driving type matrix plasma discharge display device which can reduce power consumption and a fabricating method of the same. First and second substrates 1 and 2 are disposed so as to oppose each other, and a first electrode group 21, which is constituted so that a plurality of first discharge electrodes 11 are disposed, is formed on the first substrate 1, and a second electrode group 21, which is constituted so that a plurality of second discharge electrodes 12 are disposed, is formed on the second substrate. A plasma discharge display is executed by mainly utilizing a cathode glow discharge.
    Type: Grant
    Filed: March 31, 2000
    Date of Patent: August 5, 2003
    Assignee: Sony Corporation
    Inventor: Hiroshi Mori
  • Patent number: 6602733
    Abstract: A method for fabricating an electric circuit device able to ensure bonding strength and bond bumps without occurrence of cratering or other mechanical damages.
    Type: Grant
    Filed: February 15, 2001
    Date of Patent: August 5, 2003
    Assignee: Sony Corporation
    Inventors: Shinji Iwahashi, Junichi Sekine, Hiroshi Yamasaki
  • Patent number: 6602643
    Abstract: An ultraviolet-curable resin composition comprising a phosphorus atom-containing photopolymerizable compound and a carboxyl group-containing photopolymerizable compound and exhibiting surface tension at 25° C. in the range of 30 to 50 mN/m. Preferably the composition comprises (a) a compound having one or more (meth)acryloyl groups in its molecule and a phosphorus atom, (b) a compound having at least one carboxyl group and one (meth)acryloyl group in its molecule, (c) a compound having one or more (meth)acryloyl groups in its molecule, (d) a leveling agent, and (e) a photoinitiator. The ultraviolet-curable resin composition is useful as a protective material for etching, particularly as a back-coating material in the production of a shadow mask.
    Type: Grant
    Filed: March 22, 2002
    Date of Patent: August 5, 2003
    Assignee: Taiyo Ink Manufacturing Co., Ltd.
    Inventors: Masaru Nikaidou, Sachiko Hirahara, Nariaki Kurabayashi
  • Patent number: 6603147
    Abstract: A semiconductor light emitting device using nitride III-V compound semiconductors is improved to reduce the threshold current density with almost no increase of the operation voltage. In a GaN semiconductor laser as one version thereof, the p-type cladding layer is made of two or more semiconductor layers different in band gap, and a part of the p-type cladding layer near one of its boundaries nearer to the active layer is made of a semiconductor layer having a large band gap than that of the remainder part. More specifically, in a AlGaN/GaN/GaInN SCH-structured GaN semiconductor laser, a p-type AlGaN cladding layer is made of a p-type Alx1Ga1−x1N layer in contact with a p-type GaN optical guide layer, and a p-type Alx2Ga1−x2N layer overlying the p-type Alx1Ga1−x1N layer (where 0≦x2<x1≦1).
    Type: Grant
    Filed: June 2, 2000
    Date of Patent: August 5, 2003
    Assignee: Sony Corporation
    Inventors: Shigeki Hashimoto, Katsunori Yanashima, Masao Ikeda, Hiroshi Nakajima
  • Patent number: 6600262
    Abstract: The field emission type cathode. (K) is made as the multilayered structure (33) in which the conductive platelike corpuscles 30 are piled, whereby an edge portion of end surface of a field emission type cathode K for emitting electrons is formed sharply and easily.
    Type: Grant
    Filed: December 13, 1999
    Date of Patent: July 29, 2003
    Assignees: Sony Corporation, Hitachi Powdered Metals Co. Ltd.
    Inventors: Koichi Iida, Ichiro Saito, Shinichi Tachizono, Takeshi Yamagishi
  • Patent number: 6600580
    Abstract: A single photographic subsystem 2 photographs an original image for a hologram and provides an image information file Fp. In addition, this subsystem provides a management information file Fm for storing management information about the image information file Fp. An image processing section 4 generates a composite image file Fs by applying specified image processing to the image information file Fp and the management information about the management information file Fm provided from the single photographic subsystem 2 via a transmission system 3a. A hologram printer 5 receives the composite image file Fs generated in the image processing section 4 and prints a holographic stereogram based on this composite image file Fs.
    Type: Grant
    Filed: May 21, 2001
    Date of Patent: July 29, 2003
    Assignee: Sony Corporation
    Inventors: Nobuhiro Kihara, Takahiro Toyoda, Akira Shirakura
  • Patent number: 6598951
    Abstract: The present invention provides an ink-jet printer having high resolution and image quality, low power consumption, low cost and containing line heads.
    Type: Grant
    Filed: January 16, 2001
    Date of Patent: July 29, 2003
    Assignee: Sony Corporation
    Inventors: Yuichiro Ikemoto, Makoto Ando, Yuji Yakura
  • Patent number: 6597425
    Abstract: There is provided a liquid crystal display device in which film thickness irregularities and rubbing irregularities of orientation films are minimized in which superior image quality is provided even when columnar spacers are disposed therein. The liquid crystal display device has a structure in which a liquid crystal substance is sandwiched between a pair of substrates facing each other with the space therebetween controlled to a specific value by a plurality of the columnar spacers independent from each other, wherein the placement density of the columnar spacers is 100 to 2000/mm2, and the sectional area of the columnar spacers is 1 to 100 &mgr;m2.
    Type: Grant
    Filed: May 3, 2001
    Date of Patent: July 22, 2003
    Assignee: Sony Corporation
    Inventors: Hisashi Kadota, Hirohide Fukumoto, Hiromi Fukumori
  • Patent number: 6597650
    Abstract: A nonlinearity compensation circuit is disclosed which includes an inverse hyperbolic function generation circuit for converting differential currents corresponding to input signals in+ and in− into differential voltages which increase in proportion to an inverse hyperbolic function, an offset provision circuit for providing an offset corresponding to control signals c+ and c− to the differential voltages outputted from the inverse hyperbolic function generation circuit and a hyperbolic function generation circuit for converting the differential voltages to which the offset has been provided by the offset provision circuit into signals which increase in proportion to a hyperbolic function and outputting the resulting signals as output signals out+ and out−. Consequently, compensation for the nonlinearity such as second order distortion can be performed for the read signal from a recording medium.
    Type: Grant
    Filed: June 1, 2001
    Date of Patent: July 22, 2003
    Assignee: Sony Corporation
    Inventors: Masayuki Katakura, Junkichi Sugita, Norio Shoji, Masato Sekine, Kimimasa Senba, Katsuhisa Daio
  • Patent number: 6596365
    Abstract: An optical recording medium comprises a substrate having one principal surface on which uneven pattern is formed, and adapted so that light is irradiated onto the uneven pattern and recording/reproduction of recording signals are carried out by the irradiated light. The substrate includes an intermediate layer including rigidity rendering material and a surface layer formed on at least one principal surface of the intermediate layer and adapted so that the uneven pattern is formed. As the rigidity rendering material, there are used granulated filling material, plate-shaped filling material and fiber material. In manufacturing such an optical recording medium, the surface layer is disposed in a manner to oppose stamper where reversed uneven pattern is formed and the intermediate layer including rigidity rendering material is stacked on the surface layer.
    Type: Grant
    Filed: August 17, 2001
    Date of Patent: July 22, 2003
    Assignee: Sony Corporation
    Inventor: Nobuyuki Arakawa
  • Patent number: 6597789
    Abstract: Conventional decoding systems for scrambled audio-visual signals are improved by providing a dual-side local oscillator that functions as a high-side oscillator if the incoming RF signal is unscrambled and as a low-side oscillator if the incoming RF signal is scrambled. The result is that the unscrambled signal is reversed from an audio-over-video transmission configuration to an IF signal with a video-over-audio configuration, and a scrambled signal is maintained in a video-over-audio configuration, the video-over-audio configuration being the configuration required for proper reception and use of the signal by a television set. To function as both a high- and low-side oscillator, the dual-side oscillator has independent voltage control and does not follow the tracking filter associated with the tuner.
    Type: Grant
    Filed: December 17, 1998
    Date of Patent: July 22, 2003
    Assignee: General Instrument Corporation
    Inventor: Joseph B. Glaab
  • Patent number: 6597096
    Abstract: In an inline three-beam system color cathode-ray tube, there is provided an inline three-beam system color cathode-ray tube electron gun in which beam spot shapes of three electron beams on the left and right end portions of a fluorescent screen may be uniformed as much as possible and focusing voltages may be adjusted with ease and also deteriorations of beam spot shapes of three electron beams on the left and right end portions of the fluorescent screen may be alleviated and a satisfactory convergence characteristic may be obtained on the whole region of the screen. A color cathode-ray tube electron gun includes trisected focusing electrodes.
    Type: Grant
    Filed: February 18, 1999
    Date of Patent: July 22, 2003
    Assignee: Sony Corporation
    Inventors: Yasunobu Amano, Norifumi Kikuchi, Makoto Natori
  • Patent number: 6596600
    Abstract: A logic circuit is formed of an I2L cell structure in which a difference of switching speeds at every collectors in a multi-collector structure is small. In a semiconductor device in which an integrated injection logic cell including a constant current source transistor and a switch transistor is formed on a common semiconductor substrate, a first semiconductor layer (13) doped with a first conductivity type impurity and a second semiconductor layer (19) doped with a second conductivity impurity are electrically isolated from each other on a semiconductor substrate. A plurality of collector electrodes of the switch transistor and a plurality of collector regions (20) based on diffusion of impurity are formed by the second semiconductor layer (19). The first semiconductor layer (13) includes a base electrode deriving portion, and a direct contact portion which directly contacts with the semiconductor substrate between a plurality of collector regions (20).
    Type: Grant
    Filed: October 30, 1998
    Date of Patent: July 22, 2003
    Assignee: Sony Corporation
    Inventor: Takayuki Gomi
  • Patent number: 6597475
    Abstract: An image recording apparatus and an image recording method can be suitably used for preparing a large number of edge-lit type holograms or holographic stereograms in a simple manner by copying. A hologram recording medium 11 is applied onto a principal surface 10a of a light-introducing block for copying 10 and held in contact with a master 15. Then, reference light L equivalent to reproducing light for reproducing the image of the master 15 is introduced into the light-introducing block for copying 10 through an end face thereof 10b.
    Type: Grant
    Filed: March 17, 2000
    Date of Patent: July 22, 2003
    Assignee: Sony Corporation
    Inventors: Akira Shirakura, Nobuhiro Kihara
  • Patent number: 6592771
    Abstract: A method in which etching or ashing is conducted by providing satisfactory kinetic energy of reaction seeds such as ions or radicals without damaging a substrate, and an apparatus used in this method are provided. A predetermined film of for example polycrystalline silicon on the substrate is etched in vapor phase using reaction seeds or precursors thereof generated by contacting a reaction gas such as CF4 with a heated catalyst of for example tungsten.
    Type: Grant
    Filed: April 7, 2000
    Date of Patent: July 15, 2003
    Assignee: Sony Corporation
    Inventors: Hideo Yamanaka, Kikuo Kaise
  • Patent number: 6593246
    Abstract: A process for producing a semiconductor device for forming a highly reliable wiring structure is provided that solves the problem occurring on using a xerogel or a fluorine resin in an inter level dielectric between the wirings to decrease a wiring capacitance, and the problem occurring on misalignment. A process for producing a semiconductor device comprising an inter level dielectric containing a xerogel film or a fluorine resin film comprises a step of forming, on the inter level dielectric comprising a lower layer of the inter level dielectric formed with an organic film and an upper layer of the inter level dielectric formed with a xerogel film or a fluorine resin film, a first mask to be an etching mask for forming a via contact hole by etching the inter level dielectric, and a step of forming, on the first mask, a second mask, which comprises a different material from the first mask, to be an etching mask for forming a wiring groove by etching the inter level dielectric.
    Type: Grant
    Filed: March 14, 2000
    Date of Patent: July 15, 2003
    Assignee: Sony Corporation
    Inventors: Toshiaki Hasegawa, Mitsuru Taguchi, Koji Miyata
  • Patent number: 6594097
    Abstract: The overvoltage applied on a head during switching of the head is prevented. At the time when the head switching signal changes, a switch S4 for turning on/off an operational amplifier Gm1 is turned off, and the operational amplifier Gm1 is turned off. Simultaneously, the switch S3 is turned on, the current source I1 is connected to a capacitor C1, and the capacitor C1 is discharged. Then, switches S1 and S2 for switching the MR head are switched. Finally, the switch S3 is turned off and the switch S4 is turned on, thus the switching of the MR head is finished.
    Type: Grant
    Filed: February 29, 2000
    Date of Patent: July 15, 2003
    Assignee: Sony Corporation
    Inventor: Michiya Sako
  • Patent number: 6594210
    Abstract: An optical disc is irradiated with a main beam and a pair of side beams, and respected reflected beams of light are detected by a main detector and a pair of side detectors. A first push-pull signal is generated which includes wobble components obtained by a detection signal from the main detector, and second and third push-pull signals are generated using detection signals from the pair of side detectors. The second and third push-pull signals are added by an adder to generate crosstalk components included in the first push-pull signal, and wobble information of the recording track is generated and output using signals obtained by canceling the crosstalk components in the first push-pull signal including wobble signal components in the recording track.
    Type: Grant
    Filed: March 21, 2001
    Date of Patent: July 15, 2003
    Assignee: Sony Corporation
    Inventor: Eiji Kumagai