Patents Represented by Attorney Ryan, Mason & Lewis, LLP
  • Patent number: 8275087
    Abstract: An endpoint or other communication device of a communication system includes a clock recovery module. The communication device is operative as a slave device relative to another communication device that is operative as a master device. The clock recovery module comprises a clock recovery loop configured to control a slave clock frequency of the slave device so as to synchronize the slave clock frequency with a master clock frequency of the master device. The clock recovery loop comprises a primary loop having a first frequency error estimator for generating a first estimate of error between the master and slave clock frequencies, a second frequency error estimator outside of the primary loop for generating a second estimate of error between the master and slave clock frequencies, and an accumulator coupled between the second frequency error estimator and the primary loop. The second estimate is controllably injected into the primary loop via the accumulator.
    Type: Grant
    Filed: December 19, 2008
    Date of Patent: September 25, 2012
    Assignee: Alcatel Lucent
    Inventors: Ilija Hadzic, Dennis Raymond Morgan
  • Patent number: 8275099
    Abstract: A framework for creating a voice application in a world wide telecom web (WWTW) is provided. The techniques include using a pre-defined schema to create one or more voice application templates, using the one or more voice application templates to generate a first version of the voice application, using the first version of the voice application and a library of one or more components to generate a deployable version of the voice application and deploying the deployable version of the voice application onto a run-time execution engine.
    Type: Grant
    Filed: August 26, 2009
    Date of Patent: September 25, 2012
    Assignee: International Business Machines Corporation
    Inventors: Sheetal K. Agarwal, Arun Kumar, Priyanka Manwani
  • Patent number: 8271941
    Abstract: Techniques are provided for representing and configuring flexible and extensible presentation patterns based on fine-grained architectural building blocks (ABBs). The techniques include defining ABBs, modeling the ABBs in a uniform manner, and creating at least one template using the ABBs, wherein the at least one template includes at least one of pre-configured static characteristics and user-specified service characteristics. In an embodiment of the invention, an exemplary method for designing and managing fine-grained ABBs can include identifying ABBs to compose an architecture for facilitating presentation and interaction between consumers and other elements in a solution, analyzing the ABBs to monitor computing resources used by individual ABBs, selecting a number of running instances of the ABBs based on (i) requests of a pertinent entity and (ii) available resources, and managing life-cycles of ABBs.
    Type: Grant
    Filed: October 31, 2006
    Date of Patent: September 18, 2012
    Assignee: International Business Machines Corporation
    Inventors: Liang-Jie Zhang, Abdul Allam, Jia Zhang
  • Patent number: 8270524
    Abstract: In a communication system, a postcoder is coupled between first and second portions of each of a plurality of receivers. The postcoder is configured to receive an adaptive index representation of a scaled signal associated with the first portion of a first one of the receivers, and to process the adaptive index representation using an adjusted postcoder coefficient to generate a postcompensation signal. The postcompensation signal is supplied by the postcoder to the second portion of a second one of the receivers for use in postcompensation of at least one signal received by the second receiver.
    Type: Grant
    Filed: December 17, 2009
    Date of Patent: September 18, 2012
    Assignee: Alcatel Lucent
    Inventor: Adriaan J. De Lind Van Wijngaarden
  • Patent number: 8270523
    Abstract: In a communication system, a precoder is coupled between first and second portions of each of a plurality of transmitters. The precoder is configured to receive an adaptive index representation of a scaled signal associated with the first portion of a first one of the transmitters, and to process the adaptive index representation using an adjusted precoder coefficient to generate a precompensation signal. The precompensation signal is supplied from the precoder to the second portion of a second one of the transmitters for use in precompensation of at least one signal to be transmitted by the second transmitter.
    Type: Grant
    Filed: December 17, 2009
    Date of Patent: September 18, 2012
    Assignee: Alcatel Lucent
    Inventor: Adriaan J. De Lind Van Wijngaarden
  • Patent number: 8271990
    Abstract: Techniques for eradicating operating system jitter-induced slowdown are provided. The techniques include allocating one or more computing resources to one or more logical partitions of one or more parallel programs in proportion of one or more cycles consumed by one or more sources of operating system jitter in each compute phase in each of the one or more logical partitions.
    Type: Grant
    Filed: February 27, 2009
    Date of Patent: September 18, 2012
    Assignee: International Business Machines Corporation
    Inventors: Pradipta De, Ravi Kothari, Vijay Mann
  • Patent number: 8271414
    Abstract: Methods, systems and apparatus for characterizing networks are presented. For example, a method of characterizing a network represented by a plurality of nodes and a plurality of edges is provided. The method may be implemented on a processor device and includes calculating, for example, by the processor device, a passthrough count of at least a portion of the network. The passthrough count includes a count of a number of passthroughs in the at least a portion of the network. A passthrough includes one of the plurality of nodes, a directed edge of the plurality of edges coupled to the one of the plurality of nodes, and another edge of the plurality of edges coupled to the one of the plurality of nodes. At most one of the directed edge and the other edge is directed towards the one of the plurality of nodes. At most one of the directed edge and the other edge is directed away from the one of the plurality of nodes.
    Type: Grant
    Filed: July 24, 2009
    Date of Patent: September 18, 2012
    Assignees: International Business Machines Corporation, Mount Sinai School of Medicine of New York University
    Inventors: Guillermo Alberto Cecchi, Srinivas Ravi Viraraghava Iyengar, Avi Ma'ayan, Ravishankar Rao, Gustavo Alejandro Stolovitzky, John Michael Wagner
  • Patent number: 8270289
    Abstract: Methods and apparatus are provided for framing synchronization control for a framer/mapper/multiplexor (FMM) device with 1+1 and equipment protection. FMM device are disclosed that synchronize one or more internal signals by changing a phase of the one or more internal signals without changing a frequency of the one or more internal signals based on a desired phase at a destination of each of the one or more internal signals. A programmable synchronization signal may optionally be employed for the synchronization.
    Type: Grant
    Filed: February 27, 2009
    Date of Patent: September 18, 2012
    Assignee: LSI Corporation
    Inventors: Cheng Gang Duan, Lin Hua, Michael S. Shaffer, Tao Wang, Qian G. Xu
  • Patent number: 8269671
    Abstract: A radio-frequency integrated circuit chip package has N integrated patch antennas, N being at least one. The package includes a cover portion with N generally planar patches, and a main portion coupled to the cover portion. The main portion in turn includes at least one generally planar ground plane spaced inwardly from the N generally planar patches and parallel thereto. The ground plane is formed without any coupling apertures therein. The main portion also includes N feed lines spaced inwardly from the N generally planar patches and parallel thereto, and spaced outwardly from the generally planar ground plane and parallel thereto. Furthermore, the main portion includes at least one radio frequency chip coupled to the feed lines and the ground plane. The cover portion and the main portion cooperatively define an antenna cavity, and the N generally planar patches and the chip are located in the antenna cavity. The package is formed without reflectors. Fabrication techniques are also described.
    Type: Grant
    Filed: January 27, 2009
    Date of Patent: September 18, 2012
    Assignees: International Business Machines Corporation, Media Tek
    Inventors: Ho Chung Chen, Brian A. Floyd, Duixian Liu
  • Patent number: 8270301
    Abstract: Network design techniques and techniques for routing virtually-concatenated data traffic in a network in a manner which distributes delay to intermediate nodes of the network are disclosed. For example, in one aspect of the invention, a technique for routing virtually-concatenated data traffic in a network comprising a plurality of nodes comprises, for a given traffic demand to be routed from a source node to a destination node in the network, the following steps/operations. Two or more paths are determined to route the given traffic demand. Each of the two or more paths correspond to a member of a virtually-concatenated group. At least one path of the two or more paths comprises the source node, the destination node and at least one other node coupled between the source node and the destination node. Further, at least a subset of the source node, the destination node and the one other node buffer at least a portion of the given traffic demand such that a delay is distributed over the at least one path.
    Type: Grant
    Filed: December 29, 2004
    Date of Patent: September 18, 2012
    Assignee: Alcatel Lucent
    Inventors: Mansoor Ali Khan Alicherry, Harsha S. Nagesh, Chitra A. Phadke, Viswanath Poosala
  • Patent number: 8271847
    Abstract: Methods and apparatus are provided for N+1 packet level mesh protection. An error correction encoding method is provided that assembles M-T data packets; appends a sequence number and a payload integrity check to each of the M-T data packets; and creates T protection packets having the sequence number and payload integrity check, wherein a payload for each of the T protection packets are formed from corresponding symbols in the M-T data packets. An error correction decoding method is also provided that receives a plurality of error-free packets and one or more packets having an error; and reconstructs the one or more packets having an error by applying block erasure decoding to said plurality of error-free packets, whereby one packet having an error can be reconstructed for each protection packet used to encode the received packets.
    Type: Grant
    Filed: September 23, 2009
    Date of Patent: September 18, 2012
    Assignee: Agere Systems Inc.
    Inventor: Paul Langner
  • Patent number: 8271874
    Abstract: The invention provides method and apparatus for locating data in a data file and for transforming the data. The method comprises the steps: determining the data unit to be located in the data file; determining a type for the data unit, the type including “Text”, “SingleLine”, “MultiLine”, “Block” and “Iterator”; when the type of the data unit is not “Text”, selecting a different data unit as the location reference for the data unit; generating the location description for the data unit, based on the type of the data unit and the position relationship between the data unit and the different data unit, the description including the type of the data unit, one or more location elements for locating the data unit and including “Top”, “Bottom”, “Left” and “Right”, each of the location elements including a combination of attributes so as to determine the position of the location element. The invention may locate the data position by two dimensional area.
    Type: Grant
    Filed: October 20, 2003
    Date of Patent: September 18, 2012
    Assignee: International Business Machines Corporation
    Inventors: Sheng Ye, Wei Sun, Zhong Tian
  • Patent number: 8272038
    Abstract: A method for authorizing access to a first computing device is provided. The method comprises the first computing device forming a challenge, encoding the challenge into a symbol, and displaying the symbol. The first computing device receives a request for access from a user. Access to the first computing device is allowed in response to provision of an access code to the first computing device by the user. The access code is formed by a server in response to capturing the symbol, decoding the symbol into the challenge, forming a request from the challenge, and providing the request to the server. The server forms a decision to allow access by the user to the first computing device.
    Type: Grant
    Filed: May 19, 2008
    Date of Patent: September 18, 2012
    Assignee: International Business Machines Corporation
    Inventors: Dirk Husemann, Micheal Elton Nidd
  • Patent number: 8263497
    Abstract: An assembly including a main wafer having a body with a front side and a back side and a plurality of blind electrical vias terminating above the back side, and a handler wafer, is obtained. A step includes exposing the blind electrical vias to various heights on the back side. Another step involves applying a first chemical mechanical polish process to the back side, to open any of the surrounding insulator adjacent the end regions of the cores remaining after the exposing step, and to co-planarize the via conductive cores, the surrounding insulator adjacent the side regions of the cores, and the body of the main wafer. Further steps include etching the back side to produce a uniform standoff height of each of the vias across the back side; depositing a dielectric across the back side; and applying a second chemical mechanical polish process to the back side.
    Type: Grant
    Filed: January 13, 2009
    Date of Patent: September 11, 2012
    Assignee: International Business Machines Corporation
    Inventors: Paul S. Andry, John M. Cotte, Michael F. Lofaro, Edmund J. Sprogis, James A. Tornello, Cornelia K. Tsang
  • Patent number: 8263492
    Abstract: Methods and apparatus for forming through-vias are presented, for example, a method for forming a via in a portion of a semiconductor wafer comprising a substrate. The method comprises forming a trench surrounding a first part of the substrate such that the first part is separated from a second part of the substrate, forming a hole through the substrate within the first part, and forming a first metal within the hole. The trench extends through the substrate. The first metal extends from a front surface of the substrate to a back surface of the substrate. The via comprises the hole and the first metal.
    Type: Grant
    Filed: April 29, 2009
    Date of Patent: September 11, 2012
    Assignee: International Business Machines Corporation
    Inventors: John Michael Cotte, Christopher Vincent Jahnes, Bucknell Chapman Webb
  • Patent number: 8265611
    Abstract: Location-based services are provided in a communication system comprising at least a portion of at least one wireless network. In one aspect of the invention, mobile user devices that are candidates for a location-based service are identified and the identified mobile user devices are monitored to determine when one or more of said mobile user devices becomes currently active on a traffic channel of the wireless network. Location information is automatically obtained for the one or more mobile user devices that are currently active on the traffic channel, and delivery of at least one message to a given one of those mobile user devices is controlled based on the location information. Generation of location queries involving respective ones of the mobile user devices is thereby synchronized with the traffic channel activity of those devices.
    Type: Grant
    Filed: May 19, 2006
    Date of Patent: September 11, 2012
    Assignee: Alcatel Lucent
    Inventors: Karl Georg Hampel, William Michael MacDonald, Viswanath Poosala
  • Patent number: 8266164
    Abstract: Techniques are disclosed for bridging terminology differences between at least two subject areas. By way of example, a computer-implemented method includes executing the following steps on a computer. A first affinity measure is computed between a first term in a first corpus, corresponding to a first subject area, and a bridge term. A second affinity measure is computed between a second term in a second corpus, corresponding to a second subject area, and the bridge term. A third affinity measure is computed between the first term and the second term based on the first affinity measure and the second affinity measure. The bridge term is a term that appears in both the first corpus and the second corpus.
    Type: Grant
    Filed: December 8, 2008
    Date of Patent: September 11, 2012
    Assignee: International Business Machines Corporation
    Inventors: Sajib Dasgupta, Dipayan Gangopadhyay, Norman J. Pass
  • Patent number: 8262289
    Abstract: A reversible fastener is provided for a resealable bag-type container (100) having first and second opposing wall panels (102,104), each of the first and second opposing wall panels having an interior face and an exterior face. The fastener includes first and second closure mechanisms. The first closure mechanism (114) includes first and second complementary interlockable components (116,118) disposed on the interior face of each of the first and second opposing wall panels proximate a top periphery (112) of the first and second opposing wall panels. The second closure mechanism (120) includes first and second complementary interlockable components (122,124) disposed on the exterior face of each of the first and second opposing wall panels proximate a top periphery of the first and second opposing wall panels.
    Type: Grant
    Filed: January 31, 2007
    Date of Patent: September 11, 2012
    Assignee: Agere Systems Inc.
    Inventors: Roger A. Fratti, Cathy Lynn Hollien
  • Patent number: 8261022
    Abstract: A method and apparatus are disclosed for locking the most recently accessed frames in a cache memory. The most recently accessed frames in a cache memory are likely to be accessed by a task again in the near future. The most recently used frames may be locked at the beginning of a task switch or interrupt to improve the performance of the cache. The list of most recently used frames is updated as a task executes and may be embodied, for example, as a list of frames addresses or a flag associated with each frame. The list of most recently used frames may be separately maintained for each task if multiple tasks may interrupt each other. An adaptive frame unlocking mechanism is also disclosed that automatically unlocks frames that may cause a significant performance degradation for a task. The adaptive frame unlocking mechanism monitors a number of times a task experiences a frame miss and unlocks a given frame if the number of frame misses exceeds a predefined threshold.
    Type: Grant
    Filed: October 9, 2001
    Date of Patent: September 4, 2012
    Assignee: Agere Systems Inc.
    Inventors: Harry Dwyer, John Susantha Fernando
  • Patent number: 8260034
    Abstract: A technique for identifying a defect in an object produced by a controllable process. A first type of data generated as a result of production of the object by the controllable process is obtained. A second type of data generated as a result of production of the object by the controllable process is obtained. The first type of data and the second type of data are jointly analyzed. A defect is identified in the object based on the joint analysis of the first type of data and the second type of data. By way of example, the controllable process comprises a semiconductor manufacturing process such as a silicon wafer manufacturing process and the object produced by the semiconductor manufacturing process comprises a processed wafer. The first type of data comprises tool trace data and the second type of data comprises wafer image data. The tool trace data is generated by a photolithographic tool.
    Type: Grant
    Filed: January 22, 2008
    Date of Patent: September 4, 2012
    Assignee: International Business Machines Corporation
    Inventors: Lisa Amini, Brian Christopher Barker, Perry G. Hartswick, Deepak S. Turaga, Olivier Verscheure, Justin Wai-chow Wong