Abstract: A graphics subsystem utilizes a single port DRAM as a frame buffer, which has an r-bit wide data access port and stores video data that are generated by an application program executed on a host processor. The graphics subsystem includes a first-in first-out (FIFO) buffer for storing the video data from the frame buffer, and a scan interpolator for performing vertical and horizontal interpolation of data read from the FIFO buffer with respect to a predetermined number of adjacent scan lines on a video frame. By interpolating adjacent scan lines in real time, it is possible to obtain high-quality images on a computer or television display.

Abstract: An apposition sensing system including a stent; a catheter assembly to which the stent is coupled for deployment into a lumen; and a sensor positioned on the catheter assembly adjacent to an end of the stent. The sensor is adapted to provide an electrical parameter which is indicative of apposition of the end of the stent to the inner wall of the lumen. In one aspect of the invention, the sensor includes first and second pressure sensors positioned at proximal and distal portions of the catheter assembly adjacent to proximal and distal ends of the stent. A monitoring unit monitors pressure changes sensed by the sensors. In accordance with an alternative embodiment of the invention, there is provided an expansion sensing system including a stent having an electrically conductive region; an expandable insulating sleeve; a catheter assembly to which the stent is coupled for deployment into a lumen; and at least one electrode associated with the catheter assembly.

Abstract: A navigation receiver system provides real-time precise relative positioning in cooperation with an associated carrier phase receiver. The navigation receiver system and the associated carrier phase receiver both sample signals during a single epoch, and the associated carrier phase receiver processes the received signals to provide and transmit first carrier phase measurement data. The navigation receiver system comprises a data link receiver that receives the first carrier phase measurement data from the associated carrier phase receiver, and a carrier phase receiver that receives carrier phase signals during the sampling epoch, and processes the carrier phase signals to provide a second carrier phase measurement data. The navigation system receiver also includes a processing unit that receives the first carrier phase measurement data and the second carrier phase measurement data and computes carrier phase difference measurements.

Abstract: A semiconductor device having a deactivation fuse includes logic circuit and at least two active elements. The logic circuit generates at least two internal control signals in response to an external control signal. The at least two active elements are connected in series with each other, and generate an output signal having a predetermined voltage in response to the internal control signals. The fuse is coupled to the active elements and logic circuit so as to minimize power consumption.

Abstract: This invention relates to an optimization method for driving a piezoelectric actuator by dynamic detection of its electromechanical characteristics, as well as to a device, in particular a phacoemulsifier based thereupon. The piezoelectric actuator includes a voltage driven, two-terminal piezoelectric transducer. The method for detection of its electromechanical characteristics is such that the drive of the transducer is cyclically discontinued in order to detect the characteristic parameters of its free motion by detection of the parameters of the signal generated by the transducer at the ends of the two terminals.

Abstract: A semiconductor structure including a silicon wafer having silicon regions, and at least one GexSi1−x region integrated within the silicon regions. The silicon and GexSi1−x regions can be substantially coplanar surfaces. The structure can include at least one electronic device configured in the silicon regions, and at least one electronic device of III-V materials configured in said at least one GexSi1−x region. The structure can be, for example, an integrated III-V/Si semiconductor microchip. In accordance with another embodiment of the invention there is provided a method of fabricating a semiconductor structure, including providing a silicon wafer with a surface; forming a pattern of vias within the surface of the wafer; and depositing regions of GexSi1−x within the vias. The method can include the step of processing the wafer so that the wafer and GexSi1−x regions have substantially coplanar surfaces.

Abstract: An optical disk reading apparatus and method compensate for errors in the full period of an EFM signal. An RF amplifier converts an optical signal reflected from an optical disk into an analog electrical signal. A signal converter converts the analog signal into a digital signal which is modulated to provide an EFM signal. A full period compensating portion compensates for full period errors in the EFM signal and outputs the error compensated EFM signal. An error correcting portion corrects the errors of the compensated EFM signal using an error correction code. Image quality is improved by removing the full period errors.

Abstract: A screening system includes a pressure screen which receives a liquid/solid suspension and filters the suspension to provide an accept portion and a reject portion. The pressure screen includes a housing which encloses a chamber containing a screen basket through which a portion of the liquid/solid suspension passes from a first side of the basket to a second side to form the accepts. A pressure sensor monitors the pressure differential between the first side and the second side and provides a sensed differential pressure signal indicative thereof. The system also senses the accept flow rate and provides a signal indicative thereof to a controller. The controller sets a differential pressure threshold value as a function of the accept flow rate signal and monitors the sensed differential pressure signal. If the sensed differential pressure signal exceeds the threshold value, the controller automatically initiates corrective action in order to reduce the differential pressure across the screen.

Abstract: A broadband modem hybrid transformer couples a broadband modem to a plain-old-telephone (POTs) line. The hybrid includes a full bridge having an impedance matching network to reduce the transhybrid attenuation of the hybrid. The second matching network(s) include various resistive and reactive components which together provide an impedance value selected based upon the impedance of the telephone line typically reflected into the primary windings of the transformer. The matching network increases the transhybrid attenuation of the hybrid, and thus reducing the amount of noise which couples from the modem transmit circuit to the modem receive circuit through the hybrid.

Abstract: The present invention is directed to a method of controlling the application of a surface coating by chemical deposition using a closed loop control on growth rate. The method compares a measure of growth rate against a setpoint for the growth rate and adjusts a primary input parameter in order to drive/maintain the measure of growth rate equal to the setpoint.

Abstract: The invention provides a superconducting bandpass sigma-delta modulator for use in analog-to-digital converters for converting an analog input signal to a digital output signal. The modulator includes an input unit, a sampling pulse generator unit, a quantizer unit, and a high Q resonator unit. The input unit is for receiving the analog input signal. The sampling pulse generator unit is for generating sampling pulses. The quantizer unit is coupled to the sampling pulse generator unit and to the input unit. The quantizer unit is for quantizing the input signal and producing an output signal representative of the analog input signal. The high Q resonator unit presents the quantizer unit with a low impedance at a center frequency of the input signal.

Abstract: There is provided a nonvolatile memory device and an operating method therof which can perform byte erasing and can be implemented high integration. The nonvolatile memory device has a plurality of cells, each including a stacked gate structure of a floating gate and a control gate. The cells are formed in an area where a plurality of bit lines arranged in parallel at specific intervals perpendicularly intersect a plurality of word lines arranged at specific intervals. The cells also include a plurality of source lines, each being arranged in parallel with the bit lines every byte, and a plurality of source select transistors formed in an area where the source lines intersect the word lines. Two cells are connected to a bit line via one bit line contact. Two cells symmetrically arranged with respect to each other and connected to the same bit line via respective bit line contacts share one active source region.

Abstract: A latch assembly for installation in a recess along a side edge of a wing element, for covering or uncovering an aperture, the latch assembly being adapted to hold the wing element in a closed position. The assembly includes a housing having at least one wall, at least one espagnolette bolt and an espagnolette rod. The espagnolette bolt is slidingly arranged in the housing between a first open position, in which the espagnolette bolt is retracted into the housing, and a second latching position, in which the espagnolette bolt projects from the housing to engage with a catch. The espagnolette bar is operatively connected to the espagnolette bolt for maneuvering the espagnolette bolt between the first open position and the second latching position. A latching pin is arranged for displacement with the espagnolette bolt, during movement of the espagnolette bolt from the first open position to the second latching position and back.

Abstract: Device for detecting and calculating focus point position (2), shape (3) and power distribution of a laser beam after a focussing lens, and which at least incorporates a laser source (10), the focussing lens (4), a light affecting body (5, 6), a light sensor (7), and means for calculation (9).

Abstract: A compressed-air supply system for goods vehicles, comprising an air-suspension system and a brake system, wherein the brake system is dimensioned to operate at a lower air pressure than the air-suspension system, and wherein the compressed-air supply system comprises at least one compressed-air tank (43, 51) for supplying the brake system with compressed air.

Abstract: A miniature x-ray unit includes a first electrical node, a second electrical node and an insulating material. The first and second nodes are separated by a vacuum gap. The first node includes a base portion and a projecting portion, wherein the projecting portion and the second node are surrounded by an x-ray transmissive window through which x-rays exit the unit. The insulating material coaxially surrounds the base portion of the first node such that the insulating material is recessed from the vacuum gap, and the insulator does not extend into the vacuum gap. Recessing the insulating material from the vacuum gap decreases the likelihood that the insulator will electrically break down due to the accumulation of electrical charge, and/or the accumulation of other materials on the surface of the insulator. In a preferred embodiment, the first node is an anode and the second node is a cathode. Alternatively, the first node may be the cathode and the second node may be the anode.

Abstract: A memory address generator having a small chip area, a method for generating a memory address and a SRAM built-in self test (BIST) circuit using the same are described. When the number of addresses of a memory to be tested is 2.sup.n, where n is the number of bits in an address, the address generator includes an up counter for generating a first address of a series of sequentially increasing addresses, and an inverter for inverting the first address to generate a second address of a series of sequentially decreasing addresses. The address generator also includes a selector for selecting one of the first and second addresses, in response to a control signal, to output the selected address as an address of the memory. When the number of addresses of the memory to be tested is not 2.sup.

Abstract: A full CMOS SRAM cell having the capability of having a reduced aspect ratio is described. The SRAM cell includes first and second transfer transistors of n-channel types, first and second driving transistors of the n-channel types and first and second load transistors of p-channel types. Each of the transistors has source and drain regions on opposite sides of a channel region formed in a semiconductor substrate and a gate over the channel region. The cell includes a first common region defined by the drain regions of the first transfer transistor and the first driving transistor connected in series therethrough. A second common region is defined by the drain regions of the second transfer transistor and the second driving transistor connected in series therethrough. The drain region of the first load transistor is disposed adjacent to the first common region between the first and second common regions.

Abstract: An automated beverage brewing system includes a liquid storage tank and a metering chamber. The metering chamber is at least partially submerged beneath a standing level of liquid in the storage tank. The chamber includes a sealable liquid inlet port communicating with the interior of the storage tank beneath the standing level of liquid. The chamber also includes a liquid outlet port and an aperture that receives compressed air, wherein the compressed air forces a predetermined amount of liquid from the liquid output port of the chamber for use in preparing a brewed beverage. A pump provides the compressed air and a controller monitors a pressure signal value indicative of the air pressure in the metering chamber. The controller commands the pump on to commence flow of the predetermined amount of liquid from the metering chamber.