Patents Represented by Attorney Schulte Roth & Zabel LLP
  • Patent number: 6505025
    Abstract: A color image forming apparatus for printing color images for a plurality of recording mediums having one or more photoreceptors for forming toner images of different color toners. The toner images are superimposed onto the intermediate transfer drum having a length of circumference such that a plurality of color images for the plurality of recording mediums can be held on this intermediate transfer drum. The superimposition of colors is done by consecutively repeating the primary transfer of each toner developed on the photoreceptor to the intermediate transfer drum. The toner images are formed on the photoreceptor and transferred to the intermediate transfer drum consecutively if the color images to be printed are solely of a specific monochrome color.
    Type: Grant
    Filed: June 22, 2001
    Date of Patent: January 7, 2003
    Assignee: Kyocera Corporation
    Inventor: Hiroaki Miyamura
  • Patent number: 6476552
    Abstract: The difference of luminance between a front surface side and a rear surface side as viewed from the front surface side is reduced in a multi-layered EL lamp. An EL lamp includes a first laminate formed by serially laminating a first transparent electrode, a first luminescent layer and a first insulating layer, a second laminate formed by serially laminating a second transparent electrode, a second luminescent layer and a second insulating layer on the first laminate, and a rear electrode formed on the second laminate, wherein a dielectric constant between the first and second transparent electrodes is set to a value smaller than a dielectric constant between the second transparent electrode and the rear electrode.
    Type: Grant
    Filed: April 13, 2000
    Date of Patent: November 5, 2002
    Assignee: Seiko Precision, Inc
    Inventor: Koji Yoneda
  • Patent number: 6469564
    Abstract: A circuit simulating the function of a diode in the sense that it conducts current in one direction and blocks current in the opposite direction, but which has a low forward voltage drop. A voltage comparator and a three terminal switch are connected so that the intrinsic reverse diode associated with the switch is harnessed to conduct current in the direction in which it is desired to conduct current and to block current in the direction in which it is desired to block current. A voltage comparator controls the control terminal of the three terminal switch to turn on the switch to conduct current and to interrupt current. Alternate embodiments of voltage comparators are disclosed. The voltage comparator may include charging and discharging transistors so that the switch turns on and off at a high speed. The invention further includes a method of conducting current in one direction and blocking current in a second direction which reduces power losses.
    Type: Grant
    Filed: May 9, 2000
    Date of Patent: October 22, 2002
    Assignee: Minebea Co., Ltd.
    Inventor: Arian M. Jansen
  • Patent number: 6457953
    Abstract: An axial flow fan for cooling electronic components comprising a plurality of blades for cooling electronic components wherein the blades comprise a plurality of specially designed airfoil sections, each section having along substantially the entire length thereof, a cross-sectional shape characterized by a maximum thickness located substantially constantly between about 16% chord to about 23% chord and a maximum camber located substantially constantly between about 40% chord to about 51% chord. The circuitry, housing, and blades are designed so that the axial width of the axial fan is decreased while maintaining performance parameters and design constraints.
    Type: Grant
    Filed: July 24, 2000
    Date of Patent: October 1, 2002
    Assignee: NMB (USA) Inc.
    Inventors: Phillip James Bradbury, Phep Xuan Nguyen, Chalmers R. Jenkins, Jr.
  • Patent number: 6453150
    Abstract: Antenna elements 20 are arranged at intervals “d” greater than &lgr;/2, e.g., 5&lgr;. A signal received by an antenna element 20 is sent by way of an antenna multiplexer 21 to a receiver 23, where the signal is demodulated. The thus-demodulated signal is sent to a phase-and-power detection section 25, where a phase and power of the signal are detected. On the basis of the result of such detection, a control section 26 calculates the phase and power of a transmission signal. On the basis of the result of the calculation, a transmission signal generation circuit 27 transmits a transmission signal to each of the antenna elements 20 by way of the antenna multiplexer 21.
    Type: Grant
    Filed: May 27, 1998
    Date of Patent: September 17, 2002
    Assignee: Kyocera Corporation
    Inventors: Kazuhiro Yamamoto, Muneo Iida
  • Patent number: 6443644
    Abstract: The present invention relates to a spill resistant keyboard including at least one conduit to permit a spilled liquid to drain through the keyboard without damaging the keyboard's electronics. The conduit is positioned along a sloped surface located along a front edge of a recessed area of the keyboard to promote the drainage of the spilled liquid through the conduit. The keyboard also includes water protection walls positioned around certain elongated keys prevent the spilled liquid from entering the body of the keyboard.
    Type: Grant
    Filed: March 17, 2000
    Date of Patent: September 3, 2002
    Assignee: Minebea Co., Ltd.
    Inventors: Toshisada Takeda, Nobuyuki Takahashi
  • Patent number: 6411803
    Abstract: A information fulfillment system and method for providing information to a caller having a wireless communication device. Upon receipt of sensory prompting and manual or automatic input of access codes to the wireless communication device, the caller's identity and the input access code are verified. Thereafter, the call is connected through the PWN and along the PSTN to the system messaging or fulfillment center for automatic or live-operator delivery of the requested information. Automatic verification, connection, and billing modification processes are provided for implementation of the system and method.
    Type: Grant
    Filed: October 18, 1999
    Date of Patent: June 25, 2002
    Assignee: Ewireless, Inc.
    Inventors: James E. Malackowski, Kristi L. Stathis
  • Patent number: 6411172
    Abstract: There is disclosed an oscillator circuit in which the first capacitor is connected between the input side of a CMOS inverter in a quartz oscillator circuit and a higher potential side, the second load capacitor is connected between the input side of the inverter and a lower potential side, the third load capacitor is connected between the output side of the inverter and the higher potential side, and the fourth load capacitor is connected between the output side of the inverter and the lower potential side, so that variation in amplitudes of the voltage sources synchronized with the oscillation can be reduced with the realization of lower current consumption. There is also disclosed an oscillator circuit of reduced circuit scale. A CMOS inverter for producing oscillations, an AC coupling capacitor, and a buffer circuit are formed on one chip. A protective circuit that has been heretofore required at the input terminal portion of the buffer circuit can be dispensed with.
    Type: Grant
    Filed: January 3, 2001
    Date of Patent: June 25, 2002
    Assignee: Nippon Precision Circuits, Inc.
    Inventors: Kunihiko Tsukagoshi, Satoru Miyabe, Kazuhisa Oyama
  • Patent number: 6402269
    Abstract: A decorative cover for a computer monitor made of a pliable material that enables it to be placed over a computer monitor to protect it from hazardous elements. The decorative cover is also in the form of an animal that will enhance the appeal of the computer to a given group of computer users. There is also a conductive material disposed inside of the decorative cover that helps discharge electrostatic charges from the computer monitor when the cover is placed over the monitor and in contact with a ground.
    Type: Grant
    Filed: May 9, 2000
    Date of Patent: June 11, 2002
    Inventor: Ellen Roth
  • Patent number: 6397057
    Abstract: A information fulfillment system and method for providing information to a caller having a wireless communication device. Upon receipt of sensory prompting and manual or automatic input of access codes to the wireless communication device, the caller's identity and the input access code are verified. Thereafter, the call is connected through the PWN and along the PSTN to the system messaging or fulfillment center for automatic or live-operator delivery of the requested information. Automatic verification, connection, and billing modification processes are provided for implementation of the system and method.
    Type: Grant
    Filed: December 24, 1997
    Date of Patent: May 28, 2002
    Assignee: Ewireless, Inc.
    Inventors: James E. Malackowski, Kristi L. Stathis
  • Patent number: 6397379
    Abstract: A method and a computer for execution of the method. As part of executing a stream of instructions, a series of memory loads is issued from a computer CPU to a bus, some directed to well-behaved memory and some directed to non-well-behaved devices in I/O space. Computer addresses are stored of instructions of the stream that issued memory loads to the non-well-behaved memory, the storage form of the recording allowing determination of whether the memory load was to well-behaved memory or not-well-behaved memory without resolution of any memory address stored in the recording.
    Type: Grant
    Filed: October 28, 1999
    Date of Patent: May 28, 2002
    Assignee: ATI International SRL
    Inventors: John S. Yates, Jr., David L. Reese, Korbin S. Van Dyke
  • Patent number: 6373008
    Abstract: A unitized light illuminating type switch in a thinned type and having enhanced click feeling. A movable contact and an electroluminescent sheet are formed in an integrated structure by attachedly pasting together the movable contact and the electroluminescent sheet. Fixed contacts are provided on a switch sheet. A movable contact capable of electrically connecting to the switch sheet by being elastically deformed is arranged above the switch sheet. A flexible electroluminescent sheet A is attachedly pasted to a surface of the movable contact by interposing an insulating member as far as a peripheral portion of the movable contact other than the movable contact.
    Type: Grant
    Filed: March 10, 2000
    Date of Patent: April 16, 2002
    Assignee: Seiko Precision, Inc.
    Inventors: Atsushi Saito, Yasufumi Naoi, Koji Yoneda, Kaori Aoki
  • Patent number: 6360349
    Abstract: A syndrome computing apparatus includes first syndrome computing circuit 2, 4 for receiving a predetermined number of bits of data (codewords) encoded based on a predetermined generator polynomial and performing a syndrome computation on the data inputted based on the generator polynomial. Shift register 1 delays the data by the predetermined number of bits. Second syndrome computing circuit 3, 5 receives the data delayed by the predetermined number of bits, and performs a syndrome computation on the data inputted based on the generator polynomial. Operating circuit 7, 8 vector-adds modulo 2 a first syndrome outputted by said first syndrome computing means to a second syndrome outputted by said second syndrome computing means. Outputs of said operating means 6, 7 are offered as a syndrome based on the generator polynomial.
    Type: Grant
    Filed: May 22, 1998
    Date of Patent: March 19, 2002
    Assignee: Nippon Precision Circuits, Inc.
    Inventor: Hiroyuki Kawanishi
  • Patent number: 6331724
    Abstract: A semiconductor memory cell device exhibiting superior cell reliability comprising a dual layer floating gate wherein the thin upper layer of the floating gate overlaps the edges of surrounding field insulating regions and has rounded edges to minimize leakage concerns. The tunnel dielectric separating the dual layer floating gate from the substrate comprises a layer of uniform thickness which is grown prior to the formation of the field insulating regions. The Fowler-Nordheim tunneling mechanism is used for programming and erasing the inventive cells in a programming process flow which comprises flash programming all cells on a word line, sensing current on a selected cell, and selectively erasing the charge on the cell by applying a higher voltage on the intersecting bit line than is applied to the word line, until the sensed current is as desired.
    Type: Grant
    Filed: December 23, 1997
    Date of Patent: December 18, 2001
    Assignee: Nippon Precision Circuits, Inc.
    Inventors: James T. Chen, Atsuo Yagi
  • Patent number: 6307537
    Abstract: Multifunction key switch in which a multifunction key 6 is fitted into a hole 4 formed in a front case 3 so as to be able to pivotally move in a thicknesswise direction of the front case 3, as well as to enter a plurality of different operation instructions. A hole 8 is formed so as to penetrate through the multifunction key actuation section 6 in the thicknesswise direction of the front case 3. An execution key actuation section 7 is fitted into the hole 8 and determines the operation instruction entered by way of the multifunction key actuation section 6 when being pressed in the thicknesswise direction of the front case 3.
    Type: Grant
    Filed: July 22, 1999
    Date of Patent: October 23, 2001
    Assignee: Kyocera Corporation
    Inventor: Yasuhiko Oowada
  • Patent number: 6292124
    Abstract: A delta-sigma D/A converter has a quantizer, a thermometer code converter portion, and an odd/even bit-interchanging portion. The quantizer produces a first digital signal. The thermometer code converter portion and odd/even bit-interchanging portion divide the output level of the first digital signal such that it is represented by the sum of the output levels of second and third digital signals. Each of the second and third digital signals has an output level obtained by dividing the output level of the first digital signal by a factor of 2 or an integer close to it. During the former half of each sampling interval, first and second adders produce, respectively, a level signal corresponding to the second digital signal and an inverted level signal corresponding to an inversion of the third digital signal.
    Type: Grant
    Filed: February 4, 2000
    Date of Patent: September 18, 2001
    Assignee: Nippon Precision Circuits, Inc.
    Inventors: Yoshihiro Hanada, Akira Toyama