Abstract: The invention is a method of calibrating the sensor system of a wideband direction finder using a noise source. The sensor system includes at least two wideband tuners, and an analog/digital (A/D) converter connected to each wideband tuner. The calibration method involves selecting a common set of center frequencies for each of the wideband tuners. The wideband tuners receive a signal from the noise source on a per data frame basis. The passband of the received signal is then divided into a number of time-sampled data frames. For each time-sampled data frame, both a gain variation and a phase variation are calculated for the noise received at each wideband tuner. Gain and phase differences between the signal received by each wideband tuner within the same frame are compared. Based on the time-sampled data collected, the phase and gain differences for the signals received at the tuners which have not been previously mapped can be determined.

Abstract: A delay compensation circuit for a delay locked loop which includes a main delay line having a fine delay line comprising fine delay elements and a coarse delay line comprising coarse delay elements, the main delay line being controlled by a controller, the delay compensation circuit comprising: an adjustable fine delay for modeling a coarse delay element, a counter for controlling the adjustable fine delay to a value which is substantially the same as that of a coarse delay element, a circuit for applying a representation of the system clock to the delay compensation circuit, and a circuit for applying the fine delay count from the counter to the controller for adjusting the fine delay line of the main delay line to a value which is substantially the same as that of a coarse delay element of the main delay line.

Abstract: In a Java™ environment, a virtual keyboard is provided which is platform independent and which operates without modification to the Java™ applications with which it interacts. The virtual keyboard is integral to an embedded desktop which communicates between the Java™ Virtual Machine and any Java™ applications running on the system. The virtual keyboard comprises a simulated keyboard which is presented to a user on a touch screen and a virtual keyboard manager. The virtual keyboard manager acts as a focus listener for all components generated by the user interface of the applications running on the system. As a user engages components, focus events are tracked by the virtual keyboard manager, so that that the simulated keyboard will always reference the component selected by the user.

Abstract: An arcuate structure for bulk particulate solids which has inner and outer concentric containment walls. The space between the inner and outer walls is subdivided into a plurality of storage subspaces, and covered with a continuous roof. A radial stacker conveyor system receives particulate solids to be stored, and transfers these particulate solids into a selected storage space through access apertures disposed on a circular arc in the roof. To allow the radial stacker to access each roof aperture, it is rotatable about an axis concentric with the inner and outer walls, and the roof apertures are located on an arc concentric with the inner and outer walls. A separate radially located conveyor system is provided beneath the floor of each storage space, by means of which particulate solid stored in any chosen storage subspace can be retrieved through discharge gates located in the floor of each storage space above the conveyor, and transported to a delivery system adjacent to the radial stacker.

Abstract: Shaped bodies containing particulate iron materials, such as cast pellets, briquettes and the like, with sufficient strength to withstand temperatures of up to at least 1000° C. can be obtained by using a fully hydrated high-alumina cement as the binder. The strength of the pellets at elevated temperatures can be further enhanced by adding small amounts of bentonite, silica fume or other suitable supplementary cementing materials, and super plasticizer. The iron particulate materials, typically having a size range of from about 0.01 mm to 6 mm, include ore fines, sinter fines, BOF and EAF dusts, mill scale, and the like. Powdered carbonaceous material, such as ground coal or coke, may also be added to the pellets. The shaped bodies are suitable for use in blast furnaces, basic oxygen furnaces, and in DRI processes.

Abstract: An antenna system consisting of parabolic rectangular reflectors disposed contiguously in a linear array. The use of parabolic rectangular reflectors permits the reflectors to form a larger common rectangular aperture without gaps in illumination. The contiguous array of parabolic rectangular reflectors permits a lower profile which is ideal for use on an aircraft. Each parabolic rectangular reflector has its own feed system and each of the feeds are excited in phase. The combined radiation patterns of the parabolic reflectors produces a beam with a narrow width. This narrow beamwidth permits the system to communicate with one source while filtering out signals coming from other sources. In one embodiment, the antenna system may be mechanically steered in order to communicate with a transmitter and/or receiver whose relative position is continuously varying with respect to the antenna system.

Abstract: A biological activity probe for the detection on-line of the presence of sulphide including an enzyme electrode; a counter electrode; a reference electrode; and if desired a corrosion electrode. The enzyme electrode includes an immobilised source of sulfide oxidase enzyme, together with a cofactor such as 1,1′-dimethylferrocene, immobilised in a water permeable non-conducting binder on a biologically inert electrically conducting substrate. The immobilised source of sulfide oxidase enzyme is either a chemoautotropic microorganism such as a Thiobacillus thioparus, or enzyme material recovered from a culture of a Thiobacillus thioparus.

Abstract: A pentagonal antenna array having a high aperture efficiency and a suitably high overall gain and low antenna noise temperature. The high aperture efficiency of this antenna system provides an overall system capacity suitable for broadband communication services. The antenna array consists of five antenna elements each located at a separate vertex of a pentagon. The antenna elements are helical antennas to provide a narrow antenna beam width. The antenna array itself is supported on a base platter which may be steered to point at a satellite using conventional gimbal ring apparatus. The base platter is a planar reflector to reflect the antenna element radiation in the rear direction and thereby reduce the antenna backlobe levels. The input power and the signal transmitted are fed through a phasing/combining network. The phasing/combining network appropriately divides the signal and the input power and phases the signal, prior to feeding the signal to each of the five antenna elements.

Abstract: An orthopaedic chair including a frame for supporting a contoured chair seat and chair back; each of which is mounted for rotation on a horizontal axis. Horizontal adjustment for the axis of the chair seat and vertical adjustment for the axis of the chair back are provided thereby holding the person in an orthopaedically beneficial position. The orthopaedic chair may be in the form of an arm chair or folding camp chair.

Abstract: A data traffic management system that has the capability of writing data to the buffer memory at twice its normal rate. The data traffic management system uses a pointer structure that can reference either a single or a dual segment memory bank. A dual segment memory bank enhances the write capability of the data traffic management system by allowing two segments to be simultaneously written to both segment memory banks, with one segment being written to each bank. A pointer data structure with a single/dual indicator (S/D indicator) is used for referencing the memory banks. If the S/D indicator has a D entry, then a dual segment memory bank is addressed. The S/D indicator will have an S entry if a single segment memory bank is addressed. Based on the contents of the S/D indicator, either a single fixed size data segment is written to a single memory bank or two fixed size data segments are written to a dual segment memory bank.

Abstract: A set of replacement skates for a scooter. The replacement skates are designed such that each replacement skate can replace a wheel on the scooter. Each replacement skate includes both a skate blade and a support structure. The support structure has two cross-sectional areas. The first cross-sectional sectional area is larger than the second cross-sectional sectional area such that the first cross-sectional area is oriented away from the scooter and the second cross-sectional area is oriented toward the footboard of the scooter. A kit may also be provided with a front end replacement skate and a rear end replacement skate. Both replacement skates have attachment means for fastening the skates to the scooter using the seine pins and fasteners used to attach the wheels.

Abstract: Transport networks are facing new challenges and opportunities because of the explosive growth of data traffic. Besides having to meet the ever increasing bandwidth demand, transport networks need to provide new functionalities for the support of data applications. Novel enhanced transport systems with inherent packet multiplexing to meet these challenges are described. It uses Internet protocols and technologies to implement these packet transport systems, and thereby re-use much of the existing Internet infrastructure already widely deployed.

Abstract: An apparatus is provided for processing large hay bales of approximately 750 kg to produce smaller recompacted manageable units to facilitate shipping in containers. The apparatus provides means for cutting the bales into at least two slabs, preferably three slabs, and means for cutting these slabs into two approximately equal pieces. Means are provided for each piece to be recompressed, strapped and cut again to provide units having an approximate weight of 35 kg.

Abstract: An apparatus for executing a multiple step database lookup procedure, the apparatus including a plurality of processing units, at least two processing units being coupled to a memory containing a database to be looked up, and a plurality of data pipelines which couple the plurality of processing units to each other and to external apparatus, wherein each processing unit executes at least one step in the multiple step database lookup procedure.

Abstract: A ridged feed horn antenna for use in broadband satellite communications. This multi-ridged feed horn operates in a receive band of 10-13 GHz and a transmit band of 14-15 GHz. The ridged feed horn antenna comprises excitation conductors which excite the field between each of the ridges in the feed horn antenna. The excitation conductors are connected to each of the ridges. A waveguide, terminated at the back of the horn antenna, enables the ridges to guide the energy from their respective excitation conductors toward the mouth of the feed horn antenna. A planar balun and matching circuit, located at the back of the horn antenna, may be used to feed each of the excitation conductors. Furthermore, the cross-section of each excitation conductor is chosen so as to optimize horn antenna performance. Each excitation conductor extends outwardly from the back of the horn and is parallel to the longitudinal axes of the horn waveguide.

Abstract: Methods and devices for arranging memory access operations to minimize memory bank conflicts between such operations. A fixed pattern of memory access operations is implemented to minimize the effects of a transition between a read memory access operation and a write memory access operation. A write-read-gap (WRG) set pattern of a write memory access operation followed by a read memory access operation and then followed by a set gap when no memory access operation may be undertaken, meets the particular requirements of RDRAM. Within the WRG pattern, read addresses and write addresses are selected to minimize memory bank access conflicts. Such selections are assisted in increasing the efficiency of the memory access operations by defining a set frame size of a specific number of repetitions of the WRG pattern. All memory access operations are then rearranged to conform to the WRG pattern and, the repetitions of the WRG pattern are divided into frames having a size equal to that of the defined frame size.

Abstract: A method of determining computer network topologies that dramatically reduces the computational complexity and greatly increases the accuracy of connection determination. The method involves classifying ports as either up or down. A source address table is compiled for each port of each data-relay device and each port is classified as either up or down. Up ports connect to other data-relay devices which report source address tables while down ports do not. After the classification, each source address in each up port table is replaced by the source address of the data-relay devices containing the down port whose table contains that source address. The tables of pairs of up ports are compared by intersection and minimal intersection defines the most probable connection for each up port. A variety of methods are used to remove invalid source addresses and the addresses of devices that have moved during the collection of the source address tables.

Abstract: A memory controller controls a buffer which stores the most recently used addresses and associated data, but the data stored in the buffer is only a portion of a row of data (termed row head data) stored in main memory. In a memory access initiated by the CPU, both the buffer and main memory are accessed simultaneously. If the buffer contains the address requested, the buffer immediately begins to provide the associated row head data in a burst to the cache memory. Meanwhile, the same row address is activated in the main memory bank corresponding to the requested address found in the buffer. After the buffer provides the row head data, the remainder of the burst of requested data is provided by the main memory to the CPU.

Abstract: A method of communicating data frames between nodes in a network comprised of one or more end system nodes where each end system node has a unidirectional ingress port and a unidirectional egress port. The method comprises transmitting a data frame from an egress port of one end system node to the ingress port of another end system node, the receiving end system node then determining whether it is the final destination for the data frame. If the receiving end system node is the final destination of the data frame, the receiving end system node absorbs the message. If not, the receiving end system node buffers and then retransmits the data frame through its own egress port. The method provides scalability, low cost, distributed pipeline scheduling, maximum complexity of the network fabric, and maximum speed.

Abstract: A delay line comprised of analog delay elements each having a selectively adjusted coarse and fine delay portion is described. The coarse delay portion receives an input clock signal and generates a ramp signal having a slope based on a predetermined coarse delay setting. The fine delay portion generates a threshold voltage based on a predetermined fine delay setting. A comparator compares the coarse delay ramp signal voltage with the fine delay threshold voltage and generates an output clock signal when the ramp signal voltage surpasses the fine delay threshold voltage. The coarse delay is linearly adjustable based on a 32-bit binary input signal and the fine delay is binary-weight adjusted based on a 5-bit binary input signal. Both the coarse and fine delay portions are controlled by delay line control circuitry which compares a feedback version of the output clock signal with the input clock signal and provides control signals to increment or decrement coarse and fine delay in the delay line.