Patents Represented by Attorney Silicon Edge Law Group LLP
  • Patent number: 7091795
    Abstract: A frequency locked loop in a microcontroller integrated circuit has a precision digital feedback control loop. The frequency locked loop performs a clock multiplication function such that an inexpensive and low frequency external crystal is usable both to clock a processor of the microcontroller with a higher frequency and low-jitter clock signal and to clock a real time clock of the microcontroller with a low frequency time base that is a power of two multiple of one hertz. In one embodiment, the digital feedback control loop includes a ramp generator, a digital filter, and a loop divider. The ramp generator is controlled to output steeper and steeper ramps as the frequency locking process proceeds toward frequency lock. Ramp slope dithering is used to increase resolution. A preset value that presets the loop divider is changed to adjust the phase of a feedback signal with respect to a reference input signal.
    Type: Grant
    Filed: December 16, 2005
    Date of Patent: August 15, 2006
    Assignee: ZiLOG, Inc.
    Inventor: Anatoliy V. Tsyrganovich
  • Patent number: 7089326
    Abstract: A network interface device provides a fast-path that avoids most host TCP and IP protocol processing for most messages. The host retains a fallback slow-path processing capability. In one embodiment, generation of a response to a TCP/IP packet received onto the network interface device is accelerated by determining the TCP and IP source and destination information from the incoming packet, retrieving an appropriate template header, using a finite state machine to fill in the TCP and IP fields in the template header without sequential TCP and IP protocol processing, combining the filled-in template header with a data payload to form a packet, and then outputting the packet from the network interface device by pushing a pointer to the packet onto a transmit queue. A transmit sequencer retrieves the pointer from the transmit queue and causes the corresponding packet to be output from the network interface device.
    Type: Grant
    Filed: May 6, 2002
    Date of Patent: August 8, 2006
    Assignee: Alacritech, Inc.
    Inventors: Laurence B. Boucher, Stephen E. J. Blightman, Peter K. Craft, David A. Higgen, Clive M. Philbrick, Daryl D. Starr
  • Patent number: 7085663
    Abstract: An analog-to-digital converter (ADC) exhibiting an uncorrected non-linear transfer function receives measured analog voltage amplitudes and outputs uncorrected digital values. A calibration circuit receives each uncorrected digital value and outputs a corrected digital value. The measured analog voltage amplitudes received by the ADC and the corresponding corrected digital values output by the calibration circuit define points approximating an ideal linear transfer function of the ADC. The calibration circuit performs piecewise-linear approximation of the uncorrected transfer function and associates each uncorrected digital value with the applicable linear segment that passes through a segment endpoint on the uncorrected transfer function. The calibration circuit calculates each corrected digital value using calibration coefficients associated with the applicable linear segment, such as the slope of the linear segment.
    Type: Grant
    Filed: November 4, 2005
    Date of Patent: August 1, 2006
    Assignee: ZiLOG, Inc.
    Inventor: Anatoliy V. Tsyrganovich
  • Patent number: 7073522
    Abstract: Described are methods, systems, and chemistries for cleaning various components of semiconductor process equipment. A method in accordance with one embodiment cleans articles with differently contaminated interior and exterior surfaces by using those articles to separate a cleaning vessel into separate chambers, one chamber for the interior surface and one for the exterior surface. Different chemistries are then applied to the differently contaminated surfaces. This embodiment reduces the required volume of etchant, and consequently saves the cost, treatment, and disposal of toxic chemicals. One embodiment further reduces the requisite etchant volume using one or more volume-displacement elements that displace some of the etchant volume.
    Type: Grant
    Filed: February 9, 2005
    Date of Patent: July 11, 2006
    Assignee: Quantum Global Technologies, LLC
    Inventor: David S. Zuck
  • Patent number: 7076568
    Abstract: An interface device is connected to a host by an I/O bus and provides hardware and processing mechanisms for accelerating data transfers between a network and a storage unit, while controlling the data transfers by the host. The interface device includes hardware circuitry for processing network packet headers, and can use a dedicated fast-path for data transfer between the network and the storage unit, the fast-path set up by the host. The host CPU and protocol stack avoids protocol processing for data transfer over the fast-path, freeing host bus bandwidth, and the data need not cross the I/O bus, freeing I/O bus bandwidth. Realtime audio and video communication can also be provided when the interface device is coupled by an audio/video interface to appropriate communication devices, such as microphone, a speaker, a camera and/or a display.
    Type: Grant
    Filed: March 9, 2001
    Date of Patent: July 11, 2006
    Assignee: Alacritech, Inc.
    Inventors: Clive M. Philbrick, Laurence B. Boucher, Daryl D. Starr
  • Patent number: 7072415
    Abstract: A system and method are shown for generation of at least one reference voltage level in a bus system. A reference voltage generator on a current driver includes at least one reference voltage level, at least one control signal, and an active device. The active device is coupled to the at least one control signal, such as a current control signal, and a selected reference voltage of the at least one reference voltage level. The active device is arranged to shift the at least one reference voltage level based on the at least one current control signal such as an equalization signal, a crosstalk signal, or the combination thereof, employed on the current driver.
    Type: Grant
    Filed: September 27, 2001
    Date of Patent: July 4, 2006
    Assignee: Rambus Inc.
    Inventors: Jared Zerbe, Carl Werner
  • Patent number: 7071109
    Abstract: Described are methods for fabricating Micro-Electro-Mechanical Systems (MEMS) actuators with hidden combs and hinges. The ability to hide the combs renders the actuators useful in digital micro-mirror devices. Comb actuators provide increased torque, which facilitates the use of stiffer, less fragile hinge structures. Also important, comb actuators do not require mechanical stops to define stable states, and thus avoid problems associated with physical contact. The actuators are infinitely variable through a range of angles.
    Type: Grant
    Filed: April 6, 2005
    Date of Patent: July 4, 2006
    Assignee: Active Optical Networks, Inc.
    Inventors: Vlad J. Novotny, Paren Shah
  • Patent number: 7068197
    Abstract: An improved sigma-delta converter includes a post converter filter portion that receives digital data streams. The post converter filter portion is programmable to receive digital data streams of varying bit widths. The data streams have digital amplitudes and contain quantization noise. Quantization noise is larger for digital amplitudes in a second larger-amplitude range than in a first smaller-amplitude range. The post converter filter has a higher cut-off frequency when the digital amplitude is in the first amplitude range and a lower cut-off frequency when the digital amplitude is in the second amplitude range. The post converter filter therefore filters out a portion of the larger quantization noise when the digital amplitude is larger. Quanitization noise is reduced without limiting the input signal voltage range that can be digitized.
    Type: Grant
    Filed: April 9, 2004
    Date of Patent: June 27, 2006
    Assignee: ZiLOG, Inc.
    Inventor: Anatoliy V. Tsyrganovich
  • Patent number: 7060584
    Abstract: A method of fabricating a high performance capacitor that may be incorporated into a standard CMOS fabrication process suitable for submicron devices is described. The parameters used in the standard CMOS process may be maintained, particularly for the definition and etch of the lower electrode layer. To reduce variation in critical dimension width, an Anti-Reflective Layer (ARL) is used. In the preferred embodiment, this is of the Plasma Enhanced chemical vapor deposition Anti-Reflective Layer (PEARL) type, although other Anti-Reflective Coatings (ARCs) or layers, such as a conductive film like TiN may be employed. This ARL formation occurs after the capacitor specific process steps, but prior to the masking used for defining the lower electrodes. In one embodiment, a Rapid Thermal Oxidation (RTO) is performed subsequent to removing the unwanted capacitor dielectric layer from the transistor poly outside of the capacitor regions, but prior to the PEARL deposition.
    Type: Grant
    Filed: July 12, 1999
    Date of Patent: June 13, 2006
    Assignee: ZiLOG, Inc.
    Inventors: Timothy K. Carns, John L. Horvath, Lee J. DeBruler, Michael J. Westphal
  • Patent number: 7062538
    Abstract: A mail server collects messages from a number of user accounts and presents them to the user from a single location. The user can set the mail server to block unwanted messages and to forward others to various receiving devices, including mobile telephones and pagers. Forwarded messages are automatically reformatted for the receiving device, while a copy of the original message is retained. The retained copy can be viewed later if the user is interested in message content that was not available to the wireless device. The user can also use the wireless device to forward the original message to another receiving device. In the case of forwarding, the saved original message and not the reformatted message is sent to the forwarding address. Some embodiments include an email agent that automatically pushes messages from intranet clients to the mail server through a firewall, thereby enabling the mail server to consolidate messages from intranet and Internet sources.
    Type: Grant
    Filed: August 17, 2004
    Date of Patent: June 13, 2006
    Inventors: Jens U. Horstmann, Ajay H. Giovindarajan, Alan Rothkopf, Tal Dayan, Arie Avnur, Justin M. Kitagawa, Carolyn B. Boyce, Aleksandr M. Schvartsman, Aswath N. Satrasala, Vincent L. Tang
  • Patent number: 7058253
    Abstract: Fiber, lens and sensor arrays and their precision alignment for optical devices with free space light propagation is disclosed. Fabrication methods of arrays and their assembly are also proposed. In one implementation, a device includes a fiber alignment module holding fibers in parallel to form a fiber array. The fiber alignment module includes first and second alignment plates, and a spacer plate engaged between the first and second alignment plates. Each alignment plate includes an array of through holes to respectively hold the fibers. A lens array can be engaged to the fiber alignment module to align lenses to their corresponding fibers. Passive alignment features may be formed at interfacing surfaces of different layers to assist the alignment. Applications of these integrated fiber, lens and sensor arrays to optical cross-connect switches and reconfigurable add-drop multiplexers are also disclosed.
    Type: Grant
    Filed: April 8, 2005
    Date of Patent: June 6, 2006
    Inventor: Vlad J. Novotny
  • Patent number: 7054519
    Abstract: Described are various optical, opto-electrical and electrical components and subsystems. Some embodiments include input and output waveguides supporting opposing facets separated by a gap. The degree to which the opposing facets are aligned with respect to one another controls the light intensity in the output waveguide. An active closed-loop control mechanism dynamically controls the extent of waveguide alignment to maintain a desired output intensity. In other embodiments, the path between opposing facets can be selectively blocked by a micro blade. Still other embodiments combine switching with optical power equalization for ease of integration.
    Type: Grant
    Filed: June 30, 2003
    Date of Patent: May 30, 2006
    Assignee: Active Optical Networks, Inc.
    Inventor: Vlad Novotny
  • Patent number: 7046078
    Abstract: An integrated circuit has one or more components that operate with reference to a distributed reference voltage. A reference voltage driver produces a compensated reference voltage, and the compensated reference voltage is distributed to form the distributed reference voltage at the components. Due to factors such as trace resistance and gate leakage, the distributed reference voltage is degraded relative to the compensated reference voltage. The reference voltage driver is responsive to feedback derived from the distributed reference voltage to adjust the compensated reference voltage so that the distributed reference voltage is approximately equal to a nominal reference voltage.
    Type: Grant
    Filed: May 11, 2005
    Date of Patent: May 16, 2006
    Assignee: Rambus Inc.
    Inventors: Huy M. Nguyen, Benedict C. Lau, Adam Chuen-Huei Chou, Roxanne T. Vu
  • Patent number: 7043599
    Abstract: Described are dynamic memory systems that perform overlapping refresh and data-access (read or write) transactions that minimize the impact of the refresh transaction on memory performance. The memory systems support independent and simultaneous activate and precharge operations directed to different banks. Two sets of address registers enable the system to simultaneously specify different banks for refresh and data-access transactions.
    Type: Grant
    Filed: October 9, 2002
    Date of Patent: May 9, 2006
    Assignee: Rambus Inc.
    Inventors: Frederick A. Ware, Richard E. Perego
  • Patent number: 7042898
    Abstract: A first partial checksum for the header portion of a TCP header is generated on an intelligent network interface card (INIC) before all the data of the data payload of the TCP message has been transferred to the INIC. A pseudopacket with the first partial checksum and the data is assembled in DRAM on the INIC as the data arrives onto the INIC. When the last portion of the data of the data payload is received onto the INIC, a second partial checksum for the data payload is generated. The pseudopacket is read out of DRAM for transfer to a network. While the pseudopacket is being transferred, the second partial header is combined with the first partial header and the resulting final checksum is inserted into the pseudopacket so that a complete TCP packet with a correct checksum is output from the INIC to the network.
    Type: Grant
    Filed: March 9, 2001
    Date of Patent: May 9, 2006
    Assignee: Alacritech, Inc.
    Inventors: Stephen E. J. Blightman, Laurence B. Boucher, Peter K. Craft, David A. Higgen, Clive M. Philbrick, Daryl D. Starr
  • Patent number: 7038543
    Abstract: A data receiver includes group envelope detection circuitry that produces a group envelope voltage. The group envelope voltage represents the average envelope of a plurality of amplified data signals. Associated feedback adjusts the gains applied to each data signal to minimize any difference between the group envelope voltage and a reference voltage. The reference voltage is preferably the envelope of a clock signal associated with the data signals.
    Type: Grant
    Filed: April 2, 2004
    Date of Patent: May 2, 2006
    Assignee: Rambus Inc.
    Inventors: Huey M. Nguyen, Benedict C. Lau, Leung Yu, Jade M. Kizer, Roxanne T. Vu
  • Patent number: 7024470
    Abstract: A system and method automates and simplifies tasks associated with setting up a user self-activating network-based service. A configurable input engine is configured to define the service. The service may, for example, use a plurality of networking devices and/or computing devices. After the service is defined, an offer of the service is published to a user. The offer includes values of commercial terms and/or values of configuration parameters associated with the offer. Upon receiving an acceptance of the offer from the user, the configurable input engine automatically generates activations for the devices to be used by the service. The activations are sent to policy distribution points (PDPs) where the activations are translated into device-specific instructions. The device-specific instructions are in turn sent to the devices (networking devices and/or computing devices) to be configured. The device-specific instructions configure the devices, thereby automatically setting up the service for the user.
    Type: Grant
    Filed: August 5, 2002
    Date of Patent: April 4, 2006
    Assignee: Atreus Systems Corp.
    Inventors: Douglas Bellinger, Richard Burke, Thomas Phillips, Antonino Argentina, Andrea Baptiste, Gaetan Delahousse, Geoff Stewart, Wendy Raoux, Luc Richard, Stephanie Bazin, Scott Brookes, Patrick Rhude
  • Patent number: 7015885
    Abstract: Described are MEMS mirror arrays monolithically integrated with CMOS control electronics. The MEMS arrays include polysilicon or polysilicon-germanium components that are mechanically superior to metals used in other MEMS applications, but that require process temperatures not compatible with conventional CMOS technologies. CMOS circuits used with the polysilicon or polysilicon-germanium MEMS structures use interconnect materials that can withstand the high temperatures used during MEMS fabrication. These interconnect materials include doped polysilicon, polycides, and tungsten metal.
    Type: Grant
    Filed: June 4, 2004
    Date of Patent: March 21, 2006
    Assignee: Active Optical Networks, Inc.
    Inventors: Vlad Novotny, Bharat Sastri, Chitranjan N. Reddy
  • Patent number: 7008073
    Abstract: A plumbing fixture mounted to a sink or other basin has a base region that also serves as a source of visible light, providing a pleasing aesthetic effect. Separate bases for faucet handles and a faucet spout can be illuminated individually or as a group. A faucet spout, trim and/or handle can be made of translucent or transparent material (e.g., acrylic, plastic, glass, crystal, etc.) that captures and redirects light from the base, and may have opaque areas that provide other interesting patterns. The faucet light or lights can also serve as a nightlight for a bathroom or kitchen, saving the space that a separate nightlight would require. In another embodiment a light is provided in a faucet spout, which can illuminate a sink for a pleasing effect, and can also serve as a nightlight. The spout can be translucent, carrying light as well as water from its base.
    Type: Grant
    Filed: December 22, 2003
    Date of Patent: March 7, 2006
    Inventor: Glen Stuhlmacher, II
  • Patent number: 7002415
    Abstract: A frequency locked loop in a microcontroller integrated circuit has a precision digital feedback control loop. The frequency locked loop performs a clock multiplication function such that an inexpensive and low frequency external crystal is usable to both clock a processor of the microcontroller with a higher frequency and low-jitter clock signal and to clock a real time clock of the microcontroller with a low frequency time base that is a power of two multiple of one hertz. In one embodiment, the digital feedback control loop includes a ramp generator, a digital filter, and a loop divider. The ramp generator is controlled to output steeper and steeper ramps as the frequency locking process proceeds toward frequency lock. A preset value that presets the loop divider is changed to adjust the phase of a feedback signal with respect to a reference input signal.
    Type: Grant
    Filed: October 21, 2003
    Date of Patent: February 21, 2006
    Assignee: ZiLOG, Inc.
    Inventor: Anatoliy V. Tsyrganovich