Abstract: Exemplary implementations of electrical circuits and systems are disclosed, and methods for signal processing including sampling and quantizing of amplitude and band limited signals implemented through a Passive Pulse Modulation Analog to Digital Converter (PMADC).

Abstract: Some embodiments discussed relate to an apparatus comprising a power amplifier module. The power amplifier module includes a plurality of sensors, and a first digital communication port configured to provide a monitor signal from at least one of the plurality of sensors. The apparatus includes a transceiver module coupled to provide an signal to an input of the power amplifier the transceiver module including a second digital communication port configured to receive the monitor signal from the first digital communication port, a processing unit configured to generate at least one of a bias control signal and a back-off signal dependent upon the monitor signal, and a power controller to receive the at least one of bias control signal and the back-off signal and provide at least one further input signal to the power amplifier based on at least one of the bias control signal and the back-off signal.

Abstract: A semiconductor device in one embodiment has a first connection region, a second connection region and a semiconductor volume arranged between the first and second connection regions. Provision is made, within the semiconductor volume, in the vicinity of the second connection region, of a field stop zone for spatially delimiting a space charge zone that can be formed in the semiconductor volume, and of an anode region adjoining the first connection region. The dopant concentration profile within the semiconductor volume is configured such that the integral of the ionized dopant charge over the semiconductor volume, proceeding from an interface of the anode region which faces the second connection region, in the direction of the second connection region, reaches a quantity of charge corresponding to the breakdown charge of the semiconductor device only near the interface of the field stop zone which faces the second connection region.

Abstract: An impedance transformation circuit utilizes two transistor circuits.

Abstract: In a method for transmitting data of various traffic types an xDSL modem is utilized. Detectors are used to detect the traffic types of the data which are to be transmitted and the detected traffic types are taken as a basis for dynamically adjusting a data transmission rate for the xDSL modem.

Abstract: The present disclosure relates to a class AB amplifier output stage.

Abstract: A method and a device are disclosed for processing data packets which comprise real-time data packets. The data packets are classified first by a co-processor unit into at least one first data packet type comprising real-time data packets, and a second data packet type. The data packets of the first data packet type are processed via a first data path with a further co-processor unit while the data packets of the second data packet type are processed via a second data path which comprises a main processor unit. Thus real-time data packets are processed without using the main processor unit.

Abstract: An apparatus and method for reducing error in converting a multi-bit signal to a single bit signal. An analog delta-sigma modulator receives an analog signal and converts it to a multi-bit digital signal that is provided to a digital delta-sigma modulator. The digital delta-sigma modulator introduces error by converting the multi-bit signal to a single-bit signal. The error from the conversion is fed back to the analog delta-sigma modulator which incorporates the error information into the analog signal before it is converted to a multi-bit digital signal.

Abstract: This disclosure relates to techniques and architecture for summing, sampling, and converting signals associated with a capacitive feedforward filter using a quantizer.

Abstract: A polar modulator including a signal converter configured to provide a phase signal and an amplitude signal based on at least one received signal is disclosed. A digital-to-analog converter is coupled to the signal converter, the digital-to-analog converter configured to receive an augmented signal, wherein a polarity of the augmented signal is selected to minimize an absolute phase change for sequential signals. A signal mixer is coupled to the digital-to-analog converter to receive an analog signal generated from the augmented signal.

Abstract: This disclosure relates to a compensating for nonlinearity resulting from a capacitance feedback in current cells of a single ended digital to analog circuit.

Abstract: The method is based on the capability for coordination of the radio activities of two mobile radio transmitting and/or receiving devices. In the case of the method, a value of at least one characteristic variable is first of all determined, which is characteristic of the requirement for coordination of the radio activity of one or both transmitting and/or receiving devices. The coordination of the radio activity of one or both transmitting and/or receiving devices is then activated or deactivated as a function of the value.

Abstract: A method for calculating zero-crossing reference sequences ({ti}) for the data detection of a sequence of zero crossings ({{circumflex over (t)}i}) of a received signal is disclosed. The data detection is determined in a receiver, wherein the received signal is based on a data symbol sequence ({dk}) angle-modulated at a transmitter and transmitted to the receiver. The zero-crossing reference sequences ({ti}) are calculated in accordance with an equation specifying an output of a finite state machine that describes, at least approximately, the signal generation in the transmitter.

Abstract: Disclosed herein are devices, methods, and techniques including analog to digital converters having at least one digital filter.

Abstract: Described herein is a system and method of emulating characteristics of an output signal of a first analog-to-digital converter by a second analog-to-digital converter employing signal processing. A signal processing module may receive a digital signal from the first analog-to-digital converter and alter the digital signal to define an altered digital signal such that the altered digital signal emulates a second digital signal that is characteristic of the second analog-to-digital converter, the second analog-to-digital converter differing from the first analog-to-digital converter.

Abstract: This disclosure relates to maintaining constant gain within multi-stage amplifiers.

Abstract: A modulator includes a first converter, a second converter and a mixer. The first converter is configured to receive a first bit and provide a first current that is a function of the first bit. The second converter is configured to receive a second bit and provide a second current that is a function of the second bit. The mixer is configured to receive an input current that is a sum of the first current and the second current and a frequency signal and provide an output signal that is a function of the input current and the frequency signal.

Abstract: A method and a device for reducing the crest factor of a signal is operable to generate a correction signal as a combination of a plurality of partial correction signals having respectively predetermined frequencies and a signal having a reduced crest factor being issued as a differential between the correction signal and the signal. The respectively predetermined frequencies are selected such that the correction signal, which has a period length that is shorter than a length of the signal, is periodic. Therefore, according to the invention, only one period of the correction signal is determined and the correction signal is then determined as a periodic continuation of the one period.

Abstract: An amplifier assembly and also a receiver including such an amplifier assembly is disclosed, wherein the amplifier includes a programming input for setting the gain thereof. The signal level at the output of the amplifier is compared with a reference level and a counter is incremented in a step-by-step fashion such that the gain in the amplifier is reduced for as long as the output level lies above the reference level. The amplifier assembly enables frequency-dependent received field strength fluctuations that occur in frequency hopping methods to be corrected in a manner dependent on the conditions in the current time slot. The assembly is also suitable for modulation methods that use a modulation with phase and amplitude variation.

Abstract: Implementations are presented herein that include a level shifter circuit.