Patents Represented by Attorney Stattler-Suh PC
  • Patent number: 7680746
    Abstract: Methods for predicting the click-through rates of Internet advertisements placed into web pages are disclosed. Specifically, a click-through rate prediction is generating using a hybrid system with two terms. The first term is constructed using a machine learning model that incorporates a limited number of important factors. The second term is constructed using a look-up table that is built using a complex statistical analysis of various web page and advertisement combinations. To construct the second term, the field of multi-level hierarchical modeling is used. Specifically, a tree-structured Markov model is used to process the training data and construct the adjustment factor look-up table. To reduce the complexity of the statistical analysis, Kalman-filters are used to estimate parameters in the traditional multi-level hierarchical models for scalability.
    Type: Grant
    Filed: May 23, 2007
    Date of Patent: March 16, 2010
    Assignee: Yahoo! Inc.
    Inventor: Deepak Agarwal
  • Patent number: 7679345
    Abstract: A digital linear voltage regulator includes a comparator, a finite state machine, and a current digital-to-analog converter (DAC). The comparator is preferably coupled to receive a reference voltage and an operating voltage supplied to a dynamic load. The comparator generates, during a clock cycle, a binary output based on a comparison between reference and operating voltages. The finite state machine (FSM) is coupled to receive at least one control signal that indicates a target operating state for the digital linear voltage regulator. The FSM receives the binary output from the comparator and generates a digital word, during a clock cycle, based on the target operating state of the digital linear voltage regulator and on the binary output. The current DAC is coupled to the FSM, receives the digital word and delivers current at the desired voltage to the dynamic load.
    Type: Grant
    Filed: October 9, 2007
    Date of Patent: March 16, 2010
    Assignee: NetLogic Microsystems, Inc.
    Inventors: Shwetabh Verma, Marc Loinaz
  • Patent number: 7629725
    Abstract: A micromachined actuator including a body or platform mounted to a suspension system anchored to a substrate. In one embodiment, the suspension system is comprised of a set of one or more spring flexures connecting the actuator body to the substrate with strain relief provided via connecting torsional elements. In another embodiment, the suspension system includes a first set of one or more spring flexures each with one end anchored to a largely rigid intermediate frame and the other end attached to the body. A second set of one or more flexures is attached between the intermediate frame and the substrate. A third actuator embodiment maximizes force electrode area to minimize voltage required for electrostatic actuation. A fourth embodiment provides electrical interconnect to an actuator or an actuator array using polysilicon with silicon nitride isolation.
    Type: Grant
    Filed: April 1, 2005
    Date of Patent: December 8, 2009
    Assignee: Iris AO, Inc.
    Inventors: Clifford F. Knollenberg, Michael Albert Helmbrecht
  • Patent number: 7590616
    Abstract: Methods and apparatus for a recommendation system based on collaborative filtering is provided. Explicit and implicit ratings of items by network users are used to create a contextual model. The explicit ratings comprise different rating types regarding different item attributes. The implicit ratings comprise different rating types derived from different user events and may include recency, intensity, or frequency ratings. The contextual model may be optimized for a specific objective function, such as click-through-rate or conversion rate. In other embodiments, item information is used to produce a content model where item information for an item is encoded as metadata into a document that represents the item. The contextual or content model is used to recommend one or more items to a current user. The basic unit of the recommendation system may be an item set of two or more items or a particular sequence of two or more items.
    Type: Grant
    Filed: November 17, 2006
    Date of Patent: September 15, 2009
    Assignee: Yahoo! Inc.
    Inventors: Wei Guan, Christina Yip Chung, Long-Ji Lin
  • Patent number: 7584171
    Abstract: Methods and apparatus for a recommendation system based on collaborative filtering is provided. Explicit and implicit ratings of items by network users are used to create a contextual model. The explicit ratings comprise different rating types regarding different item attributes. The implicit ratings comprise different rating types derived from different user events and may include recency, intensity, or frequency ratings. The contextual model may be optimized for a specific objective function, such as click-through-rate or conversion rate. In other embodiments, item information is used to produce a content model where item information for an item is encoded as metadata into a document that represents the item. The contextual or content model is used to recommend one or more items to a current user. The basic unit of the recommendation system may be an item set of two or more items or a particular sequence of two or more items.
    Type: Grant
    Filed: November 17, 2006
    Date of Patent: September 1, 2009
    Assignee: Yahoo! Inc.
    Inventors: Wei Guan, Christina Yip Chung, Long-Ji Lin
  • Patent number: 7581193
    Abstract: A system and method to facilitate interactive selection and presentation of datasets are described. An interactive data interface is presented to a user in a display window, said interactive data interface containing distribution of a dataset accessed by the user. A minimum range value and a maximum range value corresponding to a data range within the dataset are received, the range values being input by the user into one or more interactive areas within the data interface. Finally, display of data within the data range is further facilitated within an overlay area of the data interface disposed over the distribution of the dataset.
    Type: Grant
    Filed: December 15, 2006
    Date of Patent: August 25, 2009
    Assignee: Yahoo! Inc.
    Inventors: Joshua M. Koran, Glen Anthony Ames
  • Patent number: 7575649
    Abstract: A label structure and a method for obtaining the label structure are described. A self-adhesive web of material continuously advances at a predetermined speed along a path between an ultrasonic horn assembly and a rotary anvil, the self-adhesive web of material of a type originally used for the obtaining of labels or other self-adhesive products. The ultrasonic horn assembly is further activated to move along its vertical axis and further transmits ultrasound wave signals when contacting the web of material.
    Type: Grant
    Filed: June 21, 2006
    Date of Patent: August 18, 2009
    Inventor: Jeffrey Arippol
  • Patent number: 7574422
    Abstract: Methods and apparatus for a recommendation system based on collaborative filtering is provided. Explicit and implicit ratings of items by network users are used to create a contextual model. The explicit ratings comprise different rating types regarding different item attributes. The implicit ratings comprise different rating types derived from different user events and may include recency, intensity, or frequency ratings. The contextual model may be optimized for a specific objective function, such as click-through-rate or conversion rate. In other embodiments, item information is used to produce a content model where item information for an item is encoded as metadata into a document that represents the item. The contextual or content model is used to recommend one or more items to a current user. The basic unit of the recommendation system may be an item set of two or more items or a particular sequence of two or more items.
    Type: Grant
    Filed: November 17, 2006
    Date of Patent: August 11, 2009
    Assignee: Yahoo! Inc.
    Inventors: Wei Guan, Christina Yip Chung, Long-Ji Lin
  • Patent number: 7532697
    Abstract: A receiver circuit reduces the need for external clock sources such as crystal oscillators. The receiver circuit makes use of only a single source, the data input, for performing clock and data recovery. A clock and data recovery circuit receives data and at least one reference clock. The clock and data recovery circuit recovers the clock for the input data using the data input and a reference clock. A clean-up phase lock loop circuit reduces jitter in the recovered clock. The recovered clock from the clock and data recovery circuit is input to the clean-up phase lock loop to produce a clean clock. The clean clock is feed into a clock reference circuit. The clock reference circuit generates the reference clock for the clock and data recovery circuit. As such, the reference clock is based on feed back from the recovered clock.
    Type: Grant
    Filed: January 27, 2005
    Date of Patent: May 12, 2009
    Assignee: Net Logic Microsystems, Inc.
    Inventors: Stefanos Sidiropoulos, Marc J. Loinaz
  • Patent number: 7512575
    Abstract: A terminological system automates the integration of terminological information into a built-in knowledge base. Input terminology information, which includes input terms and information that specifies relationships among at least two of the input terms, is input to the terminological system. The terminological system parses the input terminology information to generate a logical structure that depicts relationships among the input terms in a format compatible with the built-in knowledge base. Either an independent ontology, comprising the logical structure, is generated, or the knowledge base is extended by logically coupling the logical structure to a node that matches the input term. The terminological system also resolves conflicts if an input term that matches a terminological node in the knowledge base connotes a different meaning than the terminological node.
    Type: Grant
    Filed: November 24, 2003
    Date of Patent: March 31, 2009
    Assignee: Oracle International Corporation
    Inventor: Kavi Mahesh
  • Patent number: 7473955
    Abstract: A fabricated cylinder capacitor having two or more layers is provided, each layer having a bottom plate and top plate portions. A first set of vias connect the bottom plate portions and a second set of vias connect the top plate portions. The bottom plate portions and the first set of vias comprise a bottom plate and the top plate portions and the second set of vias comprise a top plate of the capacitor. The layers may comprise five metal layers and may be produced using semiconductor fabrication methods. Also provided is a capacitor array having two or more cylinder capacitors where a set of connectors connect all top plates of the capacitors. The capacitor array may be used in a capacitive DAC, the capacitors being connected according to the architecture of the DAC. The capacitive DAC may be used in a SAR ADC.
    Type: Grant
    Filed: March 7, 2006
    Date of Patent: January 6, 2009
    Assignee: Alvand Technologies, Inc.
    Inventors: Mehrdad Heshami, Mansour Keramat
  • Patent number: 7461051
    Abstract: Information regarding the structure of information in a content database is maintained in a structure database. The structure database is used to correlate the data structure of a query to the structure of the content database, in order to determine that information in the content database which needs to be provided to a searcher in response to the query. In one embodiment, this search method is used in an online forum, and the forum maintains a reputation score for users with respect to given subject matter. The reputation score is dependent upon the quality of a user's participation in the forum. A user's reputation score depends upon the evaluation by others of information he posts and upon the user evaluating information posted by others.
    Type: Grant
    Filed: November 10, 2003
    Date of Patent: December 2, 2008
    Assignee: Transparensee Systems, Inc.
    Inventor: Steven David Lavine
  • Patent number: 7456462
    Abstract: A layered capacitor having top and bottom plates formed from multiple layers. The capacitor has a bottom layer comprising a bottom plate portion and at least one upper layer, each upper layer comprising top and bottom plate portions. A first set of vias connect the bottom plate portions and a second set of vias connect the top plate portions. The bottom plate portions and the first set of vias comprise a U-shaped bottom plate and the top plate portions and the second set of vias comprise a top plate of the capacitor device. The layers may comprise metal layers produced using semiconductor fabrication methods. Also provided is a capacitor array having two or more capacitors where connectors connect all top plate portions of the capacitors. The capacitor array may be used in a capacitive DAC, which may be used in a SAR ADC.
    Type: Grant
    Filed: March 7, 2006
    Date of Patent: November 25, 2008
    Assignee: Alvand Technologies, Inc.
    Inventors: Mehrdad Heshami, Mansour Keramat
  • Patent number: 7457511
    Abstract: A networked personal video recording (“PVR”) system couples a plurality of clients to one or more PVR media servers over a network. One or more PVR media servers include television tuners to tune television signals. A storage medium buffers the television signals to implement PVR functionality. For example, the PVR media server records television programs for clients. Clients are assigned to television tuners, and the clients display television programs received at the assigned tuner. The network transfers the buffered television signals to the clients.
    Type: Grant
    Filed: July 2, 2003
    Date of Patent: November 25, 2008
    Assignee: Macrovision Corporation
    Inventors: Daniel Putterman, Brad Dietrich, Jeremy Toeman, Pedro Freitas, Ludovic Legrand, Shawn McCaffrey, James Grimm, Lijia Jin, Paul Novaes
  • Patent number: 7454120
    Abstract: A networked personal video recording (“PVR”) system couples a plurality of clients to one or more PVR media servers over a network. One or more PVR media servers include television tuners to tune television signals. A storage medium buffers the television signals to implement PVR functionality. For example, the PVR media server records television programs for clients. Clients are assigned to television tuners, and the clients display television programs received at the assigned tuner. The network transfers the buffered television signals to the clients.
    Type: Grant
    Filed: July 2, 2003
    Date of Patent: November 18, 2008
    Assignee: Macrovision Corporation
    Inventors: Daniel Putterman, Brad Dietrich, Jeremy Toeman, Pedro Freitas, Ludovic Legrand, Shawn McCaffrey, James Grimm, Lijia Jin, Paul Novaes
  • Patent number: 7446631
    Abstract: A filter circuit topology for filtering a radio frequency input signal includes one or more inductor devices, such as, for example, discrete chip or air coils. The inductor devices are center tapped into a capacitor coupled to the ground. The center-tapped inductor configuration splits the output voltage across the inductor devices into two equal voltages of predetermined amplitude determined by the quality factor of the filter circuit. The filter circuit further includes an input capacitor to receive the RF input signal and an output capacitor coupled respectively to the inductor devices, the output capacitor having a variable capacitance, the inductor devices and the variable capacitor forming an inductive-capacitive (LC) filter capable of filtering the RF input signal and generating an output filtered signal for further transmission to a television tuner.
    Type: Grant
    Filed: March 10, 2006
    Date of Patent: November 4, 2008
    Assignee: RF Stream Corporation
    Inventors: Takatsugu Kamata, Kazunori Okui
  • Patent number: 7446365
    Abstract: A fabricated layered capacitor having three layers is provided. The first bottom layer comprises a first bottom plate portion, the second middle layer comprises a first top plate portion, and the third top layer comprises a second bottom plate portion of the layered capacitor. A set of vias connects the first and second bottom plate portions. The top plate portion may extend past the bottom plate portions. The layered capacitor may have a different number of layers (e.g., five layers). The layers may comprise metal layers produced using semiconductor fabrication methods. Also provided is a capacitor array having two or more layered capacitors where connectors connect all top plate portions of the capacitors. The capacitor array may be used in a capacitive DAC, the capacitors being connected according to the architecture of the DAC. The capacitive DAC may be used in a SAR ADC.
    Type: Grant
    Filed: March 7, 2006
    Date of Patent: November 4, 2008
    Assignee: Alvand Technologies, Inc.
    Inventors: Mehrdad Heshami, Mansour Keramat
  • Patent number: 7443215
    Abstract: A frequency synthesis circuit includes a phase locked loop and an interpolator circuit. The phase locked loop circuit receives a reference clock and a feedback clock and generates an output clock with a frequency based on the reference clock and the feedback clock. An interpolator circuit is coupled in the feedback path of the phase locked loop circuit. An interpolator control circuit generates an interpolator control word that specifies a variable time delay for the interpolator circuit. The interpolator circuit receives the output clock, and generates the feedback clock by introducing a variable time delay in the output clock in accordance with the interpolator control word. The time variable delay varies the frequency of the output circuit. Embodiments for frequency synthesis circuits that include a spread spectrum frequency clock generator, frequency modulators, and a fixed frequency clock generator circuit are disclosed.
    Type: Grant
    Filed: November 9, 2007
    Date of Patent: October 28, 2008
    Assignee: NetLogic Microsystems, Inc.
    Inventor: Stefanos Sidiropoulos
  • Patent number: 7436229
    Abstract: A frequency synthesis circuit includes a phase locked loop and an interpolator circuit. The phase locked loop circuit receives a reference clock and a feedback clock and generates an output clock with a frequency based on the reference clock and the feedback clock. An interpolator circuit is coupled in the feedback path of the phase locked loop circuit. An interpolator control circuit generates an interpolator control word that specifies a variable time delay for the interpolator circuit. The interpolator circuit receives the output clock, and generates the feedback clock by introducing a variable time delay in the output clock in accordance with the interpolator control word. The time variable delay varies the frequency of the output circuit. Embodiments for frequency synthesis circuits that include a spread spectrum frequency clock generator, frequency modulators, and a fixed frequency clock generator circuit are disclosed.
    Type: Grant
    Filed: September 26, 2007
    Date of Patent: October 14, 2008
    Assignee: Net Logic Microsystems, Inc.
    Inventors: Stefanos Sidiropoulos, Marc Loinaz, R. Shekhar Narayanaswami, Nikhil Acharya, Dean Liu
  • Patent number: 7432750
    Abstract: A frequency synthesis circuit includes a phase locked loop and an interpolator circuit. The phase locked loop circuit receives a reference clock and a feedback clock and generates an output clock with a frequency based on the reference clock and the feedback clock. An interpolator circuit is coupled in the feedback path of the phase locked loop circuit. An interpolator control circuit generates an interpolator control word that specifies a variable time delay for the interpolator circuit. The interpolator circuit receives the output clock, and generates the feedback clock by introducing a variable time delay in the output clock in accordance with the interpolator control word. The time variable delay varies the frequency of the output circuit. Embodiments for frequency synthesis circuits that include a spread spectrum frequency clock generator, frequency modulators, and a fixed frequency clock generator circuit are disclosed.
    Type: Grant
    Filed: December 7, 2005
    Date of Patent: October 7, 2008
    Assignee: NetLogic Microsystems, Inc.
    Inventors: Stefanos Sidiropoulos, Marc Loinaz, R. Shekhar Narayanaswami, Nikhil Acharya, Dean Liu