Abstract: A generic process for combining the support of multiple formats and protocols (FAPs) for simultaneous communication between a controller and an attached device over the same port is described. The transmission medium between the two units is a two-wire type cable, i.e., twisted pair, coaxial, etc., generically referred to as "Coax". The controller and the attached device each support their own collection of Coax FAPs, which may or may not be different. In accordance with the process, information is exchanged between the controller and the device identifying the particular Coax FAPs each respective unit supports and a set of Coax FAPs common to the controller and the device is identified. A communication buffer common to the controller and the device is configured for supporting the set of common Coax FAPs. Each Coax FAP may be independently enabled or disabled.

Abstract: A processor-based packet memory interface for controlling the transfer of data between multiple communications channels and packet memory in a communications adapter is presented, where the communications adapter uses requestor IDs to identify transmit and receive processes. The processor-based packet memory interface is controlled by a microprocessor configured to perform read and write operations with the communications adapter. The microprocessor is further configured to reserve a plurality of blocks of memory in the packet memory so that the number of communications channels that can be supported is not limited to the number of requestor ID's that can be handled by the communications adapter. The processor-based packet memory interface also includes RAM, for use by the microprocessor, to store pointers to reserved blocks of memory in the packet memory and to temporarily store packet data for transfer between the communications channels and the communications adapter.

Abstract: In an ISDN communications system, a remote station power detector circuit comprises a capacitor connected between center taps of transformers on the receive and transmit pairs of conductors. The capacitor stores energy delivered from a central DC power source. Two serially-connected opto-couplers form a discharge path for the capacitor. The first opto-coupler is periodically driven on to partially complete the discharge path. If the capacitor charge exceeds a predetermined minimum, the second opto-coupler will then be driven on, providing a logic level output usable by the remote station. Power consumption is minimized by the use of large resistors in series with the capacitor while reliable power detection is achieved by detecting accumulated charge on the capacitor. Dielectric isolation is provided through the use of opto-coupler circuits.

Abstract: A method and an apparatus allows multiple users to share one or more data communication lines without requiring the users to actively participate in the arbitration. The preferred embodiment comprises an ISDN Port Connection Manager (PCM) for managing the use of each of the individual channels of one or more line ports having ISDN service thereon. The ISDN PCM manages the use of the channels between applications using such distinct access methods as IBM's Virtual Telecommunications Access Method (VTAM), TCP/IP, and Open Systems Interconnect (OSI) access methods. The ISDN PCM determines that an application needs access to an ISDN channel, determines the availability of the ISDN network and sets up the communication between the application and the network if the channel is available. If no channel is available at that time, the ISDN PCM indicates to the application when the channel becomes available so that the application may determine whether it still needs access.

Abstract: A method and an apparatus decodes the address of a selected destination user in a time-distributed manner thereby allowing a faster bus cycle and providing earlier error detection. The method and system of the present invention provides for the distribution of the address decoding over two bus cycles, rather than one, so that a faster bus cycle is allowed. In addition, the present invention provides address decode circuitry within the bus arbitrator/controller so that address decoding and error detection can be performed in parallel with bus arbitration.

Abstract: A network controller for dynamically rearranging a LAN to guarantee bandwidth required for multimedia communications comprises a switch for being connected to the transmit and receive ports of each LAN station and a switch controller. The switch comprises an internal switching fabric such that any receive port can be connected to any transmit port of any of the stations. The switch controller, which is connected to the primary LAN, controls the switch so that the LAN may be dynamically reconfigured when, for instance, a LAN node wishes to establish a private session with another LAN node. The request from the node to the controller is sent in a packet being passed around the primary ring. After the data transfer is complete between the two stations and they wish to re-enter the primary ring, one of the stations issues a request to the network controller to reconfigure the network. The request is made by applying a DC voltage to one of the node's receive or transmit line pairs.

Abstract: The interface subsystem comprises a universal interface card or unit for use with any of a plurality of electrical interface standards, for example, EIA-232-D, and CCITT Recommendations V.35 and X.21. The interface subsystem further comprises a cable selected from a set of cables for use with the particular standard being utilized. The particular cable has preconditioning means so that the signals conforming to the corresponding interface standard are within a voltage-level window suitable for the universal interface unit for processing. The universal interface unit comprises an input/output port for receiving the preconditioned signals having common pins among the interface standards. The preconditioned signals are routed to one or more receivers for converting the signals to TTL level for processing by a communications processor.

Abstract: A terminal adapter interfaces between a Data Terminating Equipment (DTE) and either a Frame Relay or a Switched Multimegabit Data Service (SMDS) telecommunications network so that the type of network over which the DTE is communicating is transparent to the DTE. The terminal adapter performs mapping from one protocol to another so that a native frame relay DTE can access an SMDS network and so that a native SMDS DTE can access a frame relay network. The address mapping method performed by the terminal adapter uses a parallel table look-up technique which reduces the chance of collision (when two or more addresses hash into the same table entry), eliminates the traditional comparison function to detect a collision, and eliminates the traditional pointer technique when a collision occurs.

Abstract: A connector socket may receive either a plain old telephone service (POTS) connector plug or an Integrated Services Digital Network (ISDN) Basic Rate connector plug. The connector socket comprises a body having a plug-receiving chamber for receiving either a POTS or an ISDN connector plug. The chamber has eight contact terminals are disposed along a top side for providing connectivity to the corresponding eight contact terminals of the ISDN connector plug when inserted within the chamber. Likewise, six contact terminals are disposed along a bottom side of the chamber for providing connectivity to the corresponding two, four or six contact terminals of the POTS connector plug when inserted within the chamber. The chamber further has a POTS plug guide for guiding and locking the POTS plug in the chamber and an ISDN plug guide for guiding and locking the ISDN plug in the chamber.

Abstract: A connector/cable identification system comprises a plug having an extension and a female housing having at least two pairs of optical emitter/sensors. Each emitter/sensor pair detects whether the extension is therebetween. Because different extensions have different lengths or aperture configurations, the type of connector (and thus associated cable) can be determined. Voltage isolation between the cable (i.e., a common carrier transmission line) and the apparatus receiving the cable (i.e., a personal computer) is maintained by physically separating the transmission circuitry from the identification circuitry.

Abstract: An interface circuit for connecting an electrical half-duplex system to an optical simplex system includes logic which permits keep-alive signals to be gated onto the transmitting simplex fiber when data is not being received on the half-duplex conductor. The interface circuit includes receive logic connected in parallel with the receive data path. The receive logic responds to predetermined bit patterns in the received data to control the receive and transmit data path connections. The interface circuit also includes transmit logic connected in parallel with the transmit data path. The transmit logic responds to bit patterns in the data on the transmit data path to selectively gate the output of a keep-alive oscillator onto the transmit simplex fiber.