Patents Represented by Attorney Steven Chiu
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Patent number: 7870422Abstract: An apparatus and method is provided in which a server causes a client to back up a part of resource data of a server by use of an HTTP protocol. The method includes the steps of: transmitting the resource data to be backed-up to the client; determining whether or not the recovery of the resource data to be backed-up is required; transmitting, to the client, an HTTP response having a message that indicates the necessity of recovering the resource data to be backed-up, together with a message indicating that there is no update in the resource data to be backed-up, in response to the determination that indicates the necessity of recovering the resource data to be backed-up; and recovering the resource data to be backed-up by receiving a backup of the resource data to be backed-up from the client. The method of the present invention facilitates the processing of backing up, in the client, the resource data of the server and recovering the data when the resource data of the server is lost.Type: GrantFiled: December 12, 2007Date of Patent: January 11, 2011Assignee: International Business Machines CorporationInventors: Ryoh Neyama, Toshiro Takase, Michiaki Tatsubori
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Patent number: 7843919Abstract: A method of Ethernet virtualization using network packet alteration. The method comprises receiving network packets from a host destined for transmission over a network, checking whether the network packets have headers, if the packets do not have headers, forming a first portion of the header using firmware, storing the formed packet and header to a first memory; and forming a second portion of the header using programmable logic.Type: GrantFiled: March 20, 2008Date of Patent: November 30, 2010Assignee: International Business Machines CorporationInventors: Michael J. Cadigan, Jr., Joel Goldman, Howard M. Haynie, Bruce H. Ratcliff, Jeffrey M. Turner
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Patent number: 7840622Abstract: Method to convert a hexadecimal floating point number (H) into a binary floating point number by using a Floating Point Unit (FPU) with fused multiply add with an A-register a B-register for two multiplicand operands and a C-register for an addend operand, wherein a leading zero counting unit (LZC) is associated to the addend C-register, wherein the difference of the leading zero result provided by the LZC and the input exponent (E) is calculated by a control unit and determines based on the Raw-Result-Exponent a force signal (F) with special conditions like ‘Exponent Overflow’, ‘Exponent Underflow’, and ‘Zero Result’.Type: GrantFiled: July 20, 2006Date of Patent: November 23, 2010Assignee: International Business Machines CorporationInventors: Guenter Gerwig, Klaus Michael Kroener
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Patent number: 7836198Abstract: A method of Ethernet virtualization using hardware control flow override. The method comprises providing, at a first logical entity of a first programmable logic device, control signals used for performing control-flow, selectively routing the control signals to a second programmable logic device that is external to the first programmable logic device, receiving processed control signals from the second programmable logic device, and forwarding the processed control signals to a second logic entity of the first programmable logic device.Type: GrantFiled: March 20, 2008Date of Patent: November 16, 2010Assignee: International Business Machines CorporationInventors: Michael J. Cadigan, Jr., Howard M. Haynie, Jeffrey M. Turner
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Patent number: 7826745Abstract: A method and apparatus for transmitting signals from a plurality of input channels over a TDM optical network, where each of the input channels contains an optical data signal and an electrical control signal containing control information relating to the optical data signal. In accordance with the invention, respective optical receivers convert the optical data signals to respective electrical data signals, which a TDM data multiplexer time-multiplexes to generate a multiplexed data signal. A TDM control signal multiplexer time-multiplexes the electrical control signals to generate a multiplexed control signal that is combined with said multiplexed data signal to generate a composite electrical signal. An optical transmitter generates a composite optical signal from the composite electrical signal that is transmitted over the network, optionally after WDM multiplexing it with other composite optical signals.Type: GrantFiled: December 21, 2005Date of Patent: November 2, 2010Assignee: International Business Machines CorporationInventors: Casimer M. DeCusatis, Thomas A. Gregg
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Patent number: 7814182Abstract: A method of Ethernet virtualization using automatic self-configuration of logic of a data router. The method comprising maintaining control parameters at a master device, accessing, by a slave device, the control parameters at the master devices, and configuring the slave device based on the accessed control parameters.Type: GrantFiled: March 20, 2008Date of Patent: October 12, 2010Assignee: International Business Machines CorporationInventors: Michael J. Cadigan, Jr., Howard M. Haynie, Jeffrey M. Turner
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Patent number: 7774519Abstract: A bi-directional and full duplex facility for permitting both the IO processor and the Channel to write CCA messages on their respective queues at the same time. IOP messages to the channel are stored on the TO_CHN queue and Channel messages to the IOP on the TO_IOP queue. CCA Queues replace hardware CCAs due to increasing transmission capabilities of current IO processors and Channel processors. Even though the mechanism is similar, the present invention provides some benefits in the use of signaling. The IOP does not have to signal the Channel each time it puts something on its outbound queue. Each queue contains multiple slots. This allows the IOP and Channel to write multiple messages on the targeted queue without encountering a CCA busy signal. The actual queues are now structured in hardware system memory.Type: GrantFiled: July 3, 2008Date of Patent: August 10, 2010Assignee: International Business Machines CorporationInventors: Daniel F. Casper, John R. Flanagan, Paul S. Frazer, Kenneth J. Oakes, John S. Trotter
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Patent number: 7770098Abstract: Processing a coded signal formed so that multiple signal points, having individual signal values consonant with coded values, are arranged in accordance with a predetermined order. A signal restoration unit calculates an average value for signal values at signal points immediately preceding and following a predetermined signal point. The predetermined signal point comprises the coded signal. The signal restoration unit calculates, for selected preceding signal points, a signal value difference for the two selected signal points, and obtains first difference values. The signal restoration unit calculates, for selected following signal points, a signal value difference for the two selected signal points, and obtains second difference values. The signal restoration unit corrects the average value by employing either one or a plurality of either the first or the second, or both first and second difference values to obtain a restored value for a signal value at the predetermined signal point.Type: GrantFiled: August 16, 2006Date of Patent: August 3, 2010Assignee: International Business Machines CorporationInventor: Tomoaki Kimura
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Patent number: 7755408Abstract: A signal distribution tree structure for distributing signals within a plurality of signal tree branches to a plurality of signal sinks, wherein the signal in subsequent sub trees (11) is driven by a preceding amplifier (2), which is characterized in that the amplifiers are logic gates (3), which combines the signals of a preferred input (31) connected to a preceding logic gate in the signal path with a signal of a secondary input (32) connected to an adjacent tree (12) path of a neighboring and/our preceding sub tree.Type: GrantFiled: October 8, 2007Date of Patent: July 13, 2010Assignee: International Business Machines CorporationInventors: Sebastian Ehrenreich, Juergen Koehl, Juergen Pille
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Patent number: 7755394Abstract: A circuit (01) combining level shift function with gated reset is described, performing a simple logic function with inputs supplied from a lower voltage (VD) and a drive out at its output (05) with a higher voltage (VC). Said circuit (01) comprises a gated reset scheme plus devices (10, 30, 40) for logic function.Type: GrantFiled: August 22, 2008Date of Patent: July 13, 2010Assignee: International Business Machines CorporationInventors: Thomas Froehnel, Guenter Mayer, Rolf Sautter, Otto Wagner
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Patent number: 7747709Abstract: A method and system for automatically cloning IT resource structure in stateful web services environments by employing a new approach for configuration management. The present new approach models the configurational state of each resource as a stateful web service. Configuration data are provided by this service's resource properties. Relationships between configurations of different resources are modeled as “stateful web services relationships” between web service instances. These relationships can be navigated, which allows exploring the configuration of a whole system in a standards-based way. Additionally a new web service interface is provided by the stateful web service encapsulating the resource. This interface provides two new operations: “getConfiguration” allows an exploiter to take a snapshot of a resource's and related resources' configurational state and “setConfiguration” allows for setting the configurational state of a resource to a previously saved state.Type: GrantFiled: January 5, 2007Date of Patent: June 29, 2010Assignee: International Business Machines CorporationInventors: Michael M. Behrendt, Jochen Breh, Gerd Breiter, Thomas Spatzier
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Patent number: 7747902Abstract: A few inexpensive hardware facilities are incorporated in a tightly synchronized cross checked design. These facilities allow initialization software to quickly bring the two processors to the same state by rapid, repeated resets and execution of the initialization software. The resets are done in a way as to be transparent to the rest of the system and to the end user.Type: GrantFiled: March 13, 2008Date of Patent: June 29, 2010Assignee: International Business Machines CorporationInventors: Thomas D. Needham, Bryan K. Tanoue, Jeffrey M. Turner
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Patent number: 7742315Abstract: The present invention relates to computer hardware design, and in particular to a printed circuit board (card) comprising wiring dedicated to supply electric board components such as integrated circuits with at least three different reference planes. In particular at locations, where the pins of a card-to-card connector enter the layer structure of the card discontinuities brake the high frequency signal return path of a given signal wiring. In order to close the signal return path around a signal path from card to card including the connector, and thus to limit the signal coupling while concurrently keeping the card design as simple as possible, it is proposed to provide a) an additional capacitance for a given signal wiring in a discontinuity section, b) wherein the additional capacitance is formed by a voltage island placed within a signal layer located next to the given signal wiring.Type: GrantFiled: November 17, 2005Date of Patent: June 22, 2010Assignee: International Business Machines CorporationInventors: Wiren D. Becker, Bruce J. Chamberlin, Gerald J. Fahr, Roland Frech, Dierk Kaller, George Katopis, Erich Klink, Thomas-Michael Winkel
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Patent number: 7709296Abstract: An integrated optical I/O and semiconductor chip with a direct liquid jet impingement cooling assembly are disclosed. Contrary to other solutions for packaging an optical I/O with a semiconductor die, this assembly makes use of a metal clad fiber, e.g. copper, which will actually enhance cooling performance rather than create a design restriction that has the potential to limit cooling capability.Type: GrantFiled: October 19, 2006Date of Patent: May 4, 2010Assignee: International Business Machines CorporationInventors: Levi A. Campbell, Casimer M. DeCusatis, Michael J. Ellsworth, Jr.
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Patent number: 7676609Abstract: A non-disruptive unassignment of an address from a fabric responsive to a request from a channel adapter. A logout command requests the fabric to unassign an address. The status of the address is thereby changed from active to unassigned and an acknowledgment sent back to the channel adapter.Type: GrantFiled: June 3, 2008Date of Patent: March 9, 2010Assignee: International Business Machines CorporationInventors: Robert J. Dugan, Giles R. Frazier
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Patent number: 7653940Abstract: Provides methods for tracing and identifying a piracy in a wireless rights management system, wherein the content provider allow the protected digital content to be super-distributed, when unauthorized holding a pirated copy of the protected digital content is detected, based on the gateway controlling ability of the wireless operator within the wireless digital rights management system, a specific fingerprint is embedded in or removed from the protected digital content so as to trace the suspected persons and further identify the pirate. The fingerprint is related to information of a suspected person holding the protected digital content without authorization. A process of screening singles out highly suspected persons. Therefore the operator can determine whether the suspected person is a real pirate by comparing the similarity of the pirated version of content and the version held by the suspected person, and the exact tracing and identifying is achieved.Type: GrantFiled: August 25, 2005Date of Patent: January 26, 2010Assignee: International Business Machines CorporationInventors: Lin Luo, Jian Zhang, Rong Yan, Ling Shao
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Patent number: 7650554Abstract: A method for performing a test of a high-speed integrated circuit with at least one functional unit and built-in self-test features by a low-speed test system. The method comprises the steps of transforming an external clock signal from the test system into a faster internal clock signal within the integrated circuit, generating a test pattern according to a predetermined scheme, and applying the test pattern to the functional unit, comparing a response from the functional unit with an expected test pattern. If the response differs from the expected test pattern, then an internal failure signal is generated and the internal failure signal is extended to a length, which may be recognized by the test system. Further the present invention relates to a high-speed integrated circuit with at least one functional unit and built-in self-test features.Type: GrantFiled: November 28, 2006Date of Patent: January 19, 2010Assignee: International Business Machines CorporationInventors: Gottfried Goldrian, Otto Andreas Torreiter, Dieter Wendel
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Patent number: 7559063Abstract: Application programs supporting multiple contexts on a computer system having an operating system supporting threads.Type: GrantFiled: June 3, 2005Date of Patent: July 7, 2009Assignee: International Business Machines CorporationInventor: Eric R. Kass