Abstract: Disclosed is a method for repairing opens in thin film conductor lines on a substrate, preferably a multi-layered ceramic substrate. An unpatterned repair metal film is placed over a general area of open defects in conductive lines on a substrate. Preferably, this metal is placed over the conductive lines and opens therein by decal transfer. The assembly is then heated to cause diffusion bonding between the repair metal and conductive lines, but not between the repair metal and substrate. After diffusion bonding, the structure has metal bridges formed across any open defects covered by the repair film and also between adjacent conductive lines. The area of repair is then subjected to ultrasonic energy in a liquid ambient for a time at least long enough to remove metal bridges between adjacent conductive lines, but less than that required to remove repair metal bridges over the opens in the conductive lines.

Abstract: The invention relates to a method of making low resistance contacts between first and second metallization levels in integrated semiconductor circuits. In accordance with the invention, the semiconductor substrates to be cleaned are arranged on a substrate holder in a vacuum chamber. There, a gas plasma is generated by means of a getter electrode made of a material which has a high affinity for oxygen or oxygen containing compounds. This improves the vacuum by reducing the steam partial pressure. The actual cleaning of the exposed surfaces of the semiconductor substrate is effected subsequently by means of cathode sputtering through applying a radio frequency voltage to the substrate holder.

Abstract: The void-free pattern of isolation in a semiconductor substrate is described. There is contained within a semiconductor body a pattern of substantially vertically sided trenches. The pattern of isolation trenches isolate regions of monocrystalline semiconductor material which may contain active and passive semiconductor devices. The depth of the pattern of trenches is greater than about 3 micrometers. A first insulating layer is located upon the sidewalls of the trenches. The base or bottom of the trenches is open to the monocrystalline semiconductor body. An epitaxial layer extending from the base of the trenches fills the pattern of trenches up to between about 500 to 1500 nanometers from the upper surface of the trenches. A capping second insulating layer fills the additional portion of the pattern of trenches above the upper surfaces of the epitaxial layer for isolation of the pattern of trenches from the ambient.

Abstract: An integrated circuit structure having substrate contacts formed as a part of the isolation structure and the method to form such structure is described. The integrated circuit structure is composed of a monocrystalline silicon body having a pattern of dielectric isolation surrounding regions of the monocrystalline silicon in the body. The dielectric isolation pattern includes a recessed dielectric portion at and just below the surface of the integrated circuit and a deep portion which extends through the recessed dielectric portion and extends further into the monocrystalline silicon body than the recessed portion. A highly doped polycrystalline silicon substrate contact is located within the deep portion of the pattern of isolation. The substrate contact extends from the surface of the pattern of isolation down to the bottom of the deep portion of the isolation where the contact electrically connects to the silicon body.

Abstract: A multilayer ceramic integrated circuit packaging substrate provides a plurality of integrated circuit operating voltages at the integrated circuit mounting surface thereof without requiring a separate input/output pin and internal power distribution plane for every integrated circuit operating voltage. The substrate includes a power via for supplying a first integrated circuit operating voltage at the integrated circuit mounting surface, and a plurality of voltage converting means on the integrated circuit mounting surface for stepping down the first operating voltage to all other requisite operating voltages. The voltage converting means may be resistors or operational amplifier voltage dividers.

Abstract: A high precision, high throughput submicrometer workpiece positioning system, particularly useful as a workpiece positioning means in electron beam lithography tools. The positioning system increases mechanical stability by essentially eliminating mechanical hysteresis, which allows state of the art electron beam lithography systems to provide the repeatable, accurate and dense circuit patterns that modern semiconductor trends demand.The positioning system in preferred form comprises a movable positioning table, a workpiece supporting superstructure which is elastically joined to the movable positioning table by three geometrically distinct kinematic support means and a two-stage coupling means which mounts a workpiece (i.e., semiconductor mask or wafer) to the workpiece supporting superstructure. A laser interferometer locating-positioning system is utilized to position the workpiece. The interferometer mirrors are integral with the workpiece supporting superstructure.

Abstract: In the fabrication of an interconnection package for a plurality of semiconductors or integrated circuit chips wherein a multi-layered glass or glass-ceramic superstructure with a multi-layered distribution of planar conductors is formed by a process forming vertical conductive interconnection or studs between planar conductor layers, by pre-forming a via configuration in each glass or glass-ceramic layer at the interconnection points followed by depositing the conductive studs therein. The via configuration is formed by defining a desired pattern of vias, and ablating the vias through the top of and through the glass or glass-ceramic layer, using an ultraviolet laser. The vias may be stepped-shoulder or counter-bored by using a two mask operation.

Abstract: A process for making high performance NPN bipolar transistors functioning in a current switch logic circuit. A bipolar transistor is formed within an isolated region of a monocrystalline silicon body. The transistor includes an N+ subcollector, and N+ collector reach-through which connects the subcollector to a major surface of the silicon body, a P base region above the subcollector and adjacent to the reach-through an N+ emitter region within the base region and extending from the major surface. The base region includes an intrinsic base region located below the emitter region and an extrinsic region extending from the major surface and adjacent to the emitter region. The extrinsic base completely surrounds the emitter region. A mask is formed above the major surface having openings only above major portions of the extrinsic base regions.

Abstract: A process for producing printed circuit boards having metallic conductor structures embedded in the insulating substrate and whose front and back sides are conductively connected by means of plated through holes. The first steps of the process comprise producing a matrix on an epoxy resin substrate consisting of a lift-off layer, an aluminum barrier layer and a positive photoresist layer. A negative image of the desired conductor pattern is then generated in the photoresist layer using conventional photolithographic techniques. The negative image is etched into the barrier layer and the lift-off layer such that an undercut occurs under the barrier layer. Subsequently, vertical trenches are etched into the epoxy resin substrate. After drilling of the through holes, an activating layer of copper is deposited by means of magnetic field enhanced cathode sputtering on the surfaces of the trenches, the through holes and the barrier layer.

Abstract: An integrated circuit module to printed circuit board interconnection system wherein the board has circuit pads to which spring contacts have one of their ends soldered to the pads. The module has circuit pads on one surface thereof and a pivotal connection is provided for loading the module onto the circuit board whereby the opposite ends of the spring contacts engage the circuit pads on the module with a wiping action and are retained in engagement therewith.

Abstract: A compact low-cost drive for a robotic gripper system is disclosed having a rotationally driven shaft connected to an energy source for transmitting energy provided by the energy source to the gripper. An epicyclic gear arrangement is coupled to the shaft to convert the rotational motion of the shaft into a linear motion. At least one of the pins connected to the gears is linearly translateable in two directions under the control of the energy source. Fingers are recessed in the pins to facilitate gripping and releasing objects to be handled by the gripper system. A feedback means coupled between the energy source and the fingers can also be used to sense and control the position of the fingers.