Abstract: The present invention provides a data processing system with multiple logical partitions that isolate memory resources for applications contained in the logical partitions. A method is provided for moving a specific memory quantity between two logical partitions by first computing a threshold amount. Then, if the specific memory quantity to be transferred is less than the threshold amount, removing the threshold amount from memory assigned in the first partition and adding the threshold amount to memory assigned in the second partition. However, if the specific memory quantity is greater than the threshold amount, the method provides for removing an amount equal to the threshold from memory assigned in the first partition and adding that threshold amount to memory assigned in the second partition and repeating the removing and adding steps until the specific memory quantity has been transferred.

Abstract: The present invention provides an aircraft collision alarm system and method. The method includes the steps of collecting aircraft position information for aircraft in a given area and digitally encoding this aircraft position information. This aircraft position information is then transmitted on an audio sub-carrier over the voice communications channel of a VOR to the aircraft. The aircraft receives and processes the digitally encoded information and alerts the pilot if a collision alarm situation is present.

Abstract: Various embodiments of the present invention provide an anchor, circuit board assembly, and method for operably engaging an electronic component with a circuit board having a first side and a second side. Anchor embodiments include an anchor portion configured for receiving at least a portion of the electronic component and a pair of anchor legs flexibly extending from the ends of the anchor portion and configured for insertion into apertures defined in the circuit board. The anchor further includes a compression element slidably disposed about the anchor legs and movable between an unlocked position and a locked position. The compression element is configured for urging the anchor legs towards one another when moved from the unlocked position to the locked position such that the anchor is secured in the apertures when the compression element is in the locked position.

Abstract: A container includes first and second long sides parallel to the container's length. Racks are organized in rows parallel to the container's width. Each rack is receptive to installation of equipment along a height of the data rack parallel to the container's height. Openings are defined within the first and/or second long sides of the container. Heat exchangers may be installed, where each exchanger is installed on a rack to cool air exhausted by any equipment installed on this rack. Each row may include as many of the racks positioned side-to-side, length-wise, and parallel to the width of the container as can fit within the container. The racks of each row may be slidable in unison back and forth along the length of the container, between a first position at which the racks block an opening and a second position at which the racks block another opening.

Abstract: System and method for monitoring inventory. Inventory items are positioned between a camera and a surface having an optically identifiable and distinct characteristic. The camera obtains an image of the inventory items present, any exposed portion of the surface, or both. The amount of the exposed surface is used to determine an amount of the inventory items that are present or missing. Furthermore, the optically identifiable characteristic may be a uniform characteristic, such as color or texture, or a set of discrete elements, such as stickers, barcodes, structural features of the shelf, a pattern of lines or shapes, or combinations thereof. Optionally, the optically identifiable characteristic is unique to the location of the shelf associated with the inventory items. Inventory or non-inventory items incorrectly positioned over the exposed surface may be excluded from the amount of the expected inventory item being determined if the item does not match the visual attributes of the expected inventory item.

Abstract: The present invention provides a method for providing aggregate power consumption information for hundreds or thousands of data processing systems interconnected in a network. In one embodiment, a method is provided that receives power consumption information for each of the data processing systems along with time intervals associated with this information. The power consumption information is analyzed to provide the power consumption of the total number of data processing systems. This is accomplished by selectively computing total power consumption for selected time values.

Abstract: A data processing system having a memory for storing instructions and several central processing units for executing instructions, each central processing unit includes an adaptive power supply which provides, among other data, temperature information. Circuitry is provided that receives the temperature information from the many central processing units, selects a central processing unit which has the lowest temperature and which is available to execute instructions and dispatches instructions to the selected central processing from the memory.

Abstract: An integrated circuit is disposed on a circuit board. A heat sink retention module includes a bracket, members, and coil springs. The members extend through the coil springs and corresponding holes within the bracket to attach to the board. A heat sink is removably installed within the bracket in a toolless manner, such that the heat sink comes into contact with the integrated circuit. The heat sink and the bracket join together to become a single entity that is permitted to float along an axis perpendicular to a surface of the circuit board. The coil springs are tuned to define a predetermined force at which the heat sink is pushed against the integrated circuit. The module can include a latch having tabs bent at different angles relative to one another to balance forces applied by the tabs against the heat sink while the latter is being installed within the bracket.

Abstract: Apparatus for securing or retaining a heatsink. The heatsink retention apparatus includes a heatsink module that cooperates with first and second spring loaded latches secure to a circuit board on opposing sides of a heat-generating component. The heatsink module includes a handle pivotally secured to opposing sides of the heatsink body, and bails pivotally secured to the handle. In addition, the bails extend downward to dispose a lower bail member adjacent the spring loaded latches. As the handle pivots between a first position to raise the bails and a second position to lower the bails, the bails automatically move from a locked position to an unlocked position. Each of the spring loaded latches include a hook and at least one pre-loaded spring to transfer a minimum downforce to the lower bail members when the bails are raised. Accordingly, embodiments may be operated from the top of the heatsink without the use of tools, while providing a desired downforce over a range of heatsink heights.

Abstract: This invention provides a method for determining leakage current in a CMOS circuit having several devices. It includes the steps of reading a netlist which describes the circuit and includes information on both these devices in the circuit and how these devices are interconnected. Next, an input signal state data file is generated which provides all of the possible input states for the circuit. A determination is made of which devices in the circuit are in an OFF state for each of the input signal states provided. Then the leakage current for each of these devices in the OFF state is computed for each of the input signal states.

Abstract: A random number generator, a method, and a computer program product are provided for producing a random number seed. Each oscillator within an array of oscillators operates at a different frequency. The operating frequencies of each oscillator are not harmonically related, such that no integer multiple exists between the frequencies of any two oscillators. In one embodiment, the outputs of the array of oscillators connect to a multiple input latch. The multiple input latch also receives a sample signal, which is a clock signal. The clock signal samples the outputs of the array of oscillators, and the multiple input latch in conjunction with the random number determination logic (“RNDL”) produces a digital output (0 or 1) for each oscillator within the array. The RNDL uses these digital outputs to create a random number seed.

Abstract: Methods, systems, and products are provided for peer-to-peer computer software installation. Embodiments include receiving, by an observing install agent running on an observing host from a test install agent running on a test host, performance information describing the performance of software installed on the test host; determining, by the observing install agent, whether the performance information meets performance criteria for the observing host; and if the performance information meets the performance criteria for the observing host, installing the software on the observing host. In some embodiments, determining, by the observing install agent, whether the performance information meets performance criteria for the observing host is carried out by determining, whether the performance information meets performance criteria for the observing host in dependence upon a rule.

Abstract: The present invention provides for a BGA solder ball interconnection to an outer conductive layer of a laminated circuit assembly having an underlying circuit layer. The invention includes a raised BGA solder ball pad substantially co-planar with the outer conductive layer, the raised pad having a raised face and a plurality of vertical conductive walls and a BGA solder ball having an average diameter of greater than the width of the raised face, the BGA solder ball being adhered to the raised face and to a substantial portion of the vertical conductive walls.

Abstract: A method and circuit are provided for measuring frequency response performance of an integrated circuit by providing a pulse having a rising edge and a falling edge where the pulse is provided to a plurality of serially connected components. The number of these components which have propagated the leading edge of the pulse before the occurrence of the falling edge provide a numeric indication of the circuit's frequency response and performance.

Abstract: A method and system for avoiding various hazards for instructions which are propagating through a microprocessor pipeline. When a plurality of instructions exist within the pipeline which read and write the same value, a vector is established to distinguish the older from the newer instructions. Further, before instructions are dispatched for execution, pointers are generated which identify the particular instruction which had the operand or parameter value needed. Accordingly, by monitoring both the recent vector and pointers, dated dependency hazards can be avoided.

Abstract: A method and apparatus for executing instructions in a pipeline processor. The method decreases the latency between an instruction cache and a pipeline processor when bubbles occur in the processing stream due to an execution of a branch correction, or when an interrupt changes the sequence of an instruction stream. The latency is reduced when a decode stage for detecting branch prediction and a related instruction queue location have invalid data representing a bubble in the processing stream. Instructions for execution are inserted in parallel into the decode stage and instruction queue, thereby reducing by one cycle time the length of the pipeline stage.

Abstract: An integrated circuit having a frequency generator connected to a constant reference voltage source located on the integrated circuit and a monitor connected to monitor the frequency signal and from the frequency history predicting that an integrated circuit failure will occur. An adaptive power supply is disclosed that includes a frequency generator connected to a bandgap voltage source and is monitored for changes in the frequency generator output. From this change a prediction is made as to that a failure condition will occur.

Abstract: Method and apparatus for redirection resource access requests based on a requested resource identifier. When a user device broadcasts a network resource access request, the request is received by a Scalable, High Availability, Server Resource Redirection (SHASSR) apparatus. The request includes a requested resource identifier which is checked against a directory to determine if the resource identifier has changed. If so, a current resource identifier is returned to the SHASSR apparatus which sends out another network resource access request using the current resource identifier.

Abstract: A method and system for providing and dynamically managing the size of a storage space containing data structures depending on a current network load. The present invention expands the size of a storage space when the amount of data therein is large, thereby reducing the time spent searching for values within the data structure. When the amount of data within the storage space is small, the present invention contracts the size of the storage space to reduce the memory needed to maintain the storage space. In this manner, the present invention dynamically adjusts the size of the storage space in response to changing network loads to ensure that network performance remains optimized.

Abstract: A microprocessor and method of processing instructions for addressing timing assymetries are disclosed. A sequence of instructions including a first instruction and a second instruction are received. Dependency logic determines if any dependencies between the first and second instructions. The dependency logic then selects between first and second issue queue partitions for storing the first and second instructions pending issue based upon the dependency determination, wherein the first issue queue partition issues instructions to a first execution unit and the second issue queue partition issues instructions to a second execution unit. The first and second issue queue partitions may be asymmetric with respect to a first register file in which instruction results are stored. The first and second instructions are then stored in the selected partitions.