Patents Represented by Attorney Thomas G. Devine
  • Patent number: 5999992
    Abstract: This invention relates to a system and method for adapting the ports of computing elements in transferring data between computing elements on a network. Ports of the computing elements are interconnected for data transfer through a switch complex. The interconnected ports are adapted to cooperate together in transferring the data. Data which is ordinarily designated to be transferred through one port of a computing element may be transferred through a different port.
    Type: Grant
    Filed: October 12, 1995
    Date of Patent: December 7, 1999
    Assignee: International Business Machines
    Inventors: Gregory Frederick Grohoski, William Rudolph Hardell, Jr., Paul Joseph Jordan, Oscar Reid Mitchell, Tung Manh Nguyen, Yonjae Rim
  • Patent number: 5778443
    Abstract: A computer system has volatile random access memory ("RAM") and nonvolatile auxiliary storage, a virtual memory operating system with some pages of virtual memory resident in RAM and other pages resident in a paging space in auxiliary storage. A time varying operating state for the computer is definable by reference to contents of the memory. A space in auxiliary storage (a "hibernation space") is allocated for storing a portion of RAM as a hibernation image. A first group of the RAM-resident virtual memory pages is stored in the paging space. A second group of the RAM-resident virtual memory pages is stored in the hibernation space. A hibernation state is entered where the computer system is powered off with the system at a certain operating state. The computer system is returned to operation at the certain operating state, which includes powering on the computer system and reading the second group of pages into the RAM.
    Type: Grant
    Filed: December 14, 1994
    Date of Patent: July 7, 1998
    Assignee: International Business Machines Corp.
    Inventors: Randal Craig Swanberg, Michael Stephen Williams
  • Patent number: 5331507
    Abstract: A resilient heat sink clip has a pair of legs joined together at one end by an acruate member. The other ends of the legs each terminate in a hook. The arcuate member bears against a heat sink while pressing it into thermal contact with an electronic device package to conduct heat into the heat sink and then into the atmosphere.
    Type: Grant
    Filed: May 15, 1991
    Date of Patent: July 19, 1994
    Assignee: Dell USA L.P.
    Inventors: Johnny S. Kyung, Pearce R. Jones
  • Patent number: 5309031
    Abstract: A battery-powered lap-top computer has a main battery for ordinarily supplying power to the computer circuitry. A reserve battery is connected through a manual switch to the circuitry. When the main battery starts to lose its charge, the manual switch is operated to connect the reserve battery to the circuitry prior to removal of the main battery. A new main battery is installed and the switch is operated to disconnect the reserve battery from the circuitry. Provision is made for the main battery to slowly charge the reserve battery.
    Type: Grant
    Filed: April 22, 1991
    Date of Patent: May 3, 1994
    Assignee: Dell USA, L.P.
    Inventors: Gregory N. Stewart, John P. Busch
  • Patent number: 5291585
    Abstract: A computer system with self-describing feature table, accessible by device drivers. Thus a simple process can access these feature tables to fully customize the device drivers at installation, or at boot; or the device driver can branch on the data in the feature table. Thus, a new degree of flexibility is achieved without degrading performance.
    Type: Grant
    Filed: July 29, 1991
    Date of Patent: March 1, 1994
    Assignee: Dell USA, L.P.
    Inventors: Albert Sato, David C. Baker, Christie J. Waldron
  • Patent number: 5276832
    Abstract: A cache subsystem for a computer system which includes a cache memory and a cache control means. When the processor subsystem of the computer system requests data, information related to the location of the data within the memory subsystem of the computer is input to the cache subsystem. The control means receives an address bus bit field and transmits control signals which vary depending on the received address bus bit field to the cache memory to look for the requested data. The address bus bit field is configured based upon the dimensions of the cache memory and includes information as to where the data would be stored within the cache memory. As different cache memories are of different dimensions, means for modifying the address bus bit field generated by the cache control means based on the dimensions of the cache memory are provided so that the cache subsystem may be readily configured to operate with different sized cache memories.
    Type: Grant
    Filed: June 19, 1990
    Date of Patent: January 4, 1994
    Assignee: Dell U.S.A., L.P.
    Inventor: Thomas H. Holman, Jr.
  • Patent number: 5261068
    Abstract: A digital computer having a dual path memory retrieval system for a dynamic RAM memory unit comprised of any number of interleaved memory banks. The system includes means for asserting and deasserting an access signal to specified locations of the interleaved memory banks, a multiplexer having a pair of input channels for each memory bank and a pair of data paths from the output of each memory bank to the corresponding input channels of the multiplexer. The first data path is a direct path between the memory bank and a first one of the pair of input channels and the second data path is a latched path between the memory bank and a second one of the pair of input channels.
    Type: Grant
    Filed: May 25, 1990
    Date of Patent: November 9, 1993
    Assignee: Dell USA L.P.
    Inventors: Darius D. Gaskins, Thomas H. Holman, Jr., Michael L. Longwell, Keith D. Matteson, Terry J. Parks
  • Patent number: 5245231
    Abstract: A delay line within an integrated circuit and calibrated by an external time period (calibration clock). The speed of devices in the integrated circuit is assessed using the calibration clock, and this speed then controls how many delay cells within the delay line an input must traverse to trigger the delayed output.
    Type: Grant
    Filed: December 30, 1991
    Date of Patent: September 14, 1993
    Assignee: Dell USA, L.P.
    Inventors: Thomas J. Kocis, Darius D. Gaskins
  • Patent number: 5241303
    Abstract: A computer system which is reconfigurable to provide separate ergonomically advantageous positions for keyboard input and for stylus input. A primary system chassis contains a bay in its underside where a detachable keyboard can be stored. For one-hand stylus input, the keyboard is left in its bay while the display is mounted flat on top of the system chassis. For keyboard input, the keyboard is mounted on the system chassis, and the display is supported at an angle which makes it easily visible to a user typing on the keyboard.
    Type: Grant
    Filed: December 26, 1991
    Date of Patent: August 31, 1993
    Assignee: Dell USA, L.P.
    Inventors: David S. Register, J. Michael O'Dell, Robert Groover, III
  • Patent number: 5241643
    Abstract: A memory circuit for use in a data processing system is accessed by address signals and includes interconnection circuitry for at least one memory module. The memory circuit further includes an address buffer for transmitting the address signals to the interconnection circuits if and only if the at least one memory module is present. A line interconnects the output enable pin of an address buffer to a grounded PRESENT (PRES) pin on a (single in-line memory module (SIMM) when it is installed in a socket. The line to the address buffer enable pin includes a pull-up resistor portion so that the address buffer is disabled unless a SIMM is connected to the socket.
    Type: Grant
    Filed: June 19, 1990
    Date of Patent: August 31, 1993
    Assignee: Dell USA, L.P.
    Inventors: Michael D. Durkin, Greg N. Stewart, Thomas H. Holman, Jr.
  • Patent number: 5239445
    Abstract: An apparatus and method for a computer system to rapidly access at least two IDE disk drives. Use of standard forty pin connectors and forty wire ribbon cable having certain pairs of wires uniquely twisted so as to allow the system to independently access the IDE drives.
    Type: Grant
    Filed: December 20, 1990
    Date of Patent: August 24, 1993
    Assignee: Dell USA L.P.
    Inventors: Terry J. Parks, Joseph M. Maurin, Kenneth L. Jeffries
  • Patent number: 5228319
    Abstract: A digital computer system has a lock hold-down assembly for security. The assembly is secured at a standard expansion card slot in the computer unit, and includes a bracket mounted inside the unit, accessible through the slot. In the preferred embodiment, the bracket has an integral flange with an aperture therethrough and a plurality of tabs. A cover member has a plurality of hooks for engaging the plurality of tabs through the slot. The cover member also has a cable enclosure through which the power cable and peripheral cables may be run. The cover member further has an integral flange with an aperture therethrough. A lock is placed through both apertures, thereby securing the unit and cables to the lock. The lock is anchored as desired.
    Type: Grant
    Filed: September 25, 1991
    Date of Patent: July 20, 1993
    Assignee: Dell USA, L.P.
    Inventors: Raymond J. Holley, Robert D. Weiss, Robert H. Garrett, Karl M. Steffes
  • Patent number: 5225629
    Abstract: To reduce the electro-magnetic interference (EMI) of a digital computer, the EMI contact of this invention is snapped into place in the chassis of the computer and the cover for the computer is then placed over the chassis with the contact surfaces of the EMI contact firmly engaging the cover to provide grounding between the cover and the chassis, thereby reducing EMI.
    Type: Grant
    Filed: December 13, 1991
    Date of Patent: July 6, 1993
    Assignee: Dell USA L.P.
    Inventor: Robert H. Garrett
  • Patent number: 5138525
    Abstract: A digital computer chassis has a front and rear wall with a strut fastened to both the front and rear walls, positioned to strengthen the chassis. A power supply and a hard disk drive are located within the chassis and connected to and supported by the strut. The power cable from the power supply is positioned within a channel formed in the strut, terminating in an on/off switch. The power cable is shielded from the electrical components within the chassis by the strut. With the surrounding cover in place, a monitor may be placed on the cover, supported by the strut.
    Type: Grant
    Filed: June 14, 1991
    Date of Patent: August 11, 1992
    Assignee: Dell USA Corporation
    Inventor: Robert G. Rodriguez
  • Patent number: 5133459
    Abstract: A shipping container for an article includes a floor on which the article is placed, the top surface of which is elevated from the supporting surface upon which the container rests, by a fixed dimension. Four side structures surround the floor and a top panel contacts the side structures to form an enclosure for the article. One of the side structures has at least one flap that, when opened, permits a ramp, that is part of the side structure, in the form of an inclined plane, to be pivoted into position against the floor. The height of the inclined plane approximates the fixed dimension so that the article can be moved horizontally within the container and then down the ramp for removal. Reinstallation of the article into the container requires moving the article up the inclined plane, onto the floor of the container.
    Type: Grant
    Filed: September 6, 1991
    Date of Patent: July 28, 1992
    Assignee: Dell USA Corporation
    Inventor: Pete D. Genix
  • Patent number: 5115503
    Abstract: A digital computer system has internal and external devices, with the external devices connected to an associated bus. The digital computer system has a clock frequency which is different from that of the associated bus. Memory addresses from the central processor are decoded and for external devices, a frequency adjusting circuit divides the output from a clock oscillator to provide a system clock that is approximately the same frequency as that of the associated bus.
    Type: Grant
    Filed: July 15, 1991
    Date of Patent: May 19, 1992
    Assignee: Dell U.S.A. Corporation
    Inventor: Michael D. Durkin
  • Patent number: 5099516
    Abstract: A digital computer system has a central processor unit (CPU). A computer program, entered into the digital computer system for execution thereof, has a program code word embedded at an arbitrary location therein. An addressable programmable array of logic (PAL) is operatively connected to the CPU for receiving a READ signal originated by the CPU at the address of the PAL, the PAL being programmed to output a portion of a preset array code word in a response to the READ signal, and to output the remainder of the array code word in segments in response to subsequent READ signals at the same address. A data bus, connected to receive and transmit the portion and remainders of the array code word to the CPU for comparison with the program code word. The program code word and the array code word are compared and, if identical permit use of the program and do not permit use when the program code word and the array code word are not identical.
    Type: Grant
    Filed: June 12, 1989
    Date of Patent: March 24, 1992
    Assignee: Dell Corporate Services Corporation
    Inventors: Michael D. Durkin, Greg N. Stewart
  • Patent number: D329846
    Type: Grant
    Filed: February 8, 1990
    Date of Patent: September 29, 1992
    Assignee: Dell USA, L.P.
    Inventor: Richard V. Haner
  • Patent number: D335660
    Type: Grant
    Filed: December 20, 1990
    Date of Patent: May 18, 1993
    Assignee: Dell USA, L.P.
    Inventor: John P. Busch
  • Patent number: D342059
    Type: Grant
    Filed: September 4, 1992
    Date of Patent: December 7, 1993
    Assignee: Dell USA L.P.
    Inventor: Richard V. Haner