Abstract: Biological optimization systems for enhancing photosynthetic efficiency and methods of use. Specifically, methods for enhancing photosynthetic efficiency including applying pulsed light to a photosynthetic organism, using a chlorophyll fluorescence feedback control system to determine one or more photosynthetic efficiency parameters, and adjusting one or more of the photosynthetic efficiency parameters to drive the photosynthesis by the delivery of an amount of light to optimize light absorption of the photosynthetic organism while providing enough dark time between light pulses to prevent oversaturation of the chlorophyll reaction centers are disclosed.

Abstract: Systems and methods for optimizing operation of a transceiver device are disclosed. The method may include parallel processing an input signal through a first path having a first frequency response and a second path having a second frequency response. The second frequency response may be higher than the first frequency response. Signals from the first and second paths may be combined, creating an output signal having a desired gain and frequency. The parallel processing may adjust a gain of at least one of the first path and the second path. The parallel processing may equalize at least one of the first frequency response and the second frequency response. The input signal may be from a 10 GBit Ethernet channel and/or a Fibre channel.

Abstract: A memory module with display functions and a display unit thereof are provided. The memory module includes a first circuit board, a memory chip, a display unit and a controller. The memory chip is disposed on the first circuit board. The display unit is disposed on the first circuit board. The display unit has the same package type as the memory chip. The controller is disposed on the first circuit board. The controller is configured to control the memory chip and provide information about the memory chip to the display unit, such that the display unit is capable of displaying information about the memory chip.

Abstract: The reliability test plate for appearance treatment is used to coat with predetermined paint or material. The reliability test plate at least includes an appearance simulation area for simulating at least partial appearance of an electronic product, and at least one test plane area. The appearance simulation area and the test plane area can be coated with the predetermined paint. Then, one reliability test item can be performed at the test plane area.

Abstract: An electronic device is provided. The electronic device includes a housing, a rotating mechanism and a first rotating member. The rotating mechanism, rotatably disposed in the housing, rotatable along a first direction and a second direction different from the first direction. The first rotating member, disposed on the housing, rotatable between a first position and a second position. When the first rotating member is in the first position, the first rotating member engages with the rotating mechanism. When the rotating mechanism rotates along the first direction, the rotating mechanism is separated from the first rotating member, whereinafter, the first rotating member is able to rotate from the first position to the second position.

Abstract: A method of forming a polysilicon film having smooth surface using a lateral growth and a step-and-repeat laser process. Amorphous silicon formed in a first irradiation region of a substrate is crystallized to form a first polysilicon region by a first laser shot. Then, the substrate is moved a predetermined distance, and irradiated by a second laser shot. The polysilicon region is then recrystallized and locally planarized by subsequent laser shots. After multiple repetitions of the irradiation procedure, the amorphous silicon film formed on a substrate is completely transformed into a polysilicon film. The polysilicon film includes lateral growth crystal grains and nano-trenches formed in parallel on the surface of the polysilicon film. A longitudinal direction of the nano-trenches is substantially perpendicular to a lateral growth direction of the crystal grains.

Abstract: A method of fabricating a semiconductor device is disclosed. The method of fabricating a semiconductor device provides a semiconductor substrate; forming a gate stack overlying the semiconductor substrate; forming spacers each having a first inner spacer and a second outer spacer on sidewalls of the gate stack; forming a protective layer on sidewalls of the spacers, covering a part of the semiconductor substrate, wherein an etching selectivity of the protective layer is higher than that of the first inner spacer.

Abstract: A liquid crystal display includes a gate driver, a data driver and a pixel matrix. The gate driver is for outputting a plurality of gate signals successively. The data driver is for providing a plurality of data signals. The pixel matrix includes a number of pixels. Each pixel includes a first sub-pixel, a second sub-pixel and a voltage coupling device. The voltage coupling device is coupled between the first sub-pixel and the second sub-pixel such that pixel voltages of the first sub-pixel and the second sub-pixel are different and have relevant variation.

Abstract: A system for accessing a memory card is provided. The system includes a control unit having a control pin and a processor. The processor senses a card-insertion signal from a socket via the control pin for indicating whether the memory card has been inserted into the socket. The processor provides a power control signal via the control pin to supply an operating voltage to the memory card when the sensed card-insertion signal indicates that the memory card has been inserted into the socket. The processor detects whether a write protection function of the memory card is present via the control pin.

Abstract: A tandem organic electroluminescent device. The tandem organic electroluminescent device comprises a substrate having a pixel thin film transistor. A rib with chambered corners is formed on the substrate, surrounding a display region. A protrusion is formed in the display region. A plurality of organic light emitting diodes is stacked vertically in the display region, covering the protrusion, wherein each organic light emitting diode comprises a top electrode, an organic electroluminescent layer, and a bottom electrode. The bottom electrode of the bottommost organic light emitting diode is electrically connected to the pixel thin film transistor. A common electrode electrically connected to the top electrode of the topmost organic light emitting diode directly over the protrusion.

Abstract: A dynamic random access memory cell including a bottom oxide layer, a first semiconductor layer, a second semiconductor layer, an insulation layer, a gate and a doping layer is provided. The bottom oxide layer is disposed on a substrate. The first semiconductor layer disposed on the bottom oxide layer has a first doping concentration. The second semiconductor layer disposed on the first semiconductor layer has a second doping concentration lower than the first doping concentration. The insulation layer disposed on the bottom oxide layer at least situates at the two sides of the first semiconductor layer. The height of the insulation layer is greater than that of the first semiconductor layer. The gate is disposed on the second semiconductor layer. The doping layer disposed correspondingly to the two sides of the gate substantially contacts the second semiconductor layer and the insulation layer.

Abstract: A charge pump-based frequency modulator is provided. The charge pump-based frequency modulator comprises an analog phase correction path comprising a varactor and a charge pump. The varactor is coupled to an output of the charge pump-based frequency modulator. The charge pump is coupled to a node between the varactor and the output and receives a signal containing the modulated data.

Abstract: The invention discloses Redundant Array of Inexpensive Disks (RAID) systems, utilizing a RAID descriptor having compatibility for different RAID levels. When the RAID system is set to realize RAID 5, the RAID descriptor comprises a first RAID sub-descriptor. When the RAID system is set to realize RAID 6, in addition to the first RAID sub-descriptor, the RAID descriptor further comprises a second RAID sub-descriptor.

Abstract: Display panels buffering display data from a data driver. The display panel comprises a first signal line, a first data line, a first scan line interlaced with the first data line, a first pixel coupled to the first data line and the first scan line, a first switching element comprising a first terminal coupled to the first data line, a first storage capacitor coupled between a second terminal of the first switching element and a ground, and a second switching element coupled to the first storage capacitor and the first signal line.

Abstract: An LCD including a color filter substrate, an array substrate, and a liquid crystal layer therebetween is provided. This color filter substrate has a plurality of color filters with overlap regions acting as a black matrix. Subsequently, patterned regions are defined in part of the overlap regions. After formation of a planarization layer and a conductive layer, spacers are formed in the patterned regions. The spacers may not shield the transparent region of the color filters, thereby enhancing the aperture ratio of the color filter substrate. Additionally, the thickness of the planarization layer in the patterned regions is not influenced by the overlap of the color filters, such that the spacers thereon have a uniform height. Furthermore, the at least one spacer of the color filter substrate and at least one data line of the array substrate are overlapped.

Abstract: A tracking circuit of a memory circuit is provided. The tracking circuit is coupled between a control circuit and a sense amplifier, delays a word-line pulse signal generated by the control circuit by a delay period to generate a sense amplifier enable signal enabling the sense amplifier to detect data bits output by a memory cell array. In one embodiment, the tracking circuit comprises a plurality of dummy cells and a dummy bit line. At least one of the plurality of dummy cells comprises a plurality of cascaded transistors cascaded between the dummy bit line and a ground voltage for lowering down a dummy bit line signal on the dummy bit line when the word-line pulse signal is enabled. The dummy bit line is coupled to the dummy cells and carries the dummy bit line signal.

Abstract: A digital to analog converter (DAC) converting a digital code to an output voltage and capable of self calibration. The DAC includes a self-calibration signal generator generating a self-calibration signal based on the output voltage, a constant current generator, a first and a second current provider and a current-voltage converter. The current generating elements of the first and second current providers provide proportional currents, and are enabled/disabled according to the self-calibration signal and the digital code, respectively. The constant current is divided into the actual working current generating elements of the first current provider, and an output current is generated by the actual working current generating elements of the second current provider. The output current is converted to the output voltage by the current-voltage converter.

Abstract: A method and an apparatus for calculating an error metric in a digital communication receiver. In the receiver, an input data stream is used to generate at least one input bit stream. The combinational logic unit performs an error-check operation on delayed and current bits of the input bit stream using a polynomial error-check equation previously determined. Finally, an accumulator is used to accumulate a number of trials with respect to the error check operation and generates a nominal error-check number based on the number of the correct trials.

Abstract: The invention discloses a switching element of a pixel electrode for a display device and methods for fabricating the same. A gate is formed on a substrate. A first copper silicide layer is formed on the gate. An insulating layer is formed on the first copper silicide layer. A semiconductor layer is formed on the insulating layer. A source and a drain are formed on the semiconductor layer. Moreover, a second copper silicide layer is sandwiched between the semiconductor layer and the source/drain.

Abstract: A driving device including a light emitter, a biasing circuit, a light receiver, an automatic control system, and an alternating current (AC) path is disclosed. The light emitter generates an optical signal. The biasing circuit generates a driving signal to activate the light emitter such that the light emitter operates in a working range. The light receiver detects the output power of the optical signal for generating a corresponding electrical signal. The automatic control system adjusts the driving signal according to the corresponding electrical signal such that the output power of the optical signal approaches a preset value. The AC path is coupled between the light emitter and an external signal source for receiving at least one AC modulated signal such that the light emitter generates at least one modulated optical signal.