Abstract: A method of forming a capacitor for DRAM according to the invention is disclosed. The method includes the follow steps: a dielectric layer, an etching stop layer, a first insulating layer, a first conductive layer and a second insulating layer are formed in order on a substrate. A contact hole is formed in the second insulating layer. the first conductive layer, the first insulating layer, the etching stop layer and the dielectric layer. Then, a second conductive layer is formed over the substrate and completely fills the contact hole. The second conductive layer is patterned. Next, a silicon nitride layer is formed adjacently to the patterned second conductive layer. Parts of the second insulating layer and the first conductive layer are removed by using the silicon nitride layer as a mask, thereby exposing parts of the first insulating layer. Afterwards, a third conductive layer is formed over the substrate.

Abstract: A etchant recipe including a mixed gas of one of a CH.sub.x F.sub.y group and CO gas is used to etch a silicon nitride layer by plasma etching so as to form a thin polymer layer to protect a silicon layer under the silicon nitride layer from over-etching. Then a soft etching is performed to remove the thin polymer. The etchant recipe is, for example, used in forming a contact opening on a gate of a MOS transistor, on which a silicon nitride layer is formed.

Abstract: A virtual ethernet interface interconnects a first computer at a customer premise with an ethernet local area network (LAN) at a central office that is connected to the customer premise via a digital subscriber line (DSL). The virtual ethernet interface comprises a virtual interface card connected to the first computer and a physical interface card connected to a second computer that is in communication with the ethernet hub. On start up, the central office computer sends the MAC address associated with the ethernet interface of the physical interface card back to the virtual interface card of the first computer. Thus, the virtual ethernet interface allows the first computer to form ethernet frames using the MAC address of the physical interface card so that it appear as though they were originated from the second computer. Further, the first computer can receive frames taken from the ethernet LAN by the physical interface card and transmitted to the virtual interface card over the DSL link.

Abstract: A system and method for batch processing or filling prescriptions. Broadly stated, the prescription processing system comprises a packaging subsystem, a sorting subsystem, an optional medical reclamation subsystem, a system controller and prescription input means. The packaging subsystem, sorting subsystem and medical reclamation subsystem are all under the direction of the system controller. The system controller is in communication with prescription input device means, which is typically a plurality of remote terminals located at pharmacies, drug stores and hospitals. The prescription input device transmits prescription orders to the system controller where they are analyzed and sorted according to predetermined criteria to formulate a batch. The prescriptions are then packaged and sorted under the supervision of the system controller.

Abstract: An antenna effect monitor includes a transistor formed on a semiconductor substrate. The transistor gate is coupled to a doped polysilicon interconnect layer which is also coupled to an antenna effect monitoring unit. Several metal bonding pads float in an orderly fashion above the doped polysilicon interconnect layer without coupling with each other. Several small metal layers are formed in an orderly fashion above the doped polysilicon interconnect layer but are electrically coupled together by several via plugs in between. The top small metal layer is coupled to the top bonding pad. The bottom small metal layer is electrically coupled to the doped polysilicon interconnect layer. Then a passivation layer covers the substrate but leaves a pad opening to expose the top bonding pad.

Abstract: A cyanine dye for using in high density optical disc recording medium, having the following structure: ##STR1## wherein R represents 4-methoxycarbonyl benzyl group, X.sup.- represents an acid anion, and n represents an integer of 1 or 2. This cyanine dye is suitable for use as a .lambda.=450 nm.about.650 nm visible light-absorbing organic dye useful as a high density optical disc recording medium.

Abstract: A signal transfer acceleration system accelerates transfer of an audio signal through a communications channel, such as a telephone line, RF link, or other suitable audio signal communications channel. The connection along the communications channel takes much less time than would be required if the audio signal were played at its normal speed. The signal transfer acceleration system includes a specially designed transmitter system and a specially designed receiver system that are interfaced via the communications channel. The transmitter system includes: (1) a transmitter storage device configured to store the audio signal at a first sample rate; (2) a filter configured to reduce a frequency range of the signal by filtering frequencies from the signal; (3) a transmitter configured to transmit the signal along the communications channel at a second sample rate that is faster than the first sample rate so that the frequency range is expanded while a time period of the transfer is reduced.

Abstract: A method of chemical-mechanical polishing for forming a shallow trench isolation. A substrate having a plurality of active regions, including a large active region and a small active region, is provided. A silicon nitride layer is formed on the substrate. A shallow trench is formed between the active regions. An oxide layer is formed over the substrate, so that the shallow trench is filled therewith. A partial reverse active mask is formed on the oxide layer, so that the oxide layer on a central part of the large active region is exposed. Whereas, the oxide layer on an edge part of the large active region and on the small active region are covered by the partial reverse active mask. The oxide layer is etched with the silicon nitride layer as a stop layer, using the partial reverse active mask as a mask. The oxide layer is planarized until the oxide layer within the shallow trench has a same level as the silicon nitride layer.

Abstract: A semiconductor fabrication method is provided for fabricating a shallow-trench isolation (STI) structure in an integrated circuit, which can prevent the occurrence of microscratches in the oxide plugs of the STI structure, thus further preventing the occurrence of a bridging effect and short-circuits between the circuit components that are intended to be electrically isolated by the STI structure. This method is characterized by the use of a laser annealing process to remove the microscratches that formed on the top surface of the oxide plugs during the chemical-mechanical polishing (CMP) process used to remove the upper part of the oxide layer to form the oxide plugs This method can therefore prevent the occurrence of a bridging effect and short-circuits due to the forming of the microscratches that would otherwise occur in the prior art.

Abstract: A ladder hose retainer 10 for use with a ladder 48 having a ladder rung 50, includes an elongated tubular member 12 adapted to fit within a rung 50, and having a first and a second externally threaded end, 14 and 16. An internally threaded fitting 24 threadedly engages first end 14 and incorporates at least one gripping member 30 such that each gripping member 30 is adapted and arranged to securely engage a hose 58. An internally threaded cap member 22, adapted to threadedly engage second end 16, provides for adjustable mounting of the elongated member 12 within rungs 50 of various sizes. The ladder hose retainer 10 allows the secure retention of a vibrating hose 58 of a spray device to a ladder, thus reducing the vibration and discomfort imparted to an operator by the vibrating spray hose.

Abstract: A system and method is discloded for training echo cancelers during a training sequence of a data connection between a first modern connected to a cellular cordeless phone and a second modem, wherein the cellular cordless phone in operating a microcellular mode as opposed to a cellular mode. In such circumstances, where an intermittent two-wire channel interconnects the microcell base station and a central office associated with the public switched telephone network (PSTN), an offset echo will occur in the remote echo of the second modem and the local echo of the first modem. The offset echoes can be attributed to a radio frequency (RF) delay between the cellular cordless phone and the microcell base station. The first modem can make accommodations for the RF delay by increasing the delay time utilized in setting its near-end echo canceler.

Abstract: A Mobile Switching Center (MSC) includes a cellular modem pool that comprises a number of pairs of modems in which the data terminal equipment (DTE) ports of each modem pair are cross-connected in a "back-to-back" fashion. This allows the two modems of each pair to interchange data via their DTE ports and thereby isolate that portion of the cellular fax call over the cellular communications channel from that portion of the cellular fax call through the public-switched telephone network (PSTN). Fax information is transmitted over both the PSTN-portion of the cellular fax call and the cellular portion of the cellular fax call using standard fax modulation techniques. The cellular-side modem of each modem pair is adapted to recover fax handshaking and data signaling from the received--fax modulated--signal and translate the recovered fax information into non-modulated signals (e.g. AT commands) for application to the corresponding PSTN-side modem of the modem pair.

Abstract: A channel routing manager that is employed by a mobile telecommunications switching office routes voice and data calls over a carrier facility interconnecting a cell site transceiver to the mobile cellular switch and includes first and second channels that utilizes first and second encoding methods, respectively. The channel routing manager comprises a hunt group mechanism including first and second channels, wherein the first channels are sorted together and the second channels are sorted together. In addition, the channel routing manager comprises a control mechanism for routing the voice calls to one of the first channels unless all of the first channels are busy and then routing the voice calls to one of the second channels, and for routing the data calls to one of the second channels unless all of the second channels are busy and then routing the data calls to one of the first channels.

Abstract: A silicon chip having a mixed input/output slot structure comprising a core region having a plurality of circuits formed thereon, a wiring region surrounding and linked to the core region, and an input/output area surrounding and linked to the wiring region, where the input/output area has a plurality of input/output slots and four corner cells. The input/output slots can be divided into groups with each group having a different height, and input/output slots on the same side of the input/output area all have the same height. Therefore, a choice of sides for placing the input/output slots can be made, and the layout of input/output slots around the silicon chip is not be restricted by one side. Hence, chip size can be reduced and chip surface can be fully utilized.

Abstract: A method is provided for use on a wafer formed with a plurality of dice on each of which a memory device, such as a DRAM (dynamic random access memory) device to perform a burn-in operation on the memory device so as to test the reliability thereof. By this method, a plurality of pads are formed in the scribe lines that are used as reference marks in the cutting apart of the dice. These pads are used to transfer an externally generated burn-in enable signal and a DC bias voltage to each memory device. Since the pads for burn-in wiring are formed in the scribe lines, they will not take additional space on the dice where each memory device is formed. The burn-in operation is more convenient, quick, and cost-effective to implement.

Abstract: An apparatus which allows one to maintain precision placement of a manipulator which undergoes repeated controlled motions or trajectories is provided. The structure of the apparatus is compliant such that the manipulator may be displaced by forces applied to the mechanical structure. This compliance is due to a lack of precision in the fabrication of the component parts of the machine, and to a lack of rigidity due to a lightweight design. This displacement is of a greater magnitude than the precision positioning tolerance of the apparatus. Consequently, the manipulator may then be displaced outside of the positioning tolerance due to applied forces. However, it is a characteristic of the present invention, that despite the compliance of the mechanical structure of the apparatus, the positioning tolerance will be maintained. The controlled motion is accomplished by the generation of control signals by computer software running on a computer control system.

Abstract: The present invention enables a dial modem capable of simultaneous voice and data (SVD) operation and connected to a conventional telephone set to automatically select between SVD operation, analog voice operation and digital data operation when transmitting or receiving communication signals based on the position of the telephone set's hookswitch. The invention includes a hookswitch position detector, connected to the telephone set, for sensing the current position of the hookswitch, and a signal controller, connected to the hookswitch position detector. The signal controller may be configured to enable either of two hookswitch control option settings. The hookswitch control option settings determine the manner in which the controller responds to the current hookswitch position ("on-hook" or "off-hook") detected by the hookswitch position detector.

Abstract: A semiconductor fabrication method is provided for fabricating a capacitor electrode structure in an integrated circuit such as a DRAM (dynamic random-access memory) device to serve as a data storage capacitor for the DRAM device. According to this method, a self-aligned process is used to form the bottom electrode of each data storage capacitor of the DRAM device. The first step is to form a first insulating layer over the substrate, which is then selectively removed to form contact windows. Next, a plurality of polysilicon plugs are formed in these contact windows, with the top surfaces thereof being below the top surface of the first insulating layer by a predefined depth. After this, sidewall spacers are formed on the sidewalls of the remaining void portions of the contact windows. After bit lines are formed, another insulating layer is deposited and then selectively removed to form electrode-pattern openings to expose the polysilicon plug that is to be connected to the bottom electrode of the capacitor.