Abstract: A laser fuse structure and array are provided which use vertical vias to connect the fuse body of the laser fuse to an interconnect layer. The vias extend downward from the fuse body and thus require less layout area. The thermal conductivity of the vias are minimized by restricting their cross-sectional area and by using tungsten as the via fill material. In some embodiments, an underlying conductive line is widened to minimize damage to the line during lasering. In another embodiment, the width of the fuse body is increased to reduce the energy required to blow the fuse. As a result, unrelated circuit elements and patterned lines can be placed closer together in a laser fuse array, thereby increasing the packing density of such arrays.

Abstract: A zero static power laser fuse circuit is formed from one laser fuse and three transistors, with the fuse connected in series to a reverse-biased diode and with the common node of the fuse and diode connected to the input of a driving circuit, such as a CMOS inverter. Blowing the fuse allows a small subthreshold conduction current to flow to the common node and pull the node to the opposite logic state. This fuse circuit, which allows the capacitance at the common node to be minimized for zero static power operation, requires less circuit area than previous zero static power fuse circuits.