Abstract: A circuit and method for clamping a composite video component signal at the video black level by using horizontal synchronization timing information contained within the signal and clamping the signal during a time interval in which it is at the desired black level.

Abstract: A method and apparatus for fine tuning a memory interface includes receiver operative to receive an input signal. The method and apparatus includes a clock counter operative to calculate a time value based upon the timed sequence determined by the reception of the input signal. The method and apparatus further includes a comparator coupled to receive an input strength indicator signal from the receiver and operative to generate a comparative strength signal based on the comparison of the input signal strength indicator signal and a reference strength signal. Furthermore, the method and apparatus includes a tuner coupled to the clock counter so the tuner receives the time value from the counter, and coupled to the comparator to receive the comparative strength signal from the comparator, whereupon the tuner then generates a tuning signal utilized for an iterative tuning process to fine tune a memory interface.

Abstract: A pseudo random number generator that generates a plurality of intermediate values, where each successive intermediate value is based, at least in part, on one of the succeeding intermediate values, where a final value based on a subset of the plurality of intermediate values. In application, the final value is based on performing a logical operation on the penultimate and last generated intermediate values.

Abstract: A memory architecture for use in a graphics processor including a main memory, a level one (L1) cache and a level two (L2) cache, coupled between the main memory and the L1 cache is disclosed. The L2 cache stores overlapping requests to the main memory before the requested information is stored in the L1 cache. In this manner, overlapping requests for previously stored information is retrieved from the faster L2 cache as opposed to the relatively slower main memory.

Abstract: A graphics processing architecture employing a single shader is disclosed. The architecture includes a circuit operative to select one of a plurality of inputs in response to a control signal; and a shader, coupled to the arbiter, operative to process the selected one of the plurality of inputs, the shader including means for performing vertex operations and pixel operations, and wherein the shader performs one of the vertex operations or pixel operations based on the selected one of the plurality of inputs. The shader includes a register block which is used to store the plurality of selected inputs, a sequencer which maintains vertex manipulation and pixel manipulations instructions and a processor capable of executing both floating point arithmetic and logical operations on the selected inputs in response to the instructions maintained in the sequencer.

Abstract: A method and apparatus facilitates the prevention of interception of incoming data, such as keystroke data in the form of a message to an application, by inserting application generated random insertion data into a message stream. The random insertion data is related to actual data that is being generated for a software application so that it is difficult for an attacker to distinguish between actual message data and inserted message data. The system and method then reads incoming data typically in the form of messages, and filters out the messages that it determines were knowingly inserted. The remaining received messages are determined to be actual data from the data source, such as a keyboard, voice input or other suitable data source. In one embodiment, the system effectively hides actual input data such as actual keystrokes in a stream of randomly generated fake keystrokes.

Abstract: A method and apparatus for facilitating instant messaging utilizes a secure instant message group policy certificate issued by an instant messaging public key infrastructure policy certificate issuing unit. The secure instant messaging group policy certificate is received, such as through a local instant messaging secure public key infrastructure proxy, and contains data defining the group members, references to other groups, security controls and relevant data such as allowed algorithms. The secure instant messaging group policy certificate defines a plurality of different instant messaging groups, each identified by an instant messaging group identifier. Each instant messaging group identifier is associated with a plurality of instant message group number identifiers.

Abstract: Apparatus and method for converting a Y-Pb-Pr component video signal to a R-G-B component video signal. A luminance component video (Y) signal and a red color difference component video (Pr) signal are decoded to produce a red component video (R) signal. The Y signal, a blue color difference component video (Pb) signal and the Pr signal are decoded to produce a green component video (G) signal. The Y and Pb signals are decoded to produce a blue component video (B) signal.

Abstract: In a method and apparatus for generating a power supply voltage, an integrated circuit including an adaptive power supply voltage circuit is provided where a target signal is generated representing an ideal or approximated ideal performance characteristic of a functional block operating with the power supply voltage. A generated functional block test signal is generated representing the performance characteristic of the functional block under these conditions. The adaptive power supply voltage circuit compares the target signal with the generated functional block test signal and adjusts the power supply voltage continuously until the target signal and generated functional block test signal are substantially equal. When the target signal and generated functional block test signal are substantially equal, the power supply voltage is locked for subsequent use. By optimizing the power supply voltage, minimal power dissipation is provided.

Abstract: A method and apparatus for automated testing of display signals from video graphics circuitry includes capturing display signals that are provided from a processing device to the display device. The method and apparatus further includes converting the display signals into data acquisition signals, where a data acquisition signal includes a converted display signal having the display information contained therein wherein the data acquisition signal is in a form capable of being directly analyzed by a testing system. Furthermore, the method and apparatus includes providing the data acquisition signals to a test system that tests the display signals.

Abstract: A mixed signal integrated circuit with self test capability in which a portion of the digital circuitry, during substantially mutually exclusive time intervals, controls self test functions within the analog circuitry and performs digital signal processing functions in conjunction with the remaining portion of the digital circuitry.

Abstract: A method of deinterlacing interlaced fields of video for display in a progressive display device includes providing at least one candidate motion vector per scan line and determining, at least one final motion vector per scan line of interlaced video, for use in deinterlacing the interlaced fields, by iteratively changing the at least one candidate motion vector per scan line based on pixel intensities from each of a plurality of same polarity fields at locations along a single dimension.

Abstract: A wireless sensor network for monitoring one or more selected environmental characteristics. Multiple wireless signal transceivers, disposed in respective portions of a selected environment, respond to one or more wireless beacon signals by selectively collecting, processing and storing data corresponding to one or more characteristics of such portions of the selected environment, and by selectively transmitting respective wireless response signals containing selected portions of such data. Alternatively, multiple wireless signal transceivers, disposed in respective sub-networks in portions of a selected environment, collect and convey data corresponding to one or more characteristics of such selected environment portions.

Abstract: A differential signal comparator includes an input circuit operative to provide an absolute input current difference value that is associated with the absolute difference of differential input signal levels, and a reference circuit operative to provide an absolute reference current difference value that is associated with the absolute difference of the reference signal levels. Current comparison of the absolute input current difference value with the absolute reference current difference value identify whether an input differential signal is bigger than the reference noise level and should be processed, or an input differential signal is smaller than the reference noise level and should not be processed.

Abstract: An apparatus and method collects, for a community of interest, at least one cross certificate associated with an anchor certificate issuing unit, and obtains at least one certificate issuing unit public key and an associated unique identifier for a cross-certified certificate issuing unit identified by the at least one cross certificate. For example, a certificate issuing unit, client unit, or other suitable unit, searches for one or up to all certification authorities or certificate issuing units that it can trust based on cross certificate chains. This is done, for example, from a given trust anchor. The apparatus selects those obtained certificates that satisfy, for example, some search criteria, such as what policy must be enforced in each certificate, for example, the allowed path length or depth that the apparatus is allowed to evaluate, and creates a signed certificate set, such as a list of all trusted certificate issuing units from the perspective of a given trust anchor.

Abstract: A power management control circuit and method thereof includes a power register that contains a number of request tokens for at least one power consumption module. The number of request tokens represents a power adjust level of the at least one power consumption module. The power management control circuit and method thereof further includes a power controller coupled to the power register, wherein the power controller determines whether to adjust the power consumption module based on a comparison of a number of system tokens with the number of request tokens for the power consumption module. The power management control circuit and the method thereof further includes a token generator coupled to the power controller. The token generator generates the predetermined number of system tokens and a token valid signal for clearing an up token register and a down token register for each predetermined time interval.

Abstract: A de-interlacer includes recursive motion history map generating circuitry operative to determine a motion value associated with one or more pixels in interlaced fields based on pixel intensity information from at least two neighboring same polarity fields. The recursive motion history map generating circuitry generates a motion history map containing recursively generated motion history values for use in de-interlacing interlaced fields wherein the recursively generated motion history values are based, at least in part, on a decay function.