Abstract: Shifts in the apparent charge stored on a floating gate (or other charge storing element) of a non-volatile memory cell can occur because of the coupling of an electric field based on the charge stored in adjacent floating gates (or other adjacent charge storing elements). To compensate for this coupling, the read or programming process for a given memory cell can take into account the programmed state of an adjacent memory cell. To determine whether compensation is needed, a process can be performed that includes sensing information about the programmed state of an adjacent memory cell (e.g., on an adjacent bit line or other location).

Abstract: A storage system includes a three-dimensional memory array that has multiple layers of non-volatile storage elements grouped into blocks. Each block includes a subset of first selection circuits for selectively coupling a subset of array lines (e.g. bit lines) of a first type to respective local data lines. Each block includes a subset of second selection circuits for selectively coupling a subset of the respective local data lines to global data lines that are connected to control circuitry. To increase the performance of memory operations, the second selections circuits can change their selections independently of each other. For example, a memory operation is performed concurrently on a first non-volatile storage element of each group of a plurality of groups of non-volatile storage elements. Completion of the memory operation for the first non-volatile storage element of each group is independently detected.

Abstract: Techniques are provided for determining distance to an object in a depth camera's field of view. The techniques may include raster scanning light over the object and detecting reflected light from the object. One or more distances to the object may be determined based on the reflected image. A 3D mapping of the object may be generated. The distance(s) to the object may be determined based on times-of-flight between transmitting the light from a light source in the camera to receiving the reflected image from the object. Raster scanning the light may include raster scanning a pattern into the field of view. Determining the distance(s) to the object may include determining spatial differences between a reflected image of the pattern that is received at the camera and a reference pattern.

Abstract: A take-up fastener is disclosed for fastening a level in a frame construction to the level below so as to resist upward forces generated by wind and other sources on the framed construction. The take-up fastener in general includes a take-up plate, or washer, fastened to a portion of the upper level and a take-up screw fit through the take-up plate and fastened to the adjacent level below. Once the take-up fastener is fully assembled, the take-up plate includes a pair of tabs which are capable of engaging threads on a take-up screw in a way that allows one-way motion of the take-up screw relative to the take-up plate. In particular, the take-up plate can move downward relative to the take-up screw, for example on constricting of the wooden members to which the take-up plate is affixed. However, the engagement between the take-up plate and take-up screw prevents movement of the take-up plate upward with respect to the take-up screw, for example upon an upward load due to wind or other external force.

Abstract: Methods for fabricating control gates in non-volatile storage are disclosed. When forming stacks for floating gate memory cells and transistor control gates, a sacrificial material may be formed at the top of the stacks. After insulation is formed between the stacks, the sacrificial material may be removed to reveal openings. In some embodiments, cutouts are then formed in regions in which control gates of transistors are to be formed. Metal is then formed in the openings, which may include the cutout regions. Therefore, floating gate memory cells having at least partially metal control gates and transistors having at least partially metal control gates may be formed in the same process. A barrier layer may be formed prior to depositing the metal in order to prevent silicidation of polysilicon in the control gates.

Abstract: A LED lighting device includes a cooling lampstand, a circuit, at least one light emitting diode (LED), a sealant and a power converter. The cooling lampstand is made by a resin composition in which the thermal conductivity of the resin composition is about 1-50 W/mk. The circuit directly is disposed on the cooling lampstand. The light emitting diode (LED) is disposed on the cooling lampstand and electrically connected to the circuit. The sealant covers the LED. The power converter is electrically connected to the circuit for supplying an electrical power to the circuit.

Abstract: A system and method are provided for escalating a user or customer to a live agent from a conversational agent when predetermined criteria are met. The conversational agent textually converses in so-called natural language interaction and can run on a computer, such as a server. Upon receiving a first query, the conversational agent creates a new case, and interacts with the customer, in an attempt to resolve the case and satisfy the user. The predetermined criteria for escalation may include a determination that the conversational agent is unable to satisfy a computer-to-computer information request. Alternatively, the predetermined criteria may include patterns and/or words associated with frustration, for example, and/or unrecognized query subject matter, high priority queries, for example to increase sales, etc.

Abstract: Threshold voltage distributions in a non-volatile memory device are narrowed, and/or programming time is reduced, using a programming technique in which the bit line voltage for storage elements having a target data state is stepped up, in lock step with a step up in the program voltage. The step up in the bit line voltage is performed at different times in the programming pass, for different subsets of storage elements, according to their target data state. The start and stop of the step up in the bit line voltage can be set based on a fixed program pulse number, or adaptive based on a programming progress. Variations include using a fixed bit line step, a varying bit line step, a data state-dependent bit line step, an option to not step up the bit line for one or more data states and an option to add an additional bit line bias.

Abstract: A storage system and method for forming a storage system that uses punch-through diodes as a steering element in series with a reversible resistivity-switching element is described. The punch-through diode allows bipolar operation of a cross-point memory array. The punch-through diode may have a symmetrical non-linear current/voltage relationship. The punch-through diode has a high current at high bias for selected cells and a low leakage current at low bias for unselected cells. Therefore, it is compatible with bipolar switching in cross-point memory arrays having resistive switching elements. The punch-through diode may be a N+/P?/N+ device or a P+/N?/P+ device.

Abstract: A process for programming non-volatile storage is able to achieve faster programming speeds and/or more accurate programming through synchronized coupling of neighboring word lines. The process for programming includes raising voltages for a set of word lines connected a group of connected non-volatile storage elements. The set of word lines include a selected word line, unselected word lines that are adjacent to the selected word line and other unselected word lines. After raising voltages for the set of word lines, the process includes raising the selected word line to a program voltage and raising the unselected word lines that are adjacent to the selected word line to one or more voltage levels concurrently with the raising the selected word line to the program voltage. The program voltage causes at least one of the non-volatile storage elements to experience programming.

Abstract: Control circuitry provides control signals to a common X line and a set of Y lines to change a first data storage element of the multiple data storage elements from a first state to a second state by passing a current into the first data storage element from a different Y line through a different storage element. The control circuitry provides control signals to the common X line and the set of Y lines to sequentially change additional data storage elements of the multiple data storage elements from the first state to the second state by passing currents into the additional data storage elements from data storage elements of the multiple data storage elements that were previously changed to the second state and their associated different Y lines.

Abstract: Disclosed is an active sonar system capable of estimating a direction and a range of a target by using a sound pulse. A target range error can be estimated by the active sonar system, by applying a principle that a sound pulse used to detect an underwater target with consideration of a vertical structure of a sound velocity in water is reflected and refracted through a multipath not a linear path.

Abstract: A memory system includes an X line, a first Y line, a second Y line, a semiconductor region of a first type running along the X line, first switching material and a first semiconductor region of a second type between the first Y line and the semiconductor region of the first type, second switching material and a second semiconductor region of the second type between the second Y line and the semiconductor region of the first type, and control circuitry. The control circuitry is in communication with the X line, the first Y line and the second Y line. The control circuitry changes the programming state of the first switching material to a first state by causing a first current to flow from the second Y line to the first Y line through the first switching material, the second switching material, the semiconductor region of the first type, the first semiconductor region of the second type and the second semiconductor region of the second type.

Abstract: A system and methods for acquiring scheduled television programs with coinciding program times. One method includes initially identifying that a conflict exists to acquire the scheduled television programs. Once the conflict is identified, the method identifies one or more alternate sources that contain the scheduled television programs. Acquisition schedules are generated and optimized. Then, at least one of the scheduled television programs are recorded from one of the alternate sources. A user may set user preferences to customize how the system will generate potential acquisition schedules.

Abstract: A system and method for online monitoring partial discharge of a generator are disclosed. The system is connected in parallel with a busbar between the generator and electric network, includes: a near-end circuit on a generator side, which includes a near-end capacitive coupling sensor connected to the busbar and a near-end impedor connected in series with the near-end capacitive coupling sensor; a far-end circuit on an electric network side, which includes a far-end capacitive coupling sensor connected to the busbar and a far-end impedor connected in series with the far-end capacitive coupling sensor; and a detection device, which has a near-end input terminal connected to a connection point between the near-end capacitive coupling sensor and the near-end impedor through a near-end cable, a far-end input terminal connected to a connection point between the far-end capacitive coupling sensor and the far-end impedor through a far-end cable, and a processing unit.

Abstract: A non-volatile storage system includes a substrate, control circuitry on the substrate, a three dimensional memory array (above the substrate) that includes a plurality of memory cells with reversible resistance-switching elements, and circuits to SET and RESET the resistance-switching elements. The circuits that RESET the resistance-switching elements provide a pulse to the memory cells that is large enough in magnitude to SET and RESET the memory cells, and long enough to potentially RESET the memory cell but not long enough to SET the memory cells.

Abstract: The unintentional programming of an unselected (or inhibited) non-volatile storage element during a program operation that intends to program another non-volatile storage element is referred to as “program disturb.” A system is proposed for programming and/or reading non-volatile storage that reduces the effect of program disturb. In one embodiment, different verify levels are used for a particular word line (or other grouping of storage elements) during a programming process. In another embodiment, different compare levels are used for a particular word (or other grouping of storage elements) during a read process.

Abstract: Techniques are disclosed herein for erasing non-volatile memory cells. A subset of the memory cells are pre-conditioned prior to erase. The pre-conditioning alters the threshold voltage of the memory cells in a way that may help make later calculations more accurate. As an example, memory cells along a single word line might be pre-conditioned. After the pre-conditioning, the memory cells are erased using a trial erase pulse. A suitable magnitude for a second pulse is determined based on the magnitude of the trial erase pulse and data collected about the threshold voltage distribution after the trial erase. The second erase pulse is used to erase the memory cells. Determining an appropriate magnitude for the second erase pulse minimizes or eliminates over-erasing.

Abstract: Techniques are provided for fabricating memory with metal nanodots as charge-storing elements. In an example approach, a coupling layer such as an amino functional silane group is provided on a gate oxide layer on a substrate. The substrate is dip coated in a colloidal solution having metal nanodots, causing the nanodots to attach to sites in the coupling layer. The coupling layer is then dissolved such as by rinsing or nitrogen blow drying, leaving the nanodots on the gate oxide layer. The nanodots react with the coupling layer and become negatively charged and arranged in a uniform monolayer, repelling a deposition of an additional monolayer of nanodots. In a configuration using a control gate over a high-k dielectric floating gate which includes the nanodots, the control gates may be separated by etching while the floating gate dielectric extends uninterrupted since the nanodots are electrically isolated from one another.

Abstract: Optimized electrodes for ReRAM memory cells and methods for forming the same are discloses. One aspect comprises forming a first electrode, forming a state change element in contact with the first electrode, treating the state change element, and forming a second electrode. Treating the state change element increases the barrier height at the interface between the second electrode and the state change element. Another aspect comprises forming a first electrode in a manner to deliberately establish a certain degree of amorphization in the first electrode, forming a state change element in contact with the first electrode. The degree of amorphization of the first electrode is either at least as great as the degree of amorphization of the state change element or no more than 5 percent less than the degree of amorphization of the state change element.