Patents Represented by Attorney, Agent or Law Firm William B. Kempler
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Patent number: 8154222Abstract: One embodiment of the present invention includes a current regulator circuit. The circuit includes at least one switch configured to periodically couple and decouple a respective at least one voltage rail to an inductor to maintain a current through the inductor. The circuit also includes a pulse-width modulation (PWM) controller configured to set a duty-cycle associated with a switching signal to control the at least one switch based on a feedback signal that is associated with a magnitude of the current. The circuit also includes a switch-controlled current path configured to shunt the current from a load in response to a control signal. The circuit further includes an error circuit configured to provide an error term to the PWM controller upon activating the control signal to adjust the duty-cycle substantially instantaneously in response to the control signal.Type: GrantFiled: July 23, 2008Date of Patent: April 10, 2012Assignee: Texas Instruments IncorporatedInventors: Roman Korsunsky, Mark S. Pieper
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Cell voltage abnormality detector and cell voltage monitoring device for a multi-cell series battery
Patent number: 8154253Abstract: A circuit for detecting battery cell abnormalities in a multi-cell series battery for effectively and quickly detecting abnormalities with a simple, small circuit that provides improved reliability, safety and service life of the multi-cell series battery. In the voltage monitoring device 12, immediately after the start of the monitoring cycle of any battery cell BTi, cell voltage abnormality detector 14 checks whether cell voltage Vi is outside of the normal operating range. The cell voltage abnormality detector 14 has: a group of selection switches 18 for selecting any battery cell BT of multi-cell series battery 10 and retrieving its voltage to first and second monitoring terminals A, B; cell voltage/monitoring current converter 20; monitoring current/monitoring voltage converter 22; comparison/evaluation circuit 24; evaluation signal output circuit 26 and abnormality detection controller 28.Type: GrantFiled: September 12, 2008Date of Patent: April 10, 2012Assignee: Texas Instruments IncorporatedInventor: Kazuya Omagari -
Patent number: 8155164Abstract: The objective of this invention is to provide a circuit that generates a spread frequency spectrum waveform with shaped frequency spectrum distribution. The waveform generator has a spread spectrum waveform generating circuit that generates a waveform with a spread spectrum and frequency spectrum distribution shaping circuit that shapes the frequency spectrum distribution of the spread spectrum waveform. In one embodiment, distribution shaping circuit can perform shaping such that the spread spectrum waveform has a frequency spectrum distribution having a spectrum reducing part in at least one band. Also, in one embodiment, the frequency of the spread spectrum waveform can vary periodically or nonperiodically.Type: GrantFiled: September 29, 2005Date of Patent: April 10, 2012Assignee: Texas Instruments IncorporatedInventors: Akira Yasuda, Takashi Kimura
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Patent number: 8148914Abstract: In accordance with an aspect of the present invention, an LED driving circuit includes a digital-to-analog converter and a driving portion. The circuit is operable to turn off the digital-to-analog converter at times when the driving portion is not providing a high signal. As such the digital-to-analog converter will waste less energy.Type: GrantFiled: August 4, 2009Date of Patent: April 3, 2012Assignee: Texas Instruments IncorporatedInventors: Jonne J. Sebastian Lindeberg, Tri Cao Nguyen, Suribhotla Rajasekhar
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Patent number: 8148963Abstract: A converter has a main feedback path and two auxiliary feedback paths from an output node to an auxiliary differential input pair of a comparator. The auxiliary feedback paths have different RC time constants so that a differential ramp signal is effectively applied to the auxiliary differential inputs of the comparator. The circuit design compensates for a negligibly small equivalent series resistor of an output capacitor so that modern capacitors may be used without compromising the stable oscillation of the converter.Type: GrantFiled: August 13, 2008Date of Patent: April 3, 2012Assignee: Texas Instruments Deutschland GmbHInventors: Neil Gibson, Kevin Scoones
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Patent number: 8149040Abstract: A system is provided for generating a plurality of different voltage level clock signals. The system comprises an electrical energy storage pack having a plurality of series coupled electrical energy storage cells that provide a plurality of different output voltage level, a reference oscillator that provides a reference clock signal and a plurality of voltage clamps that receive the plurality of different output voltage levels and output the plurality of different voltage level clock signals at respective output nodes. The plurality of voltage clamps are configured to clamp each of a given output node to a respective high-side voltage level in response to pulling up of the given output node toward a respective high output voltage level and to clamp each of the given output node to a respective low-side voltage level in response to pulling down of the output node toward a low output voltage level.Type: GrantFiled: July 15, 2010Date of Patent: April 3, 2012Assignee: Texas Instruments IncorporatedInventors: Karthik Kadirel, Umar Jameer Lyles, John H. Carpenter, Jr.
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Patent number: 8141786Abstract: A Smart Card module with flip-assembled chip (101) on a metallic strap (112) adhering to an insulating substrate (111). Chip (101) is in the gap (122) of a metal carrier (120), strap (112) conductively attached to the carrier. Carrier (120) is designed to practically surround the chip, and has a thickness about equal to the chip thickness. Overall module thickness is less than 250 ?m without dangerously thinning the chip. Additional strength may be acquired by filling any space of gap (122) not occupied by chip (101) with encapsulation compound (150). Metal carrier (120) further provides contact areas (120a, 120b) for higher level system interconnection (stacking of modules).Type: GrantFiled: January 18, 2008Date of Patent: March 27, 2012Assignee: Texas Instruments IncorporatedInventors: Sarvotham Bhandarkar, Hoang Hoang
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Patent number: 8138735Abstract: A start up circuit (4-1) for a boost circuit (10) includes an adjustable-duty-cycle oscillator (1-2) that turns on a switch transistor (MSW) connected to an inductor (L) receiving an input voltage (VIN). If a voltage (V9) of a junction between the transistor and the inductor exceeds a predetermined value corresponding to a maximum inductor current (IL), an amplifier (A1) immediately terminates a first phase of an oscillator cycle, which turns off the transistor. Built-up inductor current is steered into a load. Duty-cycle-adjustment circuitry (R1,R2,C1) causes the oscillator to complete a normal second phase of the cycle before a new cycle begins.Type: GrantFiled: December 7, 2009Date of Patent: March 20, 2012Assignee: Texas Instruments IncorporatedInventor: Vadim V. Ivanov
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Patent number: 8134850Abstract: Various embodiments of the present invention provide voltage converters and methods for using such. As one example, a voltage converter is disclosed that includes a transformer, an operational detector, and a controllable oscillator. The transformer includes a first winding and a second winding, and the operational detector provides an electrical output corresponding to an operational characteristic of the transformer. The controllable oscillator provides a clock output with a frequency corresponding to the electrical output. This clock output at least in part controls application of a voltage input to the first winding.Type: GrantFiled: January 30, 2008Date of Patent: March 13, 2012Assignee: Texas Instruments IncorporatedInventors: Rais K. Miftakhutdinov, Lin Sheng, John R. Wiggnehorn
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Patent number: 8130889Abstract: A novel receive timing manager is presented. The preferred embodiment of the present invention comprises an edge detection logic to detect the data transition points, a plurality of data flip-flops for storing data at different sample points, and a multiplexer to select the ideal sample point based on the transition points found. A sample window is made with multiple samples. The sample window size can be designed smaller or greater than the system clock period based on the data transfer speed and accuracy requirement.Type: GrantFiled: April 4, 2005Date of Patent: March 6, 2012Assignee: Texas Instruments IncorporatedInventors: Denis Roland Beaudoin, Ritesh Dhirajlal Sojitra, Gregory Lee Christison
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Patent number: 8129962Abstract: Apparatus and methods for reducing output load transients of a low dropout voltage regulator (“LDO”) are disclosed herein. A voltage regulator includes an output driver coupled to a regulator output pin, the output driver provides current to a load external to the regulator. A clamping device is coupled between the output pin and an internal node of the regulator. The clamping device forces a voltage at a control input of the output driver to follow the voltage at the output pin when the output driver is disabled.Type: GrantFiled: August 15, 2008Date of Patent: March 6, 2012Assignee: Texas Instruments IncorporatedInventors: Yong Xie, Gregory G. Romas, Jr.
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Patent number: 8125800Abstract: An isolated switching regulator has a closed-loop soft-start feature that allows tighter regulation of the output voltage and eliminates or reduces overshoot. It also has an optional reset feature which will resoft-start the regulator during recovery from a fault on the output voltage.Type: GrantFiled: October 17, 2008Date of Patent: February 28, 2012Assignee: Texas Instruments IncorporatedInventors: H. Pooya Forghani-zadeh, Luis Alberto Huertas-Sanchez, Gregory Wallis Collins
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Patent number: 8125238Abstract: A coupling line is provided for coupling a signal generator to a device under test and includes a first Zener diode and a second Zener diode. The first Zener diode and the second Zener diode are coupled in an antiserial manner. They are adapted to couple the signal generator to the device under test when the signal generator is active and decouple the signal generator from the device under test when the signal generator is inactive.Type: GrantFiled: June 24, 2009Date of Patent: February 28, 2012Assignee: Texas Instruments Deutschland GmbHInventor: Adrian Stenzel
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Patent number: 8125189Abstract: A system is provided for charging a battery with an AC adapter. The system includes a first closed loop electrical path between the battery and the AC adapter. The first closed loop electrical path includes a first monitoring circuit for monitoring at least one first parameter of the system and a control circuit for dynamically adjusting the AC adapter output to the battery in response to the at least one first parameter exceeding an associated predetermined threshold. The system includes a second closed loop electrical path between the battery and the AC adapter. The second closed loop electrical path includes a second monitoring circuit for monitoring at least one second parameter of the system and a protection circuit responsive to the at least one second parameter exceeding an associated predetermined threshold for protecting the system until the AC adapter reaches a predetermined value.Type: GrantFiled: April 11, 2008Date of Patent: February 28, 2012Assignee: Texas Instruments IncorporatedInventor: Jose Antonio Vieira Formenti
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Patent number: 8120334Abstract: A system and method for managing phases in a multiphase switching power supply turns off a phase in light load conditions and turns on a phase in heavier load conditions. The increase or decrease in the number of phases changes the efficiency of the power supply in response to operating conditions. The phases of the power supply may be synchronized and interleaved. Input current or power representing power supply loading provides a criteria for switching phases on or off. The input current can be taken from an input current sense resistor. The input power can be determined based on a control for managing phases. Turning a phase off causes remaining phases to have an increased on-time or gain to smooth the transition between differing numbers of active phases.Type: GrantFiled: May 1, 2007Date of Patent: February 21, 2012Assignee: Texas Instruments IncorporatedInventors: Richard L. Valley, Isaac Cohen
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Patent number: 8120209Abstract: A voltage sensing device with which high-precision voltage sensing is possible without the need to obtain a unique correction constant for each device. A pair of voltage input nodes NCk and NCk-1 is selected from voltage input nodes NC0-NCn in switch part 10, and they are connected to sensing input nodes NA and NB in two types of patterns with different polarity (forward connection, reverse connection). Sensing input nodes NA and NB are held at reference potential Vm by voltage sensing part 20, and current Ina and Inb corresponding to the voltage at voltage input nodes NCk and NCk-1 flows to input resistors RIk and RIk-1. Currents Ina and Inb are synthesized at different ratios in voltage sensing part 20, and sensed voltage signal S20 is generated according to the synthesized current Ic. Sensed voltage data S40 with low error is generated according to the difference between the two sensed voltage signals S20 generated in the two connection patterns.Type: GrantFiled: September 3, 2009Date of Patent: February 21, 2012Assignee: Texas Instruments IncorporatedInventors: Toru Tanaka, Akio Ogura, Kazuya Omagari, Nariaki Ogasawara
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Patent number: 8120283Abstract: A LED device having a LED array, LED driver ICs, DC-DC converter, a first feedback circuit consisting of voltage dividing resistors, and a headroom voltage monitoring circuit having controller and second feedback circuit. In second feedback circuit, headroom voltages obtained at output current terminals of the LED driver ICs, are fed back to DC-DC converter.Type: GrantFiled: May 20, 2009Date of Patent: February 21, 2012Assignee: Texas Instruments IncorporatedInventors: Shinichi Tanaka, Kiyoshi Narisawa
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Patent number: 8120884Abstract: A voltage protection circuit that has a protection transistor coupled between a voltage supply pin of an integrated circuit and a voltage output terminal of the integrated circuit. A biasing circuit is coupled to a control node of the protection transistor and configured to cause the protection transistor to turn on to form a low impedance path between the voltage supply pin and the voltage output terminal when a positive supply voltage is coupled to the voltage supply terminal and to cause the protection transistor to turn off when a negative supply voltage is coupled to the voltage supply terminal. An electro-static discharge (ESD) protection circuit may also be connected between the voltage supply pin and a reference node that is configured to conduct a negative static discharge current for period of time, and to not conduct a negative current continuously.Type: GrantFiled: February 9, 2010Date of Patent: February 21, 2012Assignee: Texas Instruments IncorporatedInventor: Weibiao Zhang
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Patent number: 8115453Abstract: A system for managing energy stored in a plurality of series connected energy storage units has a plurality of energy storage unit controllers, each controller being associated with one of the plurality of energy storage units, a balancing circuit between two of the energy storage units, the balancing circuit being controlled by at least one of the energy storage unit controllers, a serial electrical interface between the energy storage unit controllers for providing voltage isolated bi-directional communication, and a central controller in electrical communication with the energy storage unit controllers.Type: GrantFiled: November 5, 2009Date of Patent: February 14, 2012Assignee: Texas Instruments Northern Virginia IncorporatedInventors: John Houldsworth, Gary L. Stirk
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Patent number: 8115463Abstract: A low drop out (LDO) voltage regulator (10) includes a pass transistor (MPpass) having a source coupled by an output conductor (4) to a load and a drain coupled to an input voltage to be regulated. An error amplifier (2) has a first input coupled to a reference voltage, a second input connected to a feedback conductor (4A), and an output coupled to a gate of the pass transistor. A parallel path transistor (MPpa) has a source coupled to the input voltage, a gate coupled to the output (3) of the error amplifier (2), and a drain coupled to the feedback conductor. A feedback resistor (Rf) is coupled between the feedback conductor and the output conductor.Type: GrantFiled: August 26, 2008Date of Patent: February 14, 2012Assignee: Texas Instruments IncorporatedInventor: Jianbao Wang