Abstract: A bi-directional printed circuit motor is coupled to drive at least a pair of one way clutches which selectively actuate one or more utilization devices dependent on the direction of the motor. The utilization devices may, for example, include a print hammer assembly, an inked ribbon and paper driver of a high speed printer in a computer system.

Abstract: A signal amplitude equalizer circuit, having linear phase, for reforming high density magnetically recorded read-back signals to remove peak shift and the resulting errors caused thereby. The equalizer circuit employs series balanced differential amplifier circuits in connection with properly terminated delay lines across the amplifier output terminals to provide an adjustable transfer function that transforms the readhead signal, that follows an exponential frequency spectra curve, into a cosine power frequency spectra curve which, in the time domain, possesses a sufficiently narrow base to eliminate peak shift and its resulting amplitude decay.

Abstract: A tapped delay line (39) terminated with its characteristic impedance at both ends is connected to receive a differential input signal across ends (35, 37) of the delay line. Delay line taps 41, 43), as well as ends, are connected symmetrically to a pair of summing networks (71, 73) where voltage signal components having different delays from the input signal are linearly combined. The output waveforms from both summing networks are combined to provide a balanced differential signal that has been both amplitude equalized and differentiated from the input signal with variable amplitude for use in a signal detector (87, 89) that requires such a shaped signal waveform.

Abstract: An electronic tachometer that includes an integrator for producing a speed signal by integrating a signal representative of acceleration of a body and a differentiator for producing a speed signal by differentiating a signal representative of the position of the body, the differentiator being formed by a passive RC circuit and operatively associated with circuitry for alternately supplying to the differentiator two signals representative of position, one of which is inverted so that signals of a single polarity are supplied to the differentiator, and further circuitry for connecting the differentiator output to the integrator feedback circuitry so as periodically to update or reset the speed signal produced by the integrator, which is formed by an operational amplifier having a capacitive feedback which is shunted by a resistor when the differentiator output is active to update the integrator.

Abstract: A method of and apparatus for determining the gel point of a sample of epoxy resin. An aluminum foil tube containing the sample is inserted into the test pressure sensor which is located within a preheated laboratory environmental chamber. The test pressure sensor consists of two knurled cylinders each rotatably mounted about its axis wherein the axes are parallel and the plane of the two axes is horizontal. The axis of one of the cylinders is fixedly mounted. The axis of the other cylinder is slidably mounted within the horizontal plane of the two axes. A spring tends to force the axis of the slidably mounted cylinder toward the axis of the fixedly mounted cylinder. The sample becomes liquid within the tube, and the two are drawn into the nip of the cylinders by their rotation. The cylinders continue to rotate collapsing the sample tube within the nip of the cylinders causing the liquid resin to be displaced above the nip of the cylinders within the sample tube.

Abstract: An electrostatic copying machine includes a reservoir for liquid developer made up of toner particles in a dispersant. A photoconductive drum, adapted after receiving a latent electrostatic image thereon to pass through the liquid developer in the reservoir and to have an electrostatic image developed on the drum. A metering roller for removing excess dispersant is positioned between the reservoir and an air knife which projects a sharp thin jet of pressurized air at about a 45 degree angle with respect to the surface of the drum. The air pressure produced by the air knife drives any remaining spent dispersant on the surface of the drum back to the reservoir by way of the metering roller and the latent image on the drum is subsequently transferred to paper.

Abstract: The present invention is a vacuum furnace arrangement which in the preferred embodiment is generally cylindrical in shape having a hot zone chamber within, the hot zone chamber has heat insulating material secured to the inside surface of the outside wall. Secured, at several locations, to the outside wall and passing inwardly therefrom, through the heat insulating material, are a number of molybdenum rods. A heating element located in the hot zone chamber, in the preferred embodiment, is a flat strip of molybdenum, formed to approximate a circle, and which has apertures located therein with said rods passing therethrough. At each aperture there is a relatively long electrical insulator sleeve fitted over the rod to keep the rod electrically insulated from the heating element. The long sleeves in turn are held in position, within the aperture by a large disc-like shield on both ends and each of said shields in turn has an aperture through which the rod passes.

Abstract: The disclosure teaches an improved connector containing a fold bushing for connecting an inner braid of a transmission line to its associated shield conductor within the connector and for minimizing the reflection signal induced by each connector affixed to the transmission line.

Abstract: A method of and an apparatus for differentiating between hard and soft failures of semiconductor memory cells for the purpose of error logging only hard failures. A spare bit position is appended to each addressable location within the semiconductor memory. The spare bit position is set, if the corresponding addressable location is observed to contain a single bit error during regeneration. The spare bit position is cleared, if the corresponding addressable location is observed not to contain a single bit error during regeneration. An error log entry is made for normal read access to an addressable location observed to contain a single bit error only if the spare bit is set indicating that a single bit error was present during regeneration of that addressable location.

Abstract: An electrically and mechanically modular design of a high impedance, passive transceiver is disclosed for use in distributed, serial transmission systems to provide half uplex interfacing to multiple users with minimum loading and reflection. The transceiver is selectively operable in either of two modes: a receive mode for receiving low-level serial, bi-phase (3 state) Manchester coded signals and transmitting (2 wire, 2 state) signals at transistor-transistor logic (TTL) levels; and a transmit mode for receiving (2 wire, 2 state) signals at TTL levels and transmitting the low-level, serial bi-phase, (3 state) signals on the bus.

Abstract: There is provided an error detection and correction circuit which is optimized in terms of the operation, part count and the like. This invention includes parity generator circuitry to generate parity signals in accordance with a variation of the Hamming Code in response to the application of a plurality of input data bits. The parity signals are applied to a memory bus during a write cycle. During a read cycle, the parity generators produce a parity error signal, if appropriate, to indicate an error in parity. The error correction circuit receives the data bits from the memory (or memory bus) along with the parity error signals generated by the parity generator circuit portion. The data signals and parity error signals are gated together and supplied to Exclusive-OR gates. If an error is indicated by the level of the input signal, the Exclusive-OR gate converts the signal thereby correcting the erroneous data bit.

Abstract: Inverter power supply control circuitry that protects power supply components from relatively quick-changing over-current conditions and that provides regulation of the power supply's output current upon relatively slow-changing load conditions.

Abstract: Disclosed is a cross-tie wall memory system for the generating, propagating and detecting of binary data represented by the presence or absence of cross-tie, Bloch-line pairs along a cross-tie wall in a thin magnetic layer. The system includes a three-level structure comprised of the following superposed layers: a straight-edged current conductive stripline; a serrated-edged thin magnetic layer data track, and a wide-narrow-edged current conductive stripline terminated on one end by a cross-tie, Bloch-line pair generator. A cross-tie detector is positioned intermediate the ends of the data track and is sandwiched between the data track and the wide-narrow-edged current conductive stripline. An N-bit data word is stored in the data track between the generator and the detector, is shifted through the detector for readout of the stored data word and is then restored into its original stored position by being shifted in a reverse manner along the data track and back through the detector.

Abstract: Disclosed is a cross-tie wall memory system for the generating, propagating and detecting of binary data represented by the presence or absence of cross-tie, Bloch-line pairs along a cross-tie wall in a thin magnetic data track. The system includes a three-level shift register structure comprised of the following layers: first and second substantially similar, serrated-edged current conductive striplines and a serrated-edged thin magnetic layer data track. The shift register is terminated on one end by a cross-tie, Bloch-line pair generator and on the other end by a cross-tie detector. A data word is stored in the data track between the generator and the detector and is shifted through the detector for readout of the stored data word. The first and second serrated-edged striplines are formed of alternate wide-narrow portions with the wide portion of one stripline oriented above/below the narrow portion of the other stripline.

Abstract: Configurations of Boolean elements for implementing a sequential GF(2.sup.n) Galois multiplication gate are disclosed. Each configuration includes a single subfield GF(2.sup.m) Galois multiplication gate, where m is a positive integral divisor of n, e.g., n=8 and m=2, and assorted controls. Also disclosed is a sequential implementation of a GF(2.sup.n) Galois linear module as described in the J. T. Ellison Pat. No. 3,805,037 wherein the controls of the sequential GF(2.sup.n) multiply gate cause the Galois addition (bit-wise Exclusive-OR) of an n-bit binary vector, Z, to the final Galois product.

Abstract: Apparatus for correcting memory errors by testing the addressable location causing the memory error in realtime. The memory responds to read requests by accessing the contents of the requested addressable location. If the contents of the addressable location contain errors, which are uncorrectable by other means, the memory saves the erroneous data word and the requested addressable location is tested by immediately writing into and reading from the requested addressable location. Two data words are sequentially written into and read from the requested addressable location which cause both a one and a zero to be written into each bit position of the requested addressable location. If the reads reveal an error at any bit positions of the requested addressable location, the corresponding bit positions of the erroneous data word are complimented and the resultant is transferred to the requestor using the normal data path.

Abstract: An inverter power supply circuit that compensates for variations in the power supply's output voltage, which variations are due to variations in output loading, is disclosed. The input side of the circuit's DC-DC Converter-Inverter-Converter coupling transformer incorporates a compensation network having an impedance that is equivalent to the power supply's output impedance. Variations in the output loading cause corresponding proportional changes in the currents passing through the load and the compensating network. The changing current in the compensating network on the input side of the coupling transformer generates a corresponding changing voltage that is coupled, as a positive feedback, to the chopping transistor of the power supply to provide compensation for the variation in loading on the output side of the coupling transformer.

Abstract: A method of and an apparatus for magneto-resistively detecting information in a cross-tie memory system is disclosed. The detector includes a first conductive element, which is the terminating portion of an electrically-conducting wide-narrow edged propagating drive line, and second and third conductive elements that are serially aligned along a magnetic, serrated-edged data track, which three conductive elements form two gaps therebetween. The two gaps are oriented along the data track at respective narrow portions, a first narrow portion which may support a cross-tie but which second narrow portion will not support a cross-tie. A differential sense amplifier is coupled across the two gaps using the second narrow portion as a reference segment to differentially detect the presence vel non of a cross-tie in the first narrow portion.

Abstract: The present device has a housing means which has a central aperture into which there is located a source of white light and a lens arrangement to direct the white light to a focal point which lies just beyond the base of the housing. The housing means has four other apertures formed therein which lie at approximately 45.degree. to the base of the housing and which open into the central aperture so that light reflected from said focal point will be directed through each of said four other apertures. In the preferred embodiment three of said other apertures lie 120.degree. apart and each of these has a different color light filter located therein which receive reflected light from said focal point. In each of said last mentioned apertures the associated color light filter is followed by an infra-red light filter and thereafter by a photosensitive device.

Abstract: The present device includes a pair of wires which are located one above the other in a plane that lies parallel and orthogonal to the center lines of a path which a scanning head is going to view, as it travels in a scanning excursion. The wires are held taut and when they are in vertical alignment to the human eye (for convenience as reflected in a tilted mirror) then material to be scanned along a certain path can be centered under what appears to be "one wire" and in this way the scanning head will pass directly over the proper portion of the material.