Abstract: This invention includes timer means in combination with switching means disposed in a copying machine for cyclically and automatically activating a pump which circulates liquid developer through the copying machine for a predetermined period of time thereby periodically mixing the toner particles and dispersant in the liquid developer while also rotating the copier drum through an incremental angle thereby periodically immersing each section of the drum surface in the liquid developer reservoir.

Abstract: A voltage regulation loop for the rejection of line frequency ripple of 0-180 Hz in an inverter power supply is disclosed. The loop includes an error amplifier (E), a pulse-width modulator (P), an inverter (I), a second summing node (N.sub.2), an output filter (F), and a feedback loop back to a first summing node N.sub.1 at the error amplifier. The novel pulse-width modulator is non-linearly operated to provide an improved rejection of the power supply's line frequency ripple and an improved stability.

Abstract: Apparatus for scaling addresses received by a memory module in a modular requestor-memory system in which standard memory modules may be of a discretely variable size and utilized in a plurality of positions in an overall contiguous memory addressing scheme. In particular, this scaling apparatus enables a modular memory which is only partially populated, i.e., only able to respond to a subset of the set of all addresses available, to be located in any one of several positions representing different addressing ranges. This is accomplished without modification of the memory module itself. The memory module knows its discrete capacity, or size, by virtue of the population of the memory array storage locations (array cards) contained therein. The memory module then uses this information to scale, or strip off, the appropriate number of bits from the gross address to allow addressing of the restricted number of memory locations present in the memory module.

Abstract: In a digital information storage system or the like, start up power sequencing for independently operable machines such as disk drives each equipped with a microprocessing unit is provided through a simplified power sequencing circuit. The power sequencing circuit is operatively coupled with an independent preprogrammable micropocessing unit in each machine and to a single control line common to all disk drives. The microprocessing unit is preprogrammed to interact with the power sequencing circuit to provide Enable/Disable signals to the control line and to sense the state of the control line. In particular, the microprocessing unit executes a preprogrammed sequence of steps in interaction with the control line to sequence the start-up of each spindle motor irrespective of the number of disk drives coupled to the control line, thereby preventing electrical power overload.

Abstract: The invention provides data processing duplication and internal error checking within an integrated circuit chip at intermediate points along the logic chain. In one aspect of the invention, duplicate functional logic within the chip is utilized together with multiple fault detectors to provide error checking of the primary logic chain, mechanical interconnection failures, and power and clock pulse checking. The detectable failures are both transient and hard failures. Other problems are in addition resolvable by utilization of duplicate complementary logic in place of duplicate functional logic, such other problems including chip contamination during manufacture, mask problems and functional design problems. The multiple fault detectors provide a multiplicity of error signals which are multiplexed within the chip to produce encoded output error signals each of which designates the fault which has been detected within the chip.

Abstract: Apparatus for avoiding ambiguous data in a multi-requestor computing system of the type wherein each of the requestors has its own dedicated cache memory. Each requestor has access to its own dedicated cache memory for purposes of ascertaining whether a particular data word is present in its cache memory and of obtaining that data word directly from its cache memory without the necessity of referencing main memory. Each requestor also has access to all other dedicated cache memories for purposes of invalidating a particular data word contained therein when that same particular data word has been written by that requestor into its own dedicated cache memory. Requestors and addresses in a particular cache memory are time multiplexed in such a way as to allow a particular dedicated cache memory to service invalidate requests from other requestors without sacrificing speed of reference or cycle time of the particular dedicated cache memory from servicing read requests from its own requestor.

Abstract: A coding system produces a code with enhanced acquisition security by generating a plurality of linear component codes, C.sub.1, C.sub.2, . . . C.sub.n, combining the component codes in accordance with a modulo-2 addition rule to form a linear first composite code, nonlinearizing the first composite code to form a nonlinear second composite code, time delaying the component codes, C.sub.1, C.sub.2, . . . C.sub.n-1, and combining the time delayed codes with the nonlinear second composite code in accordance with a Boolean majority voting rule to form a nonlinear acquisition composite code. Acquisition of the nonlinear acquisition composite code is achieved by generating a plurality of linear reference component codes, R.sub.1, R.sub.2, . . . R.sub.n, that correlate respectively with the linear acquisition component codes, C.sub.1, C.sub.2, . . . C.sub.

Abstract: A printed circuit board guide spring having spring members for securing the printed circuit board and the guide spring within guide slots in a heat sink.

Abstract: An interface which connects input/output (I/O) controllers to a data channel in a data processing system. A bidirectional priority bus is provided interconnecting the channel with the controllers. Each controller is assigned a priority level. When a controller requires service, it signals the channel over a common request line and the channel responds with a channel select signal. Each requesting controller gates a binary number corresponding to its priority level onto the common priority bus. Contending controllers resolve priority among themselves by monitoring the priority bus. If a controller detects a higher priority level than its own level on the bus it removes its priority number from the bus. The highest priority controller then activates an acknowledge signal and places its device address on a bidirectional data bus in response to a ready signal from the channel.

Abstract: A system for dynamic cleaning of remnant material from a product, such as densely packaged electrical assemblies, employs a receptacle for containing cleaning fluid and a rack rotatably mounted in the receptacle for holding the product to be cleaned. The receptacle is divided by an upright transverse wall into first and second reservoirs, with the product being rotatably mounted by the rack in the first reservoir. A pair of conduits having openings facing upwardly toward a side of the product are mounted in the first reservoir adjacent to one another and extend transversely across the receptacle below the product. A blower forces a pressurized flow of a gaseous medium through a first one of the conduits and the openings therein toward the product side, while a pump forces a pressurized flow of cleaning liquid through a second one of the conduits and the openings therein toward the same product side.

Abstract: An automatic clock phase adjustment circuit is incorporated in a local unit of a data clocking system. The local unit also includes a clock pulse generator and a local data storage device. The system also includes a remote unit having a remote data storage device. The automatic clock phase adjustment circuit receives clock pulses from the generator and produces output clock pulses having first and second half periods interconnected by a clocking transition which when applied to the remote storage device causes clocking out of data to the local storage device. The circuit also produces a sampling pulse during each of the first and second half periods of the output clock pulses and is operable to detect in which particular one of the half periods a positive transition in the incoming data has occurred during the interval of a sampling pulse in that half period.

Abstract: A method of and a detector for magneto-resistively reading out the information that is stored in a cross-tie wall memory system. The detector includes two current conductive elements that are positioned along and across the cross-tie wall in a magnetic film that is configured into a data track for sandwiching a plurality of memory cells therebetween. A separate current conductive element is centered over each of the sandwiched memory cells for conducting the read current drive signal out of the data track in the area of the Bloch-line, but forcing the read current drive signal through the data track in the area of the cross-tie. A stored binary 1, represented by a cross-tie, Bloch-line pair, is propagated into one end of the detector and is replicated in all of the sandwiched memory cells; conversely, a stored binary O, represented by the absence of a cross-tie, Bloch-line pair, would be replicated in all of the sandwiched memory cells.

Abstract: The present invention includes a holder bar which has two holes therein and into each of which is fitted a permanent magnet. Each permanent magnet is secured by a rod to a cap element and in between each cap element and the upper surface of the holder there is located a spring, to spring-load the associated magnet away from the bed upon which the holder is resting. The holder has a relatively straight edge and, in a preferred embodiment, has a stepped portion to form two substantially straight edges. A sheet of material such as a printed sheet is located on the bed in a particular position where it can be read by a scanner or cut or subjected to some interaction with a mechanism. The holder is brought in abutment with the sheet and the magnets are depressed to be magnetically secured to the bed and thus secure the holder. Thereafter, similar sheets can be readily aligned against the holder or guide.

Abstract: Magnetic recording apparatus including signal equalization means for recording data so as to obtain read pulses therefrom which are symmetrical about their peak and substantially narrowed at both the base and half amplitude points whereby increased packing density may be achieved without attendant peak shift, the equalization being provided by means for generating an ac bias signal in conjunction with data transitions and associated equalizer transitions referenced to the bias signal for application to magnetic recording means.

Abstract: A timing circuit for a track following servo system wherein an odd servo track having a series of prerecorded odd dibits thereon and an adjacent even servo track having a series of even dibits prerecorded thereon are moved with respect to a servo head to induce in the servo head signals that vary with the occurrence of the dibits and have an amplitude representative of the lateral position of the servo head with respect to the servo tracks. The servo head and its associated preamplifier produce a first signal having portions from both odd and even servo tracks and a second signal that is the inverse of the first signal. The first and second signals are processed by parallel identical circuit paths to generate a clocking signal that times the remainder of the data storage system in synchronism with the spacing of dibits on the servo tracks.

Abstract: A phase comparator for a digital phase locked loop which provides first and second order error signals for phase and frequency correction of a voltage controlled oscillator in the loop with respect to data being read for self synchronization of the data. A first order error signal is generated in a first phase detector which operates only during a VCO "unsafe" condition, i.e., when a data pulse is beyond a present limit. A finer, second order error signal is generated in a second phase detector which operates only during a VCO "safe" condition, i.e., when a data pulse is within a preset limit.

Abstract: A method and apparatus for accessing data blocks in a computer system having multiple-disk drive rotational position sensing which is not centrally synchronized and where data read and write requests are normally weighted by the order of availability of requested data blocks. The weighting of the priority, or queue position, of selected data blocks is modified by advancing the apparent initial location of data blocks designated for preferental access and maintaining an availability signal, or peripheral interrupt, for an extended period. A special pre-data-transfer instruction indicates the duration of the peripheral interrupt. A circuit for implementing the invention has a storage register for receiving the special instruction, a down counter for decrementing for the duration of the designated pre-data-interrupt and an interrupt duration control latch for issuing and extinguishing the interrupt.

Abstract: A method of and an apparatus for counting is disclosed. The counter includes a generator of cross-tie, Bloch-line pairs and a shift register of N stages or memory cells along which the cross-tie, Bloch-line pairs are propagated or replicated into a detector. The method includes coupling a series of bipolar push-nucleate replicate signals, each one of which produces a cross-tie, Bloch-line pair in the adjacent downstream memory cell along the shift register. When the shift register is filled, a cross-tie will appear in the detector. This provides an output signal indicating that the N memory cells have been filled by the N replicate signals.

Abstract: The present system employs a turbine engine system which has three turbo rotor sections coupled to the same drive shaft. The first section employs a high temperature multi-stage expansion turbine to provide the major source of mechanical power. The second section employs a multi-stage turbo compressor which functions to compress air from the ambient, and such compression provides heat, through an interstage heat exchanger, to a heat reservoir, which may be an enclosure which it is desired to heat, or the atmosphere. The third section takes part of the compressed air from said second section and, (after said air is cooled either to near ambient temperature in the cooling mode or near the enclosure temperature in the heating mode) expands that air in a low temperature multi-stage expansion turbine to accomplish three goals. First, the expansion of the compressed air drives the expansion turbine to provide a second source of mechanical power which assists in driving the compressor section.

Abstract: A dielectric slab polarizer employs a unique configuration which provides improved impedance matching of the polarizer to the empty space of a waveguide section and, thereby, allows an approximate ninety degree differential phase shift transformation of RF field polarization to be achieved over a wider frequency bandwidth than heretofore attainable. The novel configuration of the slab polarizer is embodied by a flat middle section, conical tapered opposite end sections and reverse tapered intermediate sections which merge with the flat middle section and opposite end sections. The regions of merger between the respective intermediate sections and opposite end sections have a thickness greater than that of the middle section.