Abstract: A differential measurement probe has a ground clip system for electrically coupling outer shielding conductors of differential probing tips together. In one embodiment, the probing tips independently move vertically relative to each other with the ground clip system secured to each of the outer shielding conductors of the probing tips. In a further embodiment, the probing tips move both vertically and horizontally and the ground clip system has a spring wire member that is secured to the probe. The spring wire member is formed with various sections having various angles to each other that allows one section to slidably engage one of the outer shielding conductors on one of the probing tips and another section to slidably engage the outer shielding conductor of the other probing tip.
Abstract: Fast data patterns with desired edge positions are provided. A pattern generator (PG) circuit 10 stores and provides data patterns and respective position control data. A delay circuit 16 delays a clock CLK to produce a position control clock according to the position control data. An output flip flop 18 provides the data patterns following to the position control clock. The position of the clock is controlled as an operation reference of the data pattern and, as a result, controls the edge positions of the output data pattern.
Abstract: A differential measurement probe has a ground clip system for electrically coupling outer shielding conductors of differential probing tips together. In one embodiment, the probing tips independently move vertically relative to each other with the ground clip system secured to each of the outer shielding conductors of the probing tips. In a further embodiment, the probing tips move both vertically and horizontally and the ground clip system has a spring wire member that is secured to the probe. The spring wire member is formed with various sections having various angles to each other that allows one section to slidably engage one of the outer shielding conductors on one of the probing tips and another section to slidably engage the outer shielding conductor of the other probing tip.
Abstract: A signal generator can control phase relationship between output signals of the channels without stopping clocks provided to the channels to enable the circuit operation fast. First and second channels 20 and 22 have signal generation blocks 10 and 12 that have clock phase shift circuits 26 and 28, memories, parallel to serial converters and DACs respectively. A phase comparator 24 compares data reading clocks from the signal generation blocks 10 and 12 to produce a phase difference signal wherein the data reading clocks are used to read waveform data from the memories within the signal generation blocks 10 and 12. A CPU controls the clock phase shift circuits 26 and 28 according to the phase difference signal to shift phases of the clocks provided to the signal generation blocks 10 and 12 and then makes phase relationship between the output signals of the first and second channels 20 and 22 as desired.
Abstract: A wide bandwidth attenuator input circuit for a measurement probe has a Z0 attenuator circuit coupled in series with a compensated RC attenuator circuit. The series attenuator elements of the Z0 and the compensated RC attenuator circuits are coupled via a controlled impedance transmission line to the shunt attenuator elements of the Z0 and the compensated RC attenuator circuits. The shunt element of the Z0 attenuator element terminates the transmission line in its characteristic impedance. The junction of the series and shunt attenuator elements are coupled to the input of a buffer amplifier. At low and intermediate frequencies, the compensated RC attenuator circuit attenuates an input signal while at high frequencies, the compensated RC attenuator circuit acts as a short and the Z0 attenuator circuits attenuates the input signal.
Type:
Grant
Filed:
March 29, 2007
Date of Patent:
June 23, 2009
Assignee:
Tektronix, Inc.
Inventors:
Ira G. Pollock, Paul G. Chastain, William Q. Law
Abstract: An accessory device voltage management system includes an accessory device selectively coupled to a host. The host provides a bulk power supply and a low power supply voltage to the accessory device. The host receives accessory device parameters from the device and determines if the accessory device is a valid and supported device and, if so, sends commands to the accessory device to couple the bulk power supply voltage to a power supply circuit in the accessory device. The power supply circuit in the accessory device generates at least a first regulated voltage output.
Type:
Grant
Filed:
December 20, 2005
Date of Patent:
May 12, 2009
Assignee:
Tektronix, Inc.
Inventors:
Kenneth P. Dobyns, Michael J. Mende, Richard A. Van Epps, Michael D. Stevens
Abstract: A probe holder for a signal acquisition probe has a cradle receiving the signal acquisition probe and a pedestal adapted for receiving substrates of various thicknesses. The pedestal has a base member and an upright member with the upright member coupled to the cradle. The base member has at least a first lateral slot formed therein having a plurality of clearances for receiving substrates of varying thicknesses.
Abstract: A multi-channel signal acquisition probe has a ribbon cable with ganged coaxial signal cables. The coaxial signal cables are separated into individual cables at one end of the ribbon cable. A junction box is mounted the ribbon cable with the individual cables extending through apertures in a front face of the junction box. An electrically conductive terminal is disposed in the junction box and extends into openings in opposing sides of the junction box. The electrically conductive terminal is electrically coupled to each outer shielding conductor of the signal cables. The free ends of each of the individual signal cables has a probing head. A terminal connector is disposed on the other end of the ribbon cable.
Abstract: A method of producing of a two-dimensional probability density function eye diagram and Bit Error Rate eye arrays generates a two-dimensional PDF array of a correlated waveform record of a data pattern under test which is convolved with a two-dimensional probability density function (PDF) array of the uncorrelated jitter and noise in the data pattern under test. The resulting aggregate two dimensional PDF array of the correlated waveform record pattern with uncorrelated jitter and noise is divided into unit intervals and the unit intervals are summed to generated a two-dimensional PDF eye diagram array. The two-dimensional PDF eye diagram is processed to generate a two-dimensional Bit Error Rate eye array.
Abstract: A time shifting signal acquisition probe system has a signal acquisition probe having a memory containing a time delay constant representative of the propagation time delay of an electrical signal passing through the signal acquisition probe. A measurement test instrument receives the electrical signal from the signal acquisition probe and generating digital samples of the electrical signal in an acquisition system in response to a trigger signal and producing a waveform record. A communications bus coupled between the signal acquisition probe and the measurement test instrument couples the signal acquisition probe time delay constant from the signal acquisition probe to the measurement test instrument wherein processing circuitry in the measurement test instrument time shifts the waveform record of the electrical signal relative to the trigger signal by the amount of the signal acquisition probe time delay constant.
Abstract: A data generator has stable duration from trigger arrival to substantial data output start. A memory provides parallel data according to a divided clock. An address counter provides the same address to the memory until a trigger signal arrives and starts increasing the address after the trigger signal. A hexadecimal counter counts a clock that is faster than the divided clock as the counted number circulates every one period of the divided clock . A trigger information latch latches the counted number of the counter when the trigger signal arrives and provides it to a MUX. The MUX selects data in a pair of the parallel data provided at first and second inputs I1 and I2 to produce rearranged parallel data bits according to the latched counted number. A parallel to serial converter receives the rearranged parallel data to convert it to serial data according to the clock.
Abstract: A differential measurement probe has a ground clip system for electrically coupling outer shielding conductors of differential probing tips together. In one embodiment, the probing tips independently move vertically relative to each other with the ground clip system secured to each of the outer shielding conductors of the probing tips. In a further embodiment, the probing tips move both vertically and horizontally and the ground clip system has a spring wire member that is secured to the probe. The spring wire member is formed with various sections having various angles to each other that allows one section to slidably engage one of the outer shielding conductors on one of the probing tips and another section to slidably engage the outer shielding conductor of the other probing tip.
Abstract: A method and apparatus adapted to calibrate signal path of a signal analysis system such that loading effects of additional probes are substantially removed from the measurement. A signal under test from a device under test is coupled to a test probe and used with selectable impedance loads in the test probe to acquires sets of samples for characterizing transfer parameters of the device under test and compute open circuit voltages at the test probe. Other probes are coupled to the device under test and a set of measurement samples are acquired via the test probe. An equalization filter in either the frequency or time domain is computed from the open circuit voltage and measurement samples for reducing signal errors attributable to the measurement loading of the device under test by the test probe and other probes.
Abstract: A method and apparatus adapted to calibrate a signal path of a signal analysis system such that digital samples acquired by the system are processed for representing an arbitrary impedance loading of the device under test. The method and apparatus calibrates the signal path to characterize transfer parameters of the device under test within a spectral domain. A reflection coefficient (?L) is defined representative of an arbitrary impedance load coupled to the device under test and an equalization filter is computed to represent the loading of the device under test by the arbitrary impedance. Additional digital samples are acquired using the equalization filter to effect thereby a representation of the arbitrary impedance loading of the device under test.
Abstract: A method and apparatus adapted to calibrate a signal path of a signal analysis system such that digital samples of a signal under test acquired by the system are processed for representing the impedance of a device under test. The method and apparatus calibrates the signal path to characterize transfer parameters of the device under test within a spectral domain. A reference impedance (Zref) is retrieved that is associated with the signal analysis system. The transfer parameters of the device under test and the reference impedance (Zref) are processed to effect thereby a representation of the device under test impedance (Zeq) as a function of frequency.
Abstract: A wide bandwidth attenuator input circuit for a measurement probe has a Z0 attenuator circuit coupled in series with a compensated RC attenuator circuit. The series attenuator elements of the Z0 and the compensated RC attenuator circuits are coupled via a controlled impedance transmission line to the shunt attenuator elements of the Z0 and the compensated RC attenuator circuits. The shunt element of the Z0 attenuator element terminates the transmission line in its characteristic impedance. The junction of the series and shunt attenuator elements are coupled to the input of a buffer amplifier. At low and intermediate frequencies, the compensated RC attenuator circuit attenuates an input signal while at high frequencies, the compensated RC attenuator circuit acts as a short and the Z0 attenuator circuits attenuates the input signal.
Type:
Grant
Filed:
March 29, 2007
Date of Patent:
July 22, 2008
Assignee:
Tektronix, Inc.
Inventors:
Ira G. Pollock, William A. Hagerup, Paul G. Chastain, William Q. Law
Abstract: A signal acquisition probe has a double cushioned spring loaded probing tip assembly disposed in a housing. A first compressive element produces a first pre-loaded compressive force and an increasing compressive force on the probing tip assembly and a second compressive element produces a second pre-loaded compressive force and an increasing compressive force on the probing tip assembly subsequent to the first increasing compressive force. First and second double cushioned spring loaded probing tip assemblies may be disposed in a housing to produce a differential signal acquisition probe.
Abstract: An input by-pass circuit for a current probe has first and second switches coupled between current probe inputs and current sensing circuit inputs. A switch control is coupled to the switching circuit for selectively coupling and decoupling the current probe inputs to the current sensing circuit such that the current signal continuously flows in the device under test.
Type:
Grant
Filed:
May 8, 2006
Date of Patent:
April 15, 2008
Assignee:
Tektronix, Inc.
Inventors:
Jonathan S. Dandy, Kerry A. Stevens, Michael J. Mende, Thomas J. Sharp